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Searched refs:q_no (Results 1 – 23 of 23) sorted by relevance

/linux/drivers/net/ethernet/cavium/liquidio/
H A Dcn23xx_vf_device.c54 u32 q_no; in cn23xx_vf_reset_io_queues() local
57 for (q_no = 0; q_no < num_queues; q_no++) { in cn23xx_vf_reset_io_queues()
60 CN23XX_VF_SLI_IQ_PKT_CONTROL64(q_no)); in cn23xx_vf_reset_io_queues()
62 octeon_write_csr64(oct, CN23XX_VF_SLI_IQ_PKT_CONTROL64(q_no), in cn23xx_vf_reset_io_queues()
67 for (q_no = 0; q_no < num_queues; q_no++) { in cn23xx_vf_reset_io_queues()
69 CN23XX_VF_SLI_IQ_PKT_CONTROL64(q_no)); in cn23xx_vf_reset_io_queues()
74 oct, CN23XX_VF_SLI_IQ_PKT_CONTROL64(q_no))); in cn23xx_vf_reset_io_queues()
80 q_no); in cn23xx_vf_reset_io_queues()
85 octeon_write_csr64(oct, CN23XX_VF_SLI_IQ_PKT_CONTROL64(q_no), in cn23xx_vf_reset_io_queues()
89 oct, CN23XX_VF_SLI_IQ_PKT_CONTROL64(q_no))); in cn23xx_vf_reset_io_queues()
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H A Docteon_droq.c194 int octeon_delete_droq(struct octeon_device *oct, u32 q_no) in octeon_delete_droq() argument
196 struct octeon_droq *droq = oct->droq[q_no]; in octeon_delete_droq()
198 dev_dbg(&oct->pci_dev->dev, "%s[%d]\n", __func__, q_no); in octeon_delete_droq()
208 oct->io_qmask.oq &= ~(1ULL << q_no); in octeon_delete_droq()
209 vfree(oct->droq[q_no]); in octeon_delete_droq()
210 oct->droq[q_no] = NULL; in octeon_delete_droq()
218 u32 q_no, in octeon_init_droq() argument
228 dev_dbg(&oct->pci_dev->dev, "%s[%d]\n", __func__, q_no); in octeon_init_droq()
230 droq = oct->droq[q_no]; in octeon_init_droq()
234 droq->q_no = q_no; in octeon_init_droq()
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H A Docteon_droq.h248 u32 q_no; member
338 u32 q_no,
350 int octeon_delete_droq(struct octeon_device *oct_dev, u32 q_no);
365 u32 q_no,
376 int octeon_unregister_droq_ops(struct octeon_device *oct, u32 q_no);
400 int octeon_create_droq(struct octeon_device *oct, u32 q_no,
410 int octeon_enable_irq(struct octeon_device *oct, u32 q_no);
H A Dlio_core.c176 nctrl.iq_no = lio->linfo.txpciq[0].s.q_no; in liquidio_set_feature()
443 struct cavium_wq *wq = &lio->rxq_status_wq[droq->q_no]; in octeon_schedule_rxq_oom_work()
454 int q_no = wk->ctxul; in octnet_poll_check_rxq_oom_status() local
455 struct octeon_droq *droq = oct->droq[q_no]; in octnet_poll_check_rxq_oom_status()
469 int q, q_no; in setup_rx_oom_poll_fn() local
472 q_no = lio->linfo.rxpciq[q].s.q_no; in setup_rx_oom_poll_fn()
473 wq = &lio->rxq_status_wq[q_no]; in setup_rx_oom_poll_fn()
484 wq->wk.ctxul = q_no; in setup_rx_oom_poll_fn()
496 int q_no; in cleanup_rx_oom_poll_fn() local
498 for (q_no = 0; q_no < oct->num_oqs; q_no++) { in cleanup_rx_oom_poll_fn()
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H A Docteon_mailbox.c65 mbox->mbox_req.q_no = mbox->q_no; in octeon_mbox_read()
77 mbox->mbox_resp.q_no = mbox->q_no; in octeon_mbox_read()
134 struct octeon_mbox *mbox = oct->mbox[mbox_cmd->q_no]; in octeon_mbox_write()
262 mbox->q_no); in octeon_mbox_process_cmd()
263 pcie_flr(oct->sriov_info.dpiring_to_vfpcidev_lut[mbox->q_no]); in octeon_mbox_process_cmd()
355 int octeon_mbox_cancel(struct octeon_device *oct, int q_no) in octeon_mbox_cancel() argument
357 struct octeon_mbox *mbox = oct->mbox[q_no]; in octeon_mbox_cancel()
H A Docteon_device.c901 txpciq.s.q_no = iq_no; in octeon_setup_instr_queues()
962 u32 q_no; in octeon_set_io_queues_off() local
968 for (q_no = 0; q_no < oct->sriov_info.rings_per_vf; q_no++) { in octeon_set_io_queues_off()
970 oct, CN23XX_VF_SLI_IQ_PKT_CONTROL64(q_no)); in octeon_set_io_queues_off()
976 oct, CN23XX_SLI_IQ_PKT_CONTROL64(q_no)); in octeon_set_io_queues_off()
982 q_no); in octeon_set_io_queues_off()
988 CN23XX_SLI_IQ_PKT_CONTROL64(q_no), in octeon_set_io_queues_off()
992 oct, CN23XX_SLI_IQ_PKT_CONTROL64(q_no)); in octeon_set_io_queues_off()
995 "unable to reset qno %u\n", q_no); in octeon_set_io_queues_off()
1005 u32 q_no, in octeon_set_droq_pkt_op() argument
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H A Docteon_mailbox.h68 u32 q_no; member
91 u32 q_no; member
123 int octeon_mbox_cancel(struct octeon_device *oct, int q_no);
H A Dlio_ethtool.c483 nctrl.iq_no = lio->linfo.txpciq[0].s.q_no; in lio_send_queue_count_update()
718 nctrl.iq_no = lio->linfo.txpciq[0].s.q_no; in octnet_gpio_access()
744 nctrl.iq_no = lio->linfo.txpciq[0].s.q_no; in octnet_id_active()
787 sc->iq_no = lio->linfo.txpciq[0].s.q_no; in octnet_mdio45_access()
1074 lio->txq = lio->linfo.txpciq[0].s.q_no; in lio_23xx_reconfigure_queue_count()
1075 lio->rxq = lio->linfo.rxpciq[0].s.q_no; in lio_23xx_reconfigure_queue_count()
1397 nctrl.iq_no = lio->linfo.txpciq[0].s.q_no; in lio_set_pauseparam()
1762 j = lio->linfo.txpciq[vj].s.q_no; in lio_vf_get_ethtool_stats()
1804 j = lio->linfo.rxpciq[vj].s.q_no; in lio_vf_get_ethtool_stats()
2021 sc->iq_no = lio->linfo.txpciq[0].s.q_no; in octnet_get_intrmod_cfg()
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H A Docteon_nic.h85 u32 q_no; member
112 static inline int octnet_iq_is_full(struct octeon_device *oct, u32 q_no) in octnet_iq_is_full() argument
114 return ((u32)atomic_read(&oct->instr_queue[q_no]->instr_pending) in octnet_iq_is_full()
115 >= (oct->instr_queue[q_no]->max_count - 2)); in octnet_iq_is_full()
H A Dcn66xx_regs.h473 #define CN6XXX_DPI_DMA_ENG_ENB(q_no) \ argument
474 (CN6XXX_DPI_DMA_ENG0_ENB + ((q_no) * 8))
478 #define CN6XXX_DPI_DMA_ENG_BUF(q_no) \ argument
479 (CN6XXX_DPI_DMA_ENG0_BUF + ((q_no) * 8))
H A Dlio_main.c155 int q_no; in octeon_droq_bh() local
161 for (q_no = 0; q_no < MAX_OCTEON_OUTPUT_QUEUES(oct); q_no++) { in octeon_droq_bh()
162 if (!(oct->io_qmask.oq & BIT_ULL(q_no))) in octeon_droq_bh()
164 reschedule |= octeon_droq_process_packets(oct, oct->droq[q_no], in octeon_droq_bh()
166 lio_enable_irq(oct->droq[q_no], NULL); in octeon_droq_bh()
172 int adjusted_q_no = q_no + oct->sriov_info.pf_srn; in octeon_droq_bh()
465 lio->oct_dev->num_iqs].s.q_no; in check_txq_status()
630 sc->iq_no = lio->linfo.txpciq[0].s.q_no; in lio_sync_octeon_time()
1168 sc->iq_no = lio->linfo.txpciq[0].s.q_no; in send_rx_ctrl_cmd()
1289 lio->linfo.rxpciq[j].s.q_no); in liquidio_stop_nic_module()
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H A Dlio_vf_main.c622 sc->iq_no = lio->linfo.txpciq[0].s.q_no; in send_rx_ctrl_cmd()
731 lio->linfo.rxpciq[j].s.q_no); in liquidio_stop_nic_module()
1054 nctrl.iq_no = lio->linfo.txpciq[0].s.q_no; in liquidio_set_uc_list()
1103 nctrl.iq_no = lio->linfo.txpciq[0].s.q_no; in liquidio_set_mcast_list()
1146 nctrl.iq_no = lio->linfo.txpciq[0].s.q_no; in liquidio_set_mac()
1188 iq_no = lio->linfo.txpciq[i].s.q_no; in liquidio_get_stats64()
1204 oq_no = lio->linfo.rxpciq[i].s.q_no; in liquidio_get_stats64()
1379 sc->iq_no = ndata->q_no; in send_nic_timestamp_pkt()
1428 iq_no = lio->linfo.txpciq[q_idx].s.q_no; in liquidio_xmit()
1455 ndata.q_no = iq_no; in liquidio_xmit()
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H A Dliquidio_common.h728 u64 q_no:8; member
744 u64 q_no:8;
756 u64 q_no:8; member
760 u64 q_no:8;
H A Docteon_device.h851 int octeon_get_tx_qsize(struct octeon_device *oct, u32 q_no);
853 int octeon_get_rx_qsize(struct octeon_device *oct, u32 q_no);
865 void octeon_set_droq_pkt_op(struct octeon_device *oct, u32 q_no, u32 enable);
H A Dcn23xx_pf_regs.h558 #define CN23XX_DPI_DMA_REQQ_CTL(q_no) \ argument
559 (CN23XX_DPI_DMA_REQQ0_CTL + ((q_no) * 8))
H A Docteon_nic.c90 return octeon_send_command(oct, ndata->q_no, ring_doorbell, &ndata->cmd, in octnet_send_nic_data_pkt()
H A Drequest_manager.c53 u32 iq_no = (u32)txpciq.s.q_no; in octeon_init_instr_queue()
198 u32 iq_no = (u32)txpciq.s.q_no; in octeon_setup_iq()
H A Docteon_network.h577 qno = lio->linfo.txpciq[i % lio->oct_dev->num_iqs].s.q_no; in wake_txqs()
/linux/drivers/net/ethernet/marvell/octeon_ep_vf/
H A Doctep_vf_cn9k.c81 static void cn93_vf_reset_iq(struct octep_vf_device *oct, int q_no) in cn93_vf_reset_iq() argument
85 dev_dbg(&oct->pdev->dev, "Reset VF IQ-%d\n", q_no); in cn93_vf_reset_iq()
88 octep_vf_write_csr64(oct, CN93_VF_SDP_R_IN_ENABLE(q_no), val); in cn93_vf_reset_iq()
91 octep_vf_write_csr64(oct, CN93_VF_SDP_R_IN_INT_LEVELS(q_no), val); in cn93_vf_reset_iq()
92 octep_vf_write_csr64(oct, CN93_VF_SDP_R_IN_PKT_CNT(q_no), val); in cn93_vf_reset_iq()
93 octep_vf_write_csr64(oct, CN93_VF_SDP_R_IN_BYTE_CNT(q_no), val); in cn93_vf_reset_iq()
94 octep_vf_write_csr64(oct, CN93_VF_SDP_R_IN_INSTR_BADDR(q_no), val); in cn93_vf_reset_iq()
95 octep_vf_write_csr64(oct, CN93_VF_SDP_R_IN_INSTR_RSIZE(q_no), val); in cn93_vf_reset_iq()
98 octep_vf_write_csr64(oct, CN93_VF_SDP_R_IN_INSTR_DBELL(q_no), val); in cn93_vf_reset_iq()
100 val = octep_vf_read_csr64(oct, CN93_VF_SDP_R_IN_CNTS(q_no)); in cn93_vf_reset_iq()
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H A Doctep_vf_cnxk.c84 static void cnxk_vf_reset_iq(struct octep_vf_device *oct, int q_no) in cnxk_vf_reset_iq() argument
88 dev_dbg(&oct->pdev->dev, "Reset VF IQ-%d\n", q_no); in cnxk_vf_reset_iq()
91 octep_vf_write_csr64(oct, CNXK_VF_SDP_R_IN_ENABLE(q_no), val); in cnxk_vf_reset_iq()
94 octep_vf_write_csr64(oct, CNXK_VF_SDP_R_IN_INT_LEVELS(q_no), val); in cnxk_vf_reset_iq()
95 octep_vf_write_csr64(oct, CNXK_VF_SDP_R_IN_PKT_CNT(q_no), val); in cnxk_vf_reset_iq()
96 octep_vf_write_csr64(oct, CNXK_VF_SDP_R_IN_BYTE_CNT(q_no), val); in cnxk_vf_reset_iq()
97 octep_vf_write_csr64(oct, CNXK_VF_SDP_R_IN_INSTR_BADDR(q_no), val); in cnxk_vf_reset_iq()
98 octep_vf_write_csr64(oct, CNXK_VF_SDP_R_IN_INSTR_RSIZE(q_no), val); in cnxk_vf_reset_iq()
101 octep_vf_write_csr64(oct, CNXK_VF_SDP_R_IN_INSTR_DBELL(q_no), val); in cnxk_vf_reset_iq()
103 val = octep_vf_read_csr64(oct, CNXK_VF_SDP_R_IN_CNTS(q_no)); in cnxk_vf_reset_iq()
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/linux/drivers/net/ethernet/marvell/octeon_ep/
H A Doctep_cnxk_pf.c127 static int cnxk_reset_iq(struct octep_device *oct, int q_no) in cnxk_reset_iq() argument
132 dev_dbg(&oct->pdev->dev, "Reset PF IQ-%d\n", q_no); in cnxk_reset_iq()
135 q_no += conf->pf_ring_cfg.srn; in cnxk_reset_iq()
138 octep_write_csr64(oct, CNXK_SDP_R_IN_ENABLE(q_no), val); in cnxk_reset_iq()
141 octep_write_csr64(oct, CNXK_SDP_R_IN_CNTS(q_no), val); in cnxk_reset_iq()
142 octep_write_csr64(oct, CNXK_SDP_R_IN_INT_LEVELS(q_no), val); in cnxk_reset_iq()
143 octep_write_csr64(oct, CNXK_SDP_R_IN_PKT_CNT(q_no), val); in cnxk_reset_iq()
144 octep_write_csr64(oct, CNXK_SDP_R_IN_BYTE_CNT(q_no), val); in cnxk_reset_iq()
145 octep_write_csr64(oct, CNXK_SDP_R_IN_INSTR_BADDR(q_no), val); in cnxk_reset_iq()
146 octep_write_csr64(oct, CNXK_SDP_R_IN_INSTR_RSIZE(q_no), val); in cnxk_reset_iq()
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H A Doctep_cn9k_pf.c107 static int cn93_reset_iq(struct octep_device *oct, int q_no) in cn93_reset_iq() argument
112 dev_dbg(&oct->pdev->dev, "Reset PF IQ-%d\n", q_no); in cn93_reset_iq()
115 q_no += conf->pf_ring_cfg.srn; in cn93_reset_iq()
118 octep_write_csr64(oct, CN93_SDP_R_IN_ENABLE(q_no), val); in cn93_reset_iq()
121 octep_write_csr64(oct, CN93_SDP_R_IN_CNTS(q_no), val); in cn93_reset_iq()
122 octep_write_csr64(oct, CN93_SDP_R_IN_INT_LEVELS(q_no), val); in cn93_reset_iq()
123 octep_write_csr64(oct, CN93_SDP_R_IN_PKT_CNT(q_no), val); in cn93_reset_iq()
124 octep_write_csr64(oct, CN93_SDP_R_IN_BYTE_CNT(q_no), val); in cn93_reset_iq()
125 octep_write_csr64(oct, CN93_SDP_R_IN_INSTR_BADDR(q_no), val); in cn93_reset_iq()
126 octep_write_csr64(oct, CN93_SDP_R_IN_INSTR_RSIZE(q_no), val); in cn93_reset_iq()
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/linux/drivers/scsi/
H A Dadvansys.c244 #define ASC_QNO_TO_QADDR(q_no) ((ASC_QADR_BEG)+((int)(q_no) << 6)) argument
248 uchar q_no; member
292 uchar q_no; member
344 uchar q_no; member
6637 scsiq->q_no = (uchar)(_val >> 8); in _AscCopyLramScsiDoneQ()
7872 static int AscPutReadyQueue(ASC_DVC_VAR *asc_dvc, ASC_SCSI_Q *scsiq, uchar q_no) in AscPutReadyQueue() argument
7894 q_addr = ASC_QNO_TO_QADDR(q_no); in AscPutReadyQueue()
7910 q_no << 8) | (ushort)QS_READY)); in AscPutReadyQueue()
7915 AscPutReadySgListQueue(ASC_DVC_VAR *asc_dvc, ASC_SCSI_Q *scsiq, uchar q_no) in AscPutReadySgListQueue() argument
7945 q_addr = ASC_QNO_TO_QADDR(q_no); in AscPutReadySgListQueue()
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