| /linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
| H A D | vega20_processpptables.c | 231 (struct phm_ppt_v3_information *)hwmgr->pptable; in override_powerplay_table_fantargettemperature()
245 (struct phm_ppt_v3_information *)hwmgr->pptable; in init_powerplay_table_information()
339 hwmgr->pptable = kzalloc_obj(struct phm_ppt_v3_information); in vega20_pp_tables_initialize()
340 PP_ASSERT_WITH_CODE((hwmgr->pptable != NULL), in vega20_pp_tables_initialize()
366 (struct phm_ppt_v3_information *)(hwmgr->pptable); in vega20_pp_tables_uninitialize()
386 kfree(hwmgr->pptable); in vega20_pp_tables_uninitialize()
387 hwmgr->pptable = NULL; in vega20_pp_tables_uninitialize()
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| H A D | process_pptables_v1_0.c | 205 (struct phm_ppt_v1_information *)(hwmgr->pptable); in get_platform_power_management_table()
248 …t phm_ppt_v1_information *pp_table_information = (struct phm_ppt_v1_information *)(hwmgr->pptable); in init_dpm_2_parameters()
483 (struct phm_ppt_v1_information *)(hwmgr->pptable); in get_pcie_table()
759 (struct phm_ppt_v1_information *)(hwmgr->pptable); in get_gpio_table()
791 (struct phm_ppt_v1_information *)(hwmgr->pptable); in init_clock_voltage_dependency()
1141 hwmgr->pptable = kzalloc_obj(struct phm_ppt_v1_information); in pp_tables_v1_0_initialize()
1143 PP_ASSERT_WITH_CODE((NULL != hwmgr->pptable), in pp_tables_v1_0_initialize()
1188 (struct phm_ppt_v1_information *)(hwmgr->pptable); in pp_tables_v1_0_uninitialize()
1226 kfree(hwmgr->pptable); in pp_tables_v1_0_uninitialize()
1227 hwmgr->pptable = NULL; in pp_tables_v1_0_uninitialize()
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| H A D | vega12_processpptables.c | 195 (struct phm_ppt_v3_information *)hwmgr->pptable; in init_powerplay_table_information()
266 hwmgr->pptable = kzalloc_obj(struct phm_ppt_v3_information); in vega12_pp_tables_initialize()
267 PP_ASSERT_WITH_CODE((hwmgr->pptable != NULL), in vega12_pp_tables_initialize()
293 (struct phm_ppt_v3_information *)(hwmgr->pptable); in vega12_pp_tables_uninitialize()
310 kfree(hwmgr->pptable); in vega12_pp_tables_uninitialize()
311 hwmgr->pptable = NULL; in vega12_pp_tables_uninitialize()
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| H A D | vega10_hwmgr.c | 197 (struct phm_ppt_v2_information *)hwmgr->pptable; in vega10_set_features_platform_caps()
307 (struct phm_ppt_v2_information *)(hwmgr->pptable); in vega10_odn_initial_default_setting()
531 (struct phm_ppt_v2_information *)(hwmgr->pptable); in vega10_get_socclk_for_voltage_evv()
568 (struct phm_ppt_v2_information *)hwmgr->pptable; in vega10_get_evv_voltages()
673 (struct phm_ppt_v2_information *)(hwmgr->pptable); in vega10_patch_voltage_dependency_tables_with_lookup_table()
749 (struct phm_ppt_v2_information *)(hwmgr->pptable); in vega10_complete_dependency_tables()
778 (struct phm_ppt_v2_information *)(hwmgr->pptable); in vega10_set_private_data_based_on_pptable()
1173 (struct phm_ppt_v2_information *)hwmgr->pptable; in vega10_construct_voltage_tables()
1262 (struct phm_ppt_v2_information *)(hwmgr->pptable); in vega10_setup_default_pcie_table()
1310 (struct phm_ppt_v2_information *)(hwmgr->pptable); in vega10_setup_default_dpm_tables()
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| H A D | vega10_processpptables.c | 788 (struct phm_ppt_v2_information *)(hwmgr->pptable); in get_pcie_table()
875 (struct phm_ppt_v2_information *)(hwmgr->pptable); in init_powerplay_extended_tables()
1063 (struct phm_ppt_v2_information *)(hwmgr->pptable); in init_dpm_2_parameters()
1150 hwmgr->pptable = kzalloc_obj(struct phm_ppt_v2_information); in vega10_pp_tables_initialize()
1152 PP_ASSERT_WITH_CODE((hwmgr->pptable != NULL), in vega10_pp_tables_initialize()
1197 (struct phm_ppt_v2_information *)(hwmgr->pptable); in vega10_pp_tables_uninitialize()
1235 kfree(hwmgr->pptable); in vega10_pp_tables_uninitialize()
1236 hwmgr->pptable = NULL; in vega10_pp_tables_uninitialize()
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| H A D | smu7_hwmgr.c | 320 (struct phm_ppt_v1_information *)hwmgr->pptable; in smu7_construct_voltage_tables()
639 (struct phm_ppt_v1_information *)(hwmgr->pptable); in smu7_setup_default_pcie_table()
873 (struct phm_ppt_v1_information *)(hwmgr->pptable); in smu7_setup_dpm_tables_v1()
939 (struct phm_ppt_v1_information *)(hwmgr->pptable); in smu7_odn_initial_default_setting()
984 (struct phm_ppt_v1_information *)(hwmgr->pptable); in smu7_setup_voltage_range_from_vbios()
1012 (struct phm_ppt_v1_information *)(hwmgr->pptable); in smu7_check_dpm_table_updated()
1539 (struct phm_ppt_v1_information *)(hwmgr->pptable); in smu7_populate_umdpstate_clocks()
1807 (struct phm_ppt_v1_information *)(hwmgr->pptable); in smu7_init_dpm_defaults()
2056 (struct phm_ppt_v1_information *)hwmgr->pptable; in smu7_get_evv_voltages()
2193 (struct phm_ppt_v1_information *)(hwmgr->pptable); in smu7_patch_clock_voltage_limits_with_vddc_leakage()
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| H A D | vega12_thermal.c | 174 (struct phm_ppt_v3_information *)hwmgr->pptable; in vega12_thermal_set_temperature_range()
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| H A D | vega20_hwmgr.c | 798 (struct phm_ppt_v3_information *)hwmgr->pptable; in vega20_init_smc_table()
1051 (struct phm_ppt_v3_information *)hwmgr->pptable; in vega20_od8_set_feature_capabilities()
1251 (struct phm_ppt_v3_information *)hwmgr->pptable; in vega20_od8_initialize_default_settings()
2804 (struct phm_ppt_v2_information *)hwmgr->pptable; in vega20_get_dal_power_level()
3375 PPTable_t *pptable = &(data->smc_state_table.pp_table); in vega20_emit_clock_levels() local
3494 gen_speed = pptable->PcieGenSpeed[i]; in vega20_emit_clock_levels()
3495 lane_width = pptable->PcieLaneCount[i]; in vega20_emit_clock_levels()
3511 pptable->LclkFreq[i], in vega20_emit_clock_levels()
4286 (struct phm_ppt_v3_information *)hwmgr->pptable; in vega20_get_thermal_temperature_range()
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| H A D | vega10_powertune.c | 1241 (struct phm_ppt_v2_information *)(hwmgr->pptable); in vega10_initialize_power_tune_defaults()
1292 (struct phm_ppt_v2_information *)(hwmgr->pptable); in vega10_enable_power_containment()
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| H A D | smu10_hwmgr.c | 469 struct smu10_voltage_dependency_table **pptable, in smu10_get_clock_voltage_dependency_table() argument
487 *pptable = ptable; in smu10_get_clock_voltage_dependency_table()
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| H A D | smu7_powertune.c | 1151 (struct phm_ppt_v1_information *)(hwmgr->pptable); in smu7_enable_power_containment()
1241 (struct phm_ppt_v1_information *)(hwmgr->pptable); in smu7_power_control_set_level()
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| H A D | vega12_hwmgr.c | 828 (struct phm_ppt_v3_information *)hwmgr->pptable; in vega12_init_smc_table()
1830 (struct phm_ppt_v2_information *)hwmgr->pptable; in vega12_get_dal_power_level()
2795 (struct phm_ppt_v3_information *)hwmgr->pptable; in vega12_get_thermal_temperature_range()
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| /linux/drivers/gpu/drm/amd/pm/swsmu/smu14/ |
| H A D | smu_v14_0_2_ppt.c | 286 PPTable_t *pptable = smu->smu_table.driver_pptable; in smu_v14_0_2_check_powerplay_table() local
288 &pptable->SkuTable.OverDriveLimitsBasicMax; in smu_v14_0_2_check_powerplay_table()
290 &pptable->SkuTable.OverDriveLimitsBasicMin; in smu_v14_0_2_check_powerplay_table()
316 !(pptable->PFE_Settings.FeaturesToRun[0] & (1 << FEATURE_FAN_CONTROL_BIT)); in smu_v14_0_2_check_powerplay_table()
465 PPTable_t *pptable = table_context->driver_pptable; in smu_v14_0_2_set_default_dpm_table() local
466 SkuTable_t *skutable = &pptable->SkuTable; in smu_v14_0_2_set_default_dpm_table()
928 PPTable_t *pptable = smu->smu_table.driver_pptable; in smu_v14_0_2_is_od_feature_supported() local
930 &pptable->SkuTable.OverDriveLimitsBasicMax; in smu_v14_0_2_is_od_feature_supported()
967 PPTable_t *pptable = smu->smu_table.driver_pptable; in smu_v14_0_2_get_od_setting_limits() local
969 &pptable->SkuTable.OverDriveLimitsBasicMax; in smu_v14_0_2_get_od_setting_limits()
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| /linux/drivers/gpu/drm/amd/pm/swsmu/smu13/ |
| H A D | smu_v13_0_6_ppt.c | 871 struct PPTable_t *pptable = in smu_v13_0_6_update_caps() local
875 !pptable->PPT1Max) in smu_v13_0_6_update_caps()
886 struct PPTable_t *pptable = in smu_v13_0_6_setup_driver_pptable() local
903 if (!pptable->Init) { in smu_v13_0_6_setup_driver_pptable()
926 pptable->MaxSocketPowerLimit = in smu_v13_0_6_setup_driver_pptable()
928 pptable->MaxGfxclkFrequency = in smu_v13_0_6_setup_driver_pptable()
930 pptable->MinGfxclkFrequency = in smu_v13_0_6_setup_driver_pptable()
937 pptable->FclkFrequencyTable[i] = in smu_v13_0_6_setup_driver_pptable()
939 pptable->UclkFrequencyTable[i] = in smu_v13_0_6_setup_driver_pptable()
941 pptable->SocclkFrequencyTable[i] = SMUQ10_ROUND( in smu_v13_0_6_setup_driver_pptable()
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| H A D | smu_v13_0_0_ppt.c | 344 PPTable_t *pptable = smu->smu_table.driver_pptable; in smu_v13_0_0_check_powerplay_table() local
346 &pptable->SkuTable.OverDriveLimitsBasicMax; in smu_v13_0_0_check_powerplay_table()
348 &pptable->SkuTable.OverDriveLimitsMin; in smu_v13_0_0_check_powerplay_table()
374 !(pptable->SkuTable.FeaturesToRun[0] & (1 << FEATURE_FAN_CONTROL_BIT)); in smu_v13_0_0_check_powerplay_table()
565 PPTable_t *pptable = table_context->driver_pptable; in smu_v13_0_0_set_default_dpm_table() local
566 SkuTable_t *skutable = &pptable->SkuTable; in smu_v13_0_0_set_default_dpm_table()
1047 PPTable_t *pptable = smu->smu_table.driver_pptable; in smu_v13_0_0_is_od_feature_supported() local
1049 &pptable->SkuTable.OverDriveLimitsBasicMax; in smu_v13_0_0_is_od_feature_supported()
1086 PPTable_t *pptable = smu->smu_table.driver_pptable; in smu_v13_0_0_get_od_setting_limits() local
1088 &pptable->SkuTable.OverDriveLimitsBasicMax; in smu_v13_0_0_get_od_setting_limits()
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| H A D | smu_v13_0_7_ppt.c | 1057 PPTable_t *pptable = smu->smu_table.driver_pptable; in smu_v13_0_7_is_od_feature_supported() local
1059 &pptable->SkuTable.OverDriveLimitsBasicMax; in smu_v13_0_7_is_od_feature_supported()
1096 PPTable_t *pptable = smu->smu_table.driver_pptable; in smu_v13_0_7_get_od_setting_limits() local
1098 &pptable->SkuTable.OverDriveLimitsBasicMax; in smu_v13_0_7_get_od_setting_limits()
1100 &pptable->SkuTable.OverDriveLimitsMin; in smu_v13_0_7_get_od_setting_limits()
2042 PPTable_t *pptable = smu->smu_table.driver_pptable; in smu_v13_0_7_get_thermal_temperature_range() local
2049 range->max = pptable->SkuTable.TemperatureLimit[TEMP_EDGE] * in smu_v13_0_7_get_thermal_temperature_range()
2051 range->edge_emergency_max = (pptable->SkuTable.TemperatureLimit[TEMP_EDGE] + CTF_OFFSET_EDGE) * in smu_v13_0_7_get_thermal_temperature_range()
2053 range->hotspot_crit_max = pptable->SkuTable.TemperatureLimit[TEMP_HOTSPOT] * in smu_v13_0_7_get_thermal_temperature_range()
2055 …range->hotspot_emergency_max = (pptable->SkuTable.TemperatureLimit[TEMP_HOTSPOT] + CTF_OFFSET_HOTS… in smu_v13_0_7_get_thermal_temperature_range()
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| H A D | aldebaran_ppt.c | 400 PPTable_t *pptable = smu->smu_table.driver_pptable; in aldebaran_set_default_dpm_table() local
424 dpm_table->dpm_levels[0].value = pptable->GfxclkFmin; in aldebaran_set_default_dpm_table()
426 dpm_table->dpm_levels[1].value = pptable->GfxclkFmax; in aldebaran_set_default_dpm_table()
975 PPTable_t *pptable = smu->smu_table.driver_pptable; in aldebaran_get_thermal_temperature_range() local
982 range->hotspot_crit_max = pptable->ThotspotLimit * in aldebaran_get_thermal_temperature_range()
984 range->hotspot_emergency_max = (pptable->ThotspotLimit + CTF_OFFSET_HOTSPOT) * in aldebaran_get_thermal_temperature_range()
986 range->mem_crit_max = pptable->TmemLimit * in aldebaran_get_thermal_temperature_range()
988 range->mem_emergency_max = (pptable->TmemLimit + CTF_OFFSET_MEM)* in aldebaran_get_thermal_temperature_range()
1119 PPTable_t *pptable = smu->smu_table.driver_pptable; in aldebaran_get_power_limit() local
1147 if (!pptable) { in aldebaran_get_power_limit()
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| /linux/drivers/gpu/drm/amd/pm/powerplay/smumgr/ |
| H A D | vegam_smumgr.c | 335 (struct phm_ppt_v1_information *)(hwmgr->pptable); in vegam_update_uvd_smc_table()
368 (struct phm_ppt_v1_information *)(hwmgr->pptable); in vegam_update_vce_smc_table()
400 (struct phm_ppt_v1_information *)(hwmgr->pptable); in vegam_update_bif_smc_table()
435 (struct phm_ppt_v1_information *)(hwmgr->pptable); in vegam_initialize_power_tune_defaults()
507 (struct phm_ppt_v1_information *)(hwmgr->pptable); in vegam_populate_cac_table()
544 (struct phm_ppt_v1_information *)(hwmgr->pptable); in vegam_populate_ulv_level()
817 (struct phm_ppt_v1_information *)(hwmgr->pptable); in vegam_populate_single_graphic_level()
870 (struct phm_ppt_v1_information *)(hwmgr->pptable); in vegam_populate_all_graphic_levels()
986 (struct phm_ppt_v1_information *)(hwmgr->pptable); in vegam_populate_single_memory_level()
1090 (struct phm_ppt_v1_information *)(hwmgr->pptable); in vegam_populate_mvdd_value()
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| H A D | polaris10_smumgr.c | 434 (struct phm_ppt_v1_information *)(hwmgr->pptable); in polaris10_populate_bapm_parameters_in_dpm_table()
508 (struct phm_ppt_v1_information *)(hwmgr->pptable); in polaris10_populate_tdc_limit()
588 (struct phm_ppt_v1_information *)(hwmgr->pptable); in polaris10_populate_bapm_vddc_base_leakage_sidd()
748 (struct phm_ppt_v1_information *)(hwmgr->pptable); in polaris10_populate_cac_table()
783 (struct phm_ppt_v1_information *)(hwmgr->pptable); in polaris10_populate_ulv_level()
963 (struct phm_ppt_v1_information *)(hwmgr->pptable); in polaris10_populate_single_graphic_level()
1042 (struct phm_ppt_v1_information *)(hwmgr->pptable); in polaris10_populate_all_graphic_levels()
1158 (struct phm_ppt_v1_information *)(hwmgr->pptable); in polaris10_populate_single_memory_level()
1257 (struct phm_ppt_v1_information *)(hwmgr->pptable); in polaris10_populate_mvdd_value()
1284 (struct phm_ppt_v1_information *)(hwmgr->pptable); in polaris10_populate_smc_acpi_level()
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| H A D | fiji_smumgr.c | 471 (struct phm_ppt_v1_information *)(hwmgr->pptable); in fiji_initialize_power_tune_defaults()
493 (struct phm_ppt_v1_information *)(hwmgr->pptable); in fiji_populate_bapm_parameters_in_dpm_table()
587 (struct phm_ppt_v1_information *)(hwmgr->pptable); in fiji_populate_tdc_limit()
673 (struct phm_ppt_v1_information *)(hwmgr->pptable); in fiji_populate_bapm_vddc_base_leakage_sidd()
761 (struct phm_ppt_v1_information *)(hwmgr->pptable); in fiji_populate_cac_table()
801 (struct phm_ppt_v1_information *)(hwmgr->pptable); in fiji_populate_ulv_level()
944 (struct phm_ppt_v1_information *)(hwmgr->pptable); in fiji_populate_single_graphic_level()
1006 (struct phm_ppt_v1_information *)(hwmgr->pptable); in fiji_populate_all_graphic_levels()
1166 (struct phm_ppt_v1_information *)(hwmgr->pptable); in fiji_populate_single_memory_level()
1276 (struct phm_ppt_v1_information *)(hwmgr->pptable); in fiji_populate_mvdd_value()
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| H A D | tonga_smumgr.c | 253 (struct phm_ppt_v1_information *)(hwmgr->pptable); in tonga_get_dependency_volt_by_clk()
398 (struct phm_ppt_v1_information *)(hwmgr->pptable); in tonga_populate_cac_tables()
483 (struct phm_ppt_v1_information *)(hwmgr->pptable); in tonga_populate_ulv_level()
624 (struct phm_ppt_v1_information *)(hwmgr->pptable); in tonga_populate_single_graphic_level()
690 struct phm_ppt_v1_information *pptable_info = (struct phm_ppt_v1_information *)(hwmgr->pptable); in tonga_populate_all_graphic_levels()
967 (struct phm_ppt_v1_information *)(hwmgr->pptable); in tonga_populate_single_memory_level()
1148 (struct phm_ppt_v1_information *)(hwmgr->pptable); in tonga_populate_mvdd_value()
1316 (struct phm_ppt_v1_information *)(hwmgr->pptable); in tonga_populate_smc_uvd_level()
1376 (struct phm_ppt_v1_information *)(hwmgr->pptable); in tonga_populate_smc_vce_level()
1421 (struct phm_ppt_v1_information *)(hwmgr->pptable); in tonga_populate_smc_acp_level()
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| /linux/drivers/gpu/drm/amd/pm/swsmu/ |
| H A D | smu_cmn.c | 1148 void *pptable = smu->smu_table.driver_pptable; in smu_cmn_write_pptable() local
1153 pptable, in smu_cmn_write_pptable()
1189 void *pptable = smu->smu_table.combo_pptable; in smu_cmn_get_combo_pptable() local
1194 pptable, in smu_cmn_get_combo_pptable()
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