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Searched refs:pptable (Results 1 – 16 of 16) sorted by relevance

/linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dvega12_processpptables.c195 (struct phm_ppt_v3_information *)hwmgr->pptable; in init_powerplay_table_information()
266 hwmgr->pptable = kzalloc(sizeof(struct phm_ppt_v3_information), GFP_KERNEL); in vega12_pp_tables_initialize()
267 PP_ASSERT_WITH_CODE((hwmgr->pptable != NULL), in vega12_pp_tables_initialize()
293 (struct phm_ppt_v3_information *)(hwmgr->pptable); in vega12_pp_tables_uninitialize()
310 kfree(hwmgr->pptable); in vega12_pp_tables_uninitialize()
311 hwmgr->pptable = NULL; in vega12_pp_tables_uninitialize()
H A Dprocess_pptables_v1_0.c205 (struct phm_ppt_v1_information *)(hwmgr->pptable); in get_platform_power_management_table()
248 …t phm_ppt_v1_information *pp_table_information = (struct phm_ppt_v1_information *)(hwmgr->pptable); in init_dpm_2_parameters()
484 (struct phm_ppt_v1_information *)(hwmgr->pptable); in get_pcie_table()
762 (struct phm_ppt_v1_information *)(hwmgr->pptable); in get_gpio_table()
794 (struct phm_ppt_v1_information *)(hwmgr->pptable); in init_clock_voltage_dependency()
1144 hwmgr->pptable = kzalloc(sizeof(struct phm_ppt_v1_information), GFP_KERNEL); in pp_tables_v1_0_initialize()
1146 PP_ASSERT_WITH_CODE((NULL != hwmgr->pptable), in pp_tables_v1_0_initialize()
1191 (struct phm_ppt_v1_information *)(hwmgr->pptable); in pp_tables_v1_0_uninitialize()
1229 kfree(hwmgr->pptable); in pp_tables_v1_0_uninitialize()
1230 hwmgr->pptable = NULL; in pp_tables_v1_0_uninitialize()
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H A Dvega10_hwmgr.c197 (struct phm_ppt_v2_information *)hwmgr->pptable; in vega10_set_features_platform_caps()
307 (struct phm_ppt_v2_information *)(hwmgr->pptable); in vega10_odn_initial_default_setting()
531 (struct phm_ppt_v2_information *)(hwmgr->pptable); in vega10_get_socclk_for_voltage_evv()
568 (struct phm_ppt_v2_information *)hwmgr->pptable; in vega10_get_evv_voltages()
673 (struct phm_ppt_v2_information *)(hwmgr->pptable); in vega10_patch_voltage_dependency_tables_with_lookup_table()
749 (struct phm_ppt_v2_information *)(hwmgr->pptable); in vega10_complete_dependency_tables()
778 (struct phm_ppt_v2_information *)(hwmgr->pptable); in vega10_set_private_data_based_on_pptable()
1174 (struct phm_ppt_v2_information *)hwmgr->pptable; in vega10_construct_voltage_tables()
1263 (struct phm_ppt_v2_information *)(hwmgr->pptable); in vega10_setup_default_pcie_table()
1311 (struct phm_ppt_v2_information *)(hwmgr->pptable); in vega10_setup_default_dpm_tables()
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H A Dvega10_processpptables.c789 (struct phm_ppt_v2_information *)(hwmgr->pptable); in get_pcie_table()
877 (struct phm_ppt_v2_information *)(hwmgr->pptable); in init_powerplay_extended_tables()
1065 (struct phm_ppt_v2_information *)(hwmgr->pptable); in init_dpm_2_parameters()
1152 hwmgr->pptable = kzalloc(sizeof(struct phm_ppt_v2_information), GFP_KERNEL); in vega10_pp_tables_initialize()
1154 PP_ASSERT_WITH_CODE((hwmgr->pptable != NULL), in vega10_pp_tables_initialize()
1199 (struct phm_ppt_v2_information *)(hwmgr->pptable); in vega10_pp_tables_uninitialize()
1237 kfree(hwmgr->pptable); in vega10_pp_tables_uninitialize()
1238 hwmgr->pptable = NULL; in vega10_pp_tables_uninitialize()
H A Dsmu7_hwmgr.c320 (struct phm_ppt_v1_information *)hwmgr->pptable; in smu7_construct_voltage_tables()
639 (struct phm_ppt_v1_information *)(hwmgr->pptable); in smu7_setup_default_pcie_table()
871 (struct phm_ppt_v1_information *)(hwmgr->pptable); in smu7_setup_dpm_tables_v1()
937 (struct phm_ppt_v1_information *)(hwmgr->pptable); in smu7_odn_initial_default_setting()
982 (struct phm_ppt_v1_information *)(hwmgr->pptable); in smu7_setup_voltage_range_from_vbios()
1010 (struct phm_ppt_v1_information *)(hwmgr->pptable); in smu7_check_dpm_table_updated()
1537 (struct phm_ppt_v1_information *)(hwmgr->pptable); in smu7_populate_umdpstate_clocks()
1805 (struct phm_ppt_v1_information *)(hwmgr->pptable); in smu7_init_dpm_defaults()
2054 (struct phm_ppt_v1_information *)hwmgr->pptable; in smu7_get_evv_voltages()
2191 (struct phm_ppt_v1_information *)(hwmgr->pptable); in smu7_patch_clock_voltage_limits_with_vddc_leakage()
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H A Dvega12_thermal.c174 (struct phm_ppt_v3_information *)hwmgr->pptable; in vega12_thermal_set_temperature_range()
H A Dsmu_helper.c467 (struct phm_ppt_v1_information *)(hwmgr->pptable); in phm_get_sclk_for_voltage_evv()
496 struct phm_ppt_v1_information *pptable_info = (struct phm_ppt_v1_information *)(hwmgr->pptable); in phm_initializa_dynamic_state_adjustment_rule_settings()
548 (struct phm_ppt_v1_information *)hwmgr->pptable; in phm_apply_dal_min_voltage_request()
H A Dvega20_hwmgr.c798 (struct phm_ppt_v3_information *)hwmgr->pptable; in vega20_init_smc_table()
1051 (struct phm_ppt_v3_information *)hwmgr->pptable; in vega20_od8_set_feature_capabilities()
1251 (struct phm_ppt_v3_information *)hwmgr->pptable; in vega20_od8_initialize_default_settings()
2804 (struct phm_ppt_v2_information *)hwmgr->pptable; in vega20_get_dal_power_level()
3374 PPTable_t *pptable = &(data->smc_state_table.pp_table); in vega20_print_clock_levels() local
3473 gen_speed = pptable->PcieGenSpeed[i]; in vega20_print_clock_levels()
3474 lane_width = pptable->PcieLaneCount[i]; in vega20_print_clock_levels()
3487 pptable->LclkFreq[i], in vega20_print_clock_levels()
4233 (struct phm_ppt_v3_information *)hwmgr->pptable; in vega20_get_thermal_temperature_range()
H A Dvega10_powertune.c1241 (struct phm_ppt_v2_information *)(hwmgr->pptable); in vega10_initialize_power_tune_defaults()
1292 (struct phm_ppt_v2_information *)(hwmgr->pptable); in vega10_enable_power_containment()
H A Dsmu7_powertune.c1151 (struct phm_ppt_v1_information *)(hwmgr->pptable); in smu7_enable_power_containment()
1241 (struct phm_ppt_v1_information *)(hwmgr->pptable); in smu7_power_control_set_level()
H A Dvega12_hwmgr.c828 (struct phm_ppt_v3_information *)hwmgr->pptable; in vega12_init_smc_table()
1830 (struct phm_ppt_v2_information *)hwmgr->pptable; in vega12_get_dal_power_level()
2777 (struct phm_ppt_v3_information *)hwmgr->pptable; in vega12_get_thermal_temperature_range()
/linux/drivers/gpu/drm/amd/pm/swsmu/smu14/
H A Dsmu_v14_0_2_ppt.c324 PPTable_t *pptable = smu->smu_table.driver_pptable; in smu_v14_0_2_check_powerplay_table() local
326 &pptable->SkuTable.OverDriveLimitsBasicMax; in smu_v14_0_2_check_powerplay_table()
328 &pptable->SkuTable.OverDriveLimitsBasicMin; in smu_v14_0_2_check_powerplay_table()
354 !(pptable->PFE_Settings.FeaturesToRun[0] & (1 << FEATURE_FAN_CONTROL_BIT)); in smu_v14_0_2_check_powerplay_table()
502 PPTable_t *pptable = table_context->driver_pptable; in smu_v14_0_2_set_default_dpm_table() local
503 SkuTable_t *skutable = &pptable->SkuTable; in smu_v14_0_2_set_default_dpm_table()
972 PPTable_t *pptable = smu->smu_table.driver_pptable; in smu_v14_0_2_is_od_feature_supported() local
974 &pptable->SkuTable.OverDriveLimitsBasicMax; in smu_v14_0_2_is_od_feature_supported()
984 PPTable_t *pptable = smu->smu_table.driver_pptable; in smu_v14_0_2_get_od_setting_limits() local
986 &pptable->SkuTable.OverDriveLimitsBasicMax; in smu_v14_0_2_get_od_setting_limits()
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/linux/drivers/gpu/drm/amd/pm/swsmu/smu13/
H A Dsmu_v13_0_0_ppt.c352 PPTable_t *pptable = smu->smu_table.driver_pptable; in smu_v13_0_0_check_powerplay_table() local
354 &pptable->SkuTable.OverDriveLimitsBasicMax; in smu_v13_0_0_check_powerplay_table()
356 &pptable->SkuTable.OverDriveLimitsMin; in smu_v13_0_0_check_powerplay_table()
382 !(pptable->SkuTable.FeaturesToRun[0] & (1 << FEATURE_FAN_CONTROL_BIT)); in smu_v13_0_0_check_powerplay_table()
572 PPTable_t *pptable = table_context->driver_pptable; in smu_v13_0_0_set_default_dpm_table() local
573 SkuTable_t *skutable = &pptable->SkuTable; in smu_v13_0_0_set_default_dpm_table()
1061 PPTable_t *pptable = smu->smu_table.driver_pptable; in smu_v13_0_0_is_od_feature_supported() local
1063 &pptable->SkuTable.OverDriveLimitsBasicMax; in smu_v13_0_0_is_od_feature_supported()
1073 PPTable_t *pptable = smu->smu_table.driver_pptable; in smu_v13_0_0_get_od_setting_limits() local
1075 &pptable->SkuTable.OverDriveLimitsBasicMax; in smu_v13_0_0_get_od_setting_limits()
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/linux/drivers/gpu/drm/amd/pm/powerplay/smumgr/
H A Dvegam_smumgr.c335 (struct phm_ppt_v1_information *)(hwmgr->pptable); in vegam_update_uvd_smc_table()
368 (struct phm_ppt_v1_information *)(hwmgr->pptable); in vegam_update_vce_smc_table()
400 (struct phm_ppt_v1_information *)(hwmgr->pptable); in vegam_update_bif_smc_table()
435 (struct phm_ppt_v1_information *)(hwmgr->pptable); in vegam_initialize_power_tune_defaults()
507 (struct phm_ppt_v1_information *)(hwmgr->pptable); in vegam_populate_cac_table()
544 (struct phm_ppt_v1_information *)(hwmgr->pptable); in vegam_populate_ulv_level()
817 (struct phm_ppt_v1_information *)(hwmgr->pptable); in vegam_populate_single_graphic_level()
870 (struct phm_ppt_v1_information *)(hwmgr->pptable); in vegam_populate_all_graphic_levels()
986 (struct phm_ppt_v1_information *)(hwmgr->pptable); in vegam_populate_single_memory_level()
1090 (struct phm_ppt_v1_information *)(hwmgr->pptable); in vegam_populate_mvdd_value()
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H A Dfiji_smumgr.c471 (struct phm_ppt_v1_information *)(hwmgr->pptable); in fiji_initialize_power_tune_defaults()
493 (struct phm_ppt_v1_information *)(hwmgr->pptable); in fiji_populate_bapm_parameters_in_dpm_table()
587 (struct phm_ppt_v1_information *)(hwmgr->pptable); in fiji_populate_tdc_limit()
673 (struct phm_ppt_v1_information *)(hwmgr->pptable); in fiji_populate_bapm_vddc_base_leakage_sidd()
761 (struct phm_ppt_v1_information *)(hwmgr->pptable); in fiji_populate_cac_table()
801 (struct phm_ppt_v1_information *)(hwmgr->pptable); in fiji_populate_ulv_level()
944 (struct phm_ppt_v1_information *)(hwmgr->pptable); in fiji_populate_single_graphic_level()
1006 (struct phm_ppt_v1_information *)(hwmgr->pptable); in fiji_populate_all_graphic_levels()
1166 (struct phm_ppt_v1_information *)(hwmgr->pptable); in fiji_populate_single_memory_level()
1276 (struct phm_ppt_v1_information *)(hwmgr->pptable); in fiji_populate_mvdd_value()
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/linux/drivers/gpu/drm/amd/pm/swsmu/smu11/
H A Dnavi10_ppt.c1226 PPTable_t *pptable = smu->smu_table.driver_pptable; in navi10_is_support_fine_grained_dpm() local
1236 dpm_desc = &pptable->DpmDescriptor[clk_index]; in navi10_is_support_fine_grained_dpm()
1271 PPTable_t *pptable = (PPTable_t *)table_context->driver_pptable; in navi10_emit_clk_levels() local
1356 pptable->LclkFreq[i], in navi10_emit_clk_levels()
1480 PPTable_t *pptable = (PPTable_t *)table_context->driver_pptable; in navi10_print_clk_levels() local
1559 pptable->LclkFreq[i], in navi10_print_clk_levels()
1912 PPTable_t *pptable = smu->smu_table.driver_pptable; in navi10_get_fan_parameters() local
1914 smu->fan_max_rpm = pptable->FanMaximumRpm; in navi10_get_fan_parameters()
2235 PPTable_t *pptable = table_context->driver_pptable; in navi10_read_sensor() local
2242 *(uint32_t *)data = pptable->FanMaximumRpm; in navi10_read_sensor()
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