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Searched refs:pll_regs (Results 1 – 11 of 11) sorted by relevance

/linux/drivers/clk/mvebu/
H A Dap-cpu-clk.c140 const struct cpu_dfs_regs *pll_regs; member
150 cpu_clkdiv_reg = clk->pll_regs->divider_reg + in ap_cpu_clk_recalc_rate()
151 (clk->cluster * clk->pll_regs->cluster_offset); in ap_cpu_clk_recalc_rate()
153 cpu_clkdiv_ratio &= clk->pll_regs->divider_mask; in ap_cpu_clk_recalc_rate()
154 cpu_clkdiv_ratio >>= clk->pll_regs->divider_offset; in ap_cpu_clk_recalc_rate()
166 cpu_clkdiv_reg = clk->pll_regs->divider_reg + in ap_cpu_clk_set_rate()
167 (clk->cluster * clk->pll_regs->cluster_offset); in ap_cpu_clk_set_rate()
168 cpu_force_reg = clk->pll_regs->force_reg + in ap_cpu_clk_set_rate()
169 (clk->cluster * clk->pll_regs->cluster_offset); in ap_cpu_clk_set_rate()
170 cpu_ratio_reg = clk->pll_regs->ratio_reg + in ap_cpu_clk_set_rate()
[all …]
/linux/sound/soc/codecs/
H A Dadau17x1.c78 adau->pll_regs[5] = 1; in adau17x1_pll_event()
80 adau->pll_regs[5] = 0; in adau17x1_pll_event()
89 adau->pll_regs, ARRAY_SIZE(adau->pll_regs)); in adau17x1_pll_event()
368 ret = adau_calc_pll_cfg(freq_in, freq_out, adau->pll_regs); in adau17x1_set_dai_pll()
374 adau->pll_regs, ARRAY_SIZE(adau->pll_regs)); in adau17x1_set_dai_pll()
1076 adau->pll_regs); in adau17x1_probe()
H A Dadau1373.c1256 uint8_t pll_regs[5]; in adau1373_set_pll() local
1298 ret = adau_calc_pll_cfg(freq_in, freq_out, pll_regs); in adau1373_set_pll()
1314 regmap_write(adau1373->regmap, ADAU1373_PLL_CTRL1(pll_id), pll_regs[0]); in adau1373_set_pll()
1315 regmap_write(adau1373->regmap, ADAU1373_PLL_CTRL2(pll_id), pll_regs[1]); in adau1373_set_pll()
1316 regmap_write(adau1373->regmap, ADAU1373_PLL_CTRL3(pll_id), pll_regs[2]); in adau1373_set_pll()
1317 regmap_write(adau1373->regmap, ADAU1373_PLL_CTRL4(pll_id), pll_regs[3]); in adau1373_set_pll()
1318 regmap_write(adau1373->regmap, ADAU1373_PLL_CTRL5(pll_id), pll_regs[4]); in adau1373_set_pll()
H A Dadau17x1.h46 uint8_t pll_regs[6]; member
/linux/Documentation/devicetree/bindings/sound/
H A Dmvebu-audio.txt15 (named "pll_regs") and the second one ("soc_ctrl") - for register
/linux/drivers/clk/sunxi-ng/
H A Dccu-sun50i-h616.c1070 static const u32 pll_regs[] = { variable
1109 for (i = 0; i < ARRAY_SIZE(pll_regs); i++) { in sun50i_h616_ccu_probe()
1110 val = readl(reg + pll_regs[i]); in sun50i_h616_ccu_probe()
1112 writel(val, reg + pll_regs[i]); in sun50i_h616_ccu_probe()
H A Dccu-sun50i-h6.c1160 static const u32 pll_regs[] = { variable
1216 for (i = 0; i < ARRAY_SIZE(pll_regs); i++) { in sun50i_h6_ccu_probe()
1217 val = readl(reg + pll_regs[i]); in sun50i_h6_ccu_probe()
1219 writel(val, reg + pll_regs[i]); in sun50i_h6_ccu_probe()
H A Dccu-sun20i-d1.c1316 static const u32 pll_regs[] = { variable
1350 for (i = 0; i < ARRAY_SIZE(pll_regs); i++) { in sun20i_d1_ccu_probe()
1351 val = readl(reg + pll_regs[i]); in sun20i_d1_ccu_probe()
1353 writel(val, reg + pll_regs[i]); in sun20i_d1_ccu_probe()
/linux/drivers/media/i2c/
H A Dov2659.c936 struct sensor_register pll_regs[] = { in ov2659_set_pixel_clock() local
945 return ov2659_write_array(client, pll_regs); in ov2659_set_pixel_clock()
/linux/drivers/video/fbdev/aty/
H A Datyfb_base.c3074 u8 pll_regs[16]; in atyfb_setup_sparc() local
3094 pll_regs[i] = aty_ld_pll_ct(i, par); in atyfb_setup_sparc()
3099 M = pll_regs[PLL_REF_DIV]; in atyfb_setup_sparc()
3104 N = pll_regs[VCLK0_FB_DIV + (clock_cntl & 3)]; in atyfb_setup_sparc()
3109 P = aty_postdividers[((pll_regs[VCLK_POST_DIV] >> ((clock_cntl & 3) << 1)) & 3) | in atyfb_setup_sparc()
3110 ((pll_regs[PLL_EXT_CNTL] >> (2 + (clock_cntl & 3))) & 4)]; in atyfb_setup_sparc()
/linux/arch/arm/boot/dts/marvell/
H A Darmada-38x.dtsi639 reg-names = "i2s_regs", "pll_regs", "soc_ctrl";