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Searched refs:pll_a (Results 1 – 25 of 25) sorted by relevance

/linux/drivers/gpu/drm/i915/display/
H A Ddvo_ns2501.c210 u8 pll_a; /* PLL configuration, register A, 1B */ member
237 .pll_a = 17,
257 .pll_a = 25,
276 .pll_a = 11,
614 ns2501_writeb(dvo, NS2501_REG1B, conf->pll_a); in ns2501_mode_set()
/linux/arch/arm/boot/dts/nvidia/
H A Dtegra20-plutux.dts60 clock-names = "pll_a", "pll_a_out0", "mclk";
H A Dtegra20-tec.dts69 clock-names = "pll_a", "pll_a_out0", "mclk";
H A Dtegra20-medcom-wide.dts95 clock-names = "pll_a", "pll_a_out0", "mclk";
H A Dtegra20-trimslice.dts495 clock-names = "pll_a", "pll_a_out0", "mclk";
H A Dtegra30-cardhu.dtsi671 clock-names = "pll_a", "pll_a_out0", "mclk";
H A Dtegra20-ventana.dts722 clock-names = "pll_a", "pll_a_out0", "mclk";
H A Dtegra20-harmony.dts761 clock-names = "pll_a", "pll_a_out0", "mclk";
H A Dtegra20-colibri.dtsi776 clock-names = "pll_a", "pll_a_out0", "mclk";
H A Dtegra20-seaboard.dts920 clock-names = "pll_a", "pll_a_out0", "mclk";
H A Dtegra30-colibri.dtsi1057 clock-names = "pll_a", "pll_a_out0", "mclk";
H A Dtegra114-dalmore.dts1281 clock-names = "pll_a", "pll_a_out0", "mclk";
H A Dtegra124-venice2.dts1249 clock-names = "pll_a", "pll_a_out0", "mclk";
H A Dtegra30-apalis.dtsi1179 clock-names = "pll_a", "pll_a_out0", "mclk";
H A Dtegra30-apalis-v1.1.dtsi1196 clock-names = "pll_a", "pll_a_out0", "mclk";
H A Dtegra30-asus-nexus7-grouper-common.dtsi1228 clock-names = "pll_a", "pll_a_out0", "mclk";
H A Dtegra20-acer-a500-picasso.dts1437 clock-names = "pll_a", "pll_a_out0", "mclk";
H A Dtegra30-asus-transformer-common.dtsi1685 clock-names = "pll_a", "pll_a_out0", "mclk";
H A Dtegra114-asus-tf701t.dts1828 clock-names = "pll_a", "pll_a_out0", "mclk";
H A Dtegra124-jetson-tk1.dts2044 clock-names = "pll_a", "pll_a_out0", "mclk";
H A Dtegra30-beaver.dts2132 clock-names = "pll_a", "pll_a_out0", "mclk";
H A Dtegra30-asus-p1801-t.dts1993 clock-names = "pll_a", "pll_a_out0", "mclk";
H A Dtegra124-apalis-v1.2.dtsi2039 clock-names = "pll_a", "pll_a_out0", "mclk";
H A Dtegra124-apalis.dtsi2031 clock-names = "pll_a", "pll_a_out0", "mclk";
H A Dtegra30-pegatron-chagall.dts2782 clock-names = "pll_a", "pll_a_out0", "mclk";