/linux/drivers/clk/tegra/ |
H A D | clk-tegra124.c | 153 { .pdiv = 1, .hw_val = 0 }, 154 { .pdiv = 2, .hw_val = 1 }, 155 { .pdiv = 3, .hw_val = 2 }, 156 { .pdiv = 4, .hw_val = 3 }, 157 { .pdiv = 5, .hw_val = 4 }, 158 { .pdiv = 6, .hw_val = 5 }, 159 { .pdiv = 8, .hw_val = 6 }, 160 { .pdiv = 10, .hw_val = 7 }, 161 { .pdiv = 12, .hw_val = 8 }, 162 { .pdiv = 16, .hw_val = 9 }, [all …]
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H A D | clk-tegra114.c | 149 { .pdiv = 1, .hw_val = 0 }, 150 { .pdiv = 2, .hw_val = 1 }, 151 { .pdiv = 3, .hw_val = 2 }, 152 { .pdiv = 4, .hw_val = 3 }, 153 { .pdiv = 5, .hw_val = 4 }, 154 { .pdiv = 6, .hw_val = 5 }, 155 { .pdiv = 8, .hw_val = 6 }, 156 { .pdiv = 10, .hw_val = 7 }, 157 { .pdiv = 12, .hw_val = 8 }, 158 { .pdiv = 16, .hw_val = 9 }, [all …]
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H A D | clk-tegra210.c | 1465 pllx->params->pdiv_tohw[cfg->p].pdiv / 1000); in tegra210_pllx_dyn_ramp() 1486 u32 pdiv; in tegra210_pll_fixed_mdiv_cfg() local 1493 p = params->round_p_to_pdiv(p, &pdiv); in tegra210_pll_fixed_mdiv_cfg() 1580 { .pdiv = 1, .hw_val = 0 }, 1581 { .pdiv = 2, .hw_val = 1 }, 1582 { .pdiv = 3, .hw_val = 2 }, 1583 { .pdiv = 4, .hw_val = 3 }, 1584 { .pdiv = 5, .hw_val = 4 }, 1585 { .pdiv = 6, .hw_val = 5 }, 1586 { .pdiv = 8, .hw_val = 6 }, [all …]
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H A D | clk-pll.c | 486 while (p_tohw->pdiv) { in _p_div_to_hw() 487 if (p_div <= p_tohw->pdiv) in _p_div_to_hw() 507 while (p_tohw->pdiv) { in _hw_to_p_div() 509 return p_tohw->pdiv; in _hw_to_p_div() 870 int pdiv; in clk_pll_recalc_rate() local 893 pdiv = 1; in clk_pll_recalc_rate() 895 pdiv = _hw_to_p_div(hw, cfg.p); in clk_pll_recalc_rate() 896 if (pdiv < 0) { in clk_pll_recalc_rate() 899 pdiv = 1; in clk_pll_recalc_rate() 906 cfg.m *= pdiv; in clk_pll_recalc_rate() [all …]
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H A D | clk-tegra30.c | 272 { .pdiv = 1, .hw_val = 1 }, 273 { .pdiv = 2, .hw_val = 0 }, 274 { .pdiv = 0, .hw_val = 0 }, 339 { .pdiv = 18, .hw_val = 18 }, 340 { .pdiv = 24, .hw_val = 24 }, 341 { .pdiv = 0, .hw_val = 0 },
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H A D | clk-tegra20.c | 267 { .pdiv = 1, .hw_val = 1 }, 268 { .pdiv = 0, .hw_val = 0 }, 360 { .pdiv = 1, .hw_val = 1 }, 361 { .pdiv = 2, .hw_val = 0 }, 362 { .pdiv = 0, .hw_val = 0 },
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/linux/drivers/clk/samsung/ |
H A D | clk-pll.c | 153 u32 pll_con, mdiv, pdiv, sdiv; in samsung_pll2126_recalc_rate() local 158 pdiv = (pll_con >> PLL2126_PDIV_SHIFT) & PLL2126_PDIV_MASK; in samsung_pll2126_recalc_rate() 162 do_div(fvco, (pdiv + 2) << sdiv); in samsung_pll2126_recalc_rate() 186 u32 pll_con, mdiv, pdiv, sdiv; in samsung_pll3000_recalc_rate() local 191 pdiv = (pll_con >> PLL3000_PDIV_SHIFT) & PLL3000_PDIV_MASK; in samsung_pll3000_recalc_rate() 195 do_div(fvco, pdiv << sdiv); in samsung_pll3000_recalc_rate() 224 u32 mdiv, pdiv, sdiv, pll_con; in samsung_pll35xx_recalc_rate() local 229 pdiv = (pll_con >> PLL35XX_PDIV_SHIFT) & PLL35XX_PDIV_MASK; in samsung_pll35xx_recalc_rate() 233 do_div(fvco, (pdiv << sdiv)); in samsung_pll35xx_recalc_rate() 246 return (rate->mdiv != old_mdiv || rate->pdiv != old_pdiv); in samsung_pll35xx_mp_change() [all …]
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/linux/drivers/clk/ |
H A D | clk-cdce925.c | 54 u16 pdiv; /* 1..127 for Y2-Y9; 1..1023 for Y1 */ member 274 static void cdce925_clk_set_pdiv(struct clk_cdce925_output *data, u16 pdiv) in cdce925_clk_set_pdiv() argument 280 0x03, (pdiv >> 8) & 0x03); in cdce925_clk_set_pdiv() 281 regmap_write(data->chip->regmap, 0x03, pdiv & 0xFF); in cdce925_clk_set_pdiv() 284 regmap_update_bits(data->chip->regmap, 0x16, 0x7F, pdiv); in cdce925_clk_set_pdiv() 287 regmap_update_bits(data->chip->regmap, 0x17, 0x7F, pdiv); in cdce925_clk_set_pdiv() 290 regmap_update_bits(data->chip->regmap, 0x26, 0x7F, pdiv); in cdce925_clk_set_pdiv() 293 regmap_update_bits(data->chip->regmap, 0x27, 0x7F, pdiv); in cdce925_clk_set_pdiv() 296 regmap_update_bits(data->chip->regmap, 0x36, 0x7F, pdiv); in cdce925_clk_set_pdiv() 299 regmap_update_bits(data->chip->regmap, 0x37, 0x7F, pdiv); in cdce925_clk_set_pdiv() [all …]
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/linux/drivers/clk/bcm/ |
H A D | clk-iproc-pll.c | 104 vco_out->pdiv = 1; in pll_calc_param() 282 unsigned int pdiv; in pll_fractional_change_only() local 296 val = readl(pll->control_base + ctrl->pdiv.offset); in pll_fractional_change_only() 297 pdiv = (val >> ctrl->pdiv.shift) & bit_mask(ctrl->pdiv.width); in pll_fractional_change_only() 299 if (pdiv != vco->pdiv) in pll_fractional_change_only() 321 if (vco->pdiv == 0) in pll_set_rate() 324 ref_freq = parent_rate / vco->pdiv; in pll_set_rate() 411 val = readl(pll->control_base + ctrl->pdiv.offset); in pll_set_rate() 412 val &= ~(bit_mask(ctrl->pdiv.width) << ctrl->pdiv.shift); in pll_set_rate() 413 val |= vco->pdiv << ctrl->pdiv.shift; in pll_set_rate() [all …]
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H A D | clk-iproc-armpll.c | 192 unsigned int pdiv; in iproc_arm_pll_recalc_rate() local 208 pdiv = (val >> IPROC_CLK_PLLARMA_PDIV_SHIFT) & in iproc_arm_pll_recalc_rate() 210 if (pdiv == 0) in iproc_arm_pll_recalc_rate() 211 pdiv = 16; in iproc_arm_pll_recalc_rate() 220 pll->rate = (pll->rate / pdiv) / mdiv; in iproc_arm_pll_recalc_rate() 225 (unsigned int)(ndiv >> 20), pdiv, mdiv); in iproc_arm_pll_recalc_rate()
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H A D | clk-sr.c | 43 .pdiv = REG_VAL(0x14, 0, 4), 103 .pdiv = REG_VAL(0x14, 0, 4), 162 .pdiv = REG_VAL(0x14, 0, 4), 197 .pdiv = REG_VAL(0x14, 0, 4), 251 .pdiv = REG_VAL(0x14, 0, 4), 287 .pdiv = REG_VAL(0x4, 26, 4), 332 .pdiv = REG_VAL(0x4, 26, 4), 371 .pdiv = REG_VAL(0x4, 26, 4),
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H A D | clk-ns2.c | 37 .pdiv = REG_VAL(0x8, 0, 4), 100 .pdiv = REG_VAL(0x8, 0, 4), 162 .pdiv = REG_VAL(0x8, 0, 4), 224 .pdiv = REG_VAL(0x8, 0, 4),
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H A D | clk-cygnus.c | 56 .pdiv = REG_VAL(0x14, 0, 4), 114 .pdiv = REG_VAL(0x4, 26, 4), 192 .pdiv = REG_VAL(0x14, 0, 4), 271 .pdiv = REG_VAL(0x44, 0, 4),
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H A D | clk-iproc.h | 88 unsigned int pdiv; member 164 struct iproc_clk_reg_op pdiv; member
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H A D | clk-nsp.c | 42 .pdiv = REG_VAL(0x18, 24, 3), 99 .pdiv = REG_VAL(0x4, 28, 3),
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H A D | clk-bcm2835.c | 561 u32 ndiv, u32 fdiv, u32 pdiv) in bcm2835_pll_rate_from_divisors() argument 565 if (pdiv == 0) in bcm2835_pll_rate_from_divisors() 569 do_div(rate, pdiv); in bcm2835_pll_rate_from_divisors() 594 u32 ndiv, pdiv, fdiv; in bcm2835_pll_get_rate() local 602 pdiv = (a2wctrl & A2W_PLL_CTRL_PDIV_MASK) >> A2W_PLL_CTRL_PDIV_SHIFT; in bcm2835_pll_get_rate() 611 return bcm2835_pll_rate_from_divisors(parent_rate, ndiv, fdiv, pdiv); in bcm2835_pll_get_rate()
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/linux/drivers/thermal/tegra/ |
H A D | tegra124-soctherm.c | 51 .pdiv = 8, 70 .pdiv = 8, 89 .pdiv = 8, 106 .pdiv = 8,
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H A D | tegra132-soctherm.c | 51 .pdiv = 8, 70 .pdiv = 8, 89 .pdiv = 8, 106 .pdiv = 8,
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H A D | tegra210-soctherm.c | 52 .pdiv = 8, 71 .pdiv = 8, 90 .pdiv = 8, 107 .pdiv = 8,
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H A D | soctherm.h | 77 u32 pdiv, pdiv_ate, pdiv_mask; member 89 u32 tall, tiddq_en, ten_count, pdiv, pdiv_ate, tsample, tsample_ate; member
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H A D | soctherm-fuse.c | 134 mult = sensor_group->pdiv * sensor->config->tsample_ate; in tegra_calc_tsensor_calib()
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/linux/drivers/gpu/drm/i915/display/ |
H A D | intel_dpll_mgr.c | 1591 u32 pdiv; member 1616 params->pdiv = 0; in skl_wrpll_params_populate() 1619 params->pdiv = 1; in skl_wrpll_params_populate() 1622 params->pdiv = 2; in skl_wrpll_params_populate() 1625 params->pdiv = 4; in skl_wrpll_params_populate() 1836 DPLL_CFGCR2_PDIV(wrpll_params.pdiv) | in skl_ddi_hdmi_pll_dividers() 2512 static void icl_wrpll_get_multipliers(int bestdiv, int *pdiv, in icl_wrpll_get_multipliers() argument 2518 *pdiv = 2; in icl_wrpll_get_multipliers() 2522 *pdiv = 2; in icl_wrpll_get_multipliers() 2526 *pdiv = 3; in icl_wrpll_get_multipliers() [all …]
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/linux/drivers/clk/st/ |
H A D | clk-flexgen.c | 39 struct clk_divider pdiv; member 143 struct clk_hw *pdiv_hw = &flexgen->pdiv.hw; in flexgen_recalc_rate() 159 struct clk_hw *pdiv_hw = &flexgen->pdiv.hw; in flexgen_set_rate() 244 fgxbar->pdiv.lock = lock; in clk_register_flexgen() 245 fgxbar->pdiv.reg = reg + 0x58 + idx * 4; in clk_register_flexgen() 246 fgxbar->pdiv.width = 10; in clk_register_flexgen()
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/linux/drivers/clk/imx/ |
H A D | clk.h | 59 unsigned int pdiv; member 267 .pdiv = (_p), \ 275 .pdiv = (_p), \
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/linux/drivers/net/wireless/broadcom/b43/ |
H A D | phy_lp.c | 550 lpphy->pdiv = 1; in lpphy_2062_init() 553 lpphy->pdiv = 2; in lpphy_2062_init() 557 tmp = (((800000000 * lpphy->pdiv + crystalfreq) / in lpphy_2062_init() 561 tmp = (((100 * crystalfreq + 16000000 * lpphy->pdiv) / in lpphy_2062_init() 562 (32000000 * lpphy->pdiv)) - 1) & 0xFF; in lpphy_2062_init() 565 tmp = (((2 * crystalfreq + 1000000 * lpphy->pdiv) / in lpphy_2062_init() 566 (2000000 * lpphy->pdiv)) - 1) & 0xFF; in lpphy_2062_init() 569 ref = (1000 * lpphy->pdiv + 2 * crystalfreq) / (2000 * lpphy->pdiv); in lpphy_2062_init() 2418 tmp2 = lpphy->pdiv * 1000; in lpphy_b2062_tune()
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