Lines Matching refs:pdiv
54 u16 pdiv; /* 1..127 for Y2-Y9; 1..1023 for Y1 */ member
274 static void cdce925_clk_set_pdiv(struct clk_cdce925_output *data, u16 pdiv) in cdce925_clk_set_pdiv() argument
280 0x03, (pdiv >> 8) & 0x03); in cdce925_clk_set_pdiv()
281 regmap_write(data->chip->regmap, 0x03, pdiv & 0xFF); in cdce925_clk_set_pdiv()
284 regmap_update_bits(data->chip->regmap, 0x16, 0x7F, pdiv); in cdce925_clk_set_pdiv()
287 regmap_update_bits(data->chip->regmap, 0x17, 0x7F, pdiv); in cdce925_clk_set_pdiv()
290 regmap_update_bits(data->chip->regmap, 0x26, 0x7F, pdiv); in cdce925_clk_set_pdiv()
293 regmap_update_bits(data->chip->regmap, 0x27, 0x7F, pdiv); in cdce925_clk_set_pdiv()
296 regmap_update_bits(data->chip->regmap, 0x36, 0x7F, pdiv); in cdce925_clk_set_pdiv()
299 regmap_update_bits(data->chip->regmap, 0x37, 0x7F, pdiv); in cdce925_clk_set_pdiv()
302 regmap_update_bits(data->chip->regmap, 0x46, 0x7F, pdiv); in cdce925_clk_set_pdiv()
305 regmap_update_bits(data->chip->regmap, 0x47, 0x7F, pdiv); in cdce925_clk_set_pdiv()
340 cdce925_clk_set_pdiv(data, data->pdiv); in cdce925_clk_prepare()
358 if (data->pdiv) in cdce925_clk_recalc_rate()
359 return parent_rate / data->pdiv; in cdce925_clk_recalc_rate()
445 data->pdiv = cdce925_calc_divider(rate, parent_rate); in cdce925_clk_set_rate()
492 data->pdiv = cdce925_y1_calc_divider(rate, parent_rate); in cdce925_clk_y1_set_rate()
731 data->clk[0].pdiv = 1; in cdce925_probe()
753 data->clk[i].pdiv = 1; in cdce925_probe()