/linux/drivers/clk/ingenic/ |
H A D | jz4755-cgu.c | 53 .parents = { JZ4755_CLK_EXT, }, 78 .parents = { JZ4755_CLK_PLL, }, 87 .parents = { JZ4755_CLK_EXT, }, 96 .parents = { JZ4755_CLK_PLL, }, 105 .parents = { JZ4755_CLK_PLL, }, 114 .parents = { JZ4755_CLK_PLL, }, 123 .parents = { JZ4755_CLK_PLL, }, 132 .parents = { JZ4755_CLK_PLL, }, 141 .parents = { JZ4755_CLK_EXT_HALF, JZ4755_CLK_PLL_HALF, }, 149 .parents = { JZ4755_CLK_PLL_HALF, }, [all …]
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H A D | jz4780-cgu.c | 294 .parents = { JZ4780_CLK_EXCLK, -1, -1, -1 }, 300 .parents = { JZ4780_CLK_EXCLK, -1, -1, -1 }, 306 .parents = { JZ4780_CLK_EXCLK, -1, -1, -1 }, 312 .parents = { JZ4780_CLK_EXCLK, -1, -1, -1 }, 322 .parents = { -1, -1, JZ4780_CLK_EXCLK, -1 }, 330 .parents = { -1, JZ4780_CLK_APLL, JZ4780_CLK_EXCLK, 337 .parents = { -1, JZ4780_CLK_SCLKA, JZ4780_CLK_MPLL, 349 .parents = { JZ4780_CLK_CPUMUX, -1, -1, -1 }, 360 .parents = { JZ4780_CLK_CPUMUX, -1, -1, -1 }, 366 .parents = { -1, JZ4780_CLK_SCLKA, JZ4780_CLK_MPLL, [all …]
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H A D | jz4760-cgu.c | 94 .parents = { JZ4760_CLK_EXT }, 119 .parents = { JZ4760_CLK_EXT }, 149 .parents = { JZ4760_CLK_PLL0, }, 157 .parents = { JZ4760_CLK_PLL0, }, 165 .parents = { JZ4760_CLK_PLL0, }, 173 .parents = { JZ4760_CLK_PLL0, }, 186 .parents = { JZ4760_CLK_PLL0, }, 194 .parents = { JZ4760_CLK_PLL0, }, 205 .parents = { JZ4760_CLK_PLL0 }, 216 .parents = { JZ4760_CLK_PLL0_HALF, JZ4760_CLK_PLL1, }, [all …]
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H A D | jz4770-cgu.c | 104 .parents = { JZ4770_CLK_EXT }, 128 .parents = { JZ4770_CLK_EXT }, 157 .parents = { JZ4770_CLK_PLL0, }, 165 .parents = { JZ4770_CLK_PLL0, }, 173 .parents = { JZ4770_CLK_PLL0, }, 182 .parents = { JZ4770_CLK_PLL0, }, 190 .parents = { JZ4770_CLK_PLL0, }, 199 .parents = { JZ4770_CLK_PLL0, }, 210 .parents = { JZ4770_CLK_PLL0, JZ4770_CLK_PLL1, }, 217 .parents = { JZ4770_CLK_PLL0, JZ4770_CLK_PLL1, }, [all …]
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H A D | x1830-cgu.c | 114 .parents = { X1830_CLK_EXCLK, -1, -1, -1 }, 137 .parents = { X1830_CLK_EXCLK, -1, -1, -1 }, 160 .parents = { X1830_CLK_EXCLK, -1, -1, -1 }, 183 .parents = { X1830_CLK_EXCLK, -1, -1, -1 }, 208 .parents = { X1830_CLK_EXCLK, -1, -1, -1 }, 216 .parents = { -1, X1830_CLK_EXCLK, X1830_CLK_APLL, -1 }, 222 .parents = { -1, X1830_CLK_SCLKA, X1830_CLK_MPLL, -1 }, 229 .parents = { X1830_CLK_CPUMUX, -1, -1, -1 }, 241 .parents = { X1830_CLK_CPUMUX, -1, -1, -1 }, 247 .parents = { -1, X1830_CLK_SCLKA, X1830_CLK_MPLL, -1 }, [all …]
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H A D | jz4725b-cgu.c | 56 .parents = { JZ4725B_CLK_EXT, -1, -1, -1 }, 81 .parents = { JZ4725B_CLK_PLL, -1, -1, -1 }, 95 .parents = { JZ4725B_CLK_PLL, -1, -1, -1 }, 104 .parents = { JZ4725B_CLK_PLL, -1, -1, -1 }, 113 .parents = { JZ4725B_CLK_PLL, -1, -1, -1 }, 127 .parents = { JZ4725B_CLK_PLL, -1, -1, -1 }, 136 .parents = { JZ4725B_CLK_PLL, -1, -1, -1 }, 146 .parents = { JZ4725B_CLK_PLL_HALF, -1, -1, -1 }, 153 .parents = { JZ4725B_CLK_EXT, JZ4725B_CLK_PLL_HALF, -1, -1 }, 160 .parents = { JZ4725B_CLK_EXT, JZ4725B_CLK_PLL, -1, -1 }, [all …]
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H A D | x1000-cgu.c | 219 .parents = { X1000_CLK_EXCLK }, 242 .parents = { X1000_CLK_EXCLK }, 267 .parents = { -1, -1, X1000_CLK_EXCLK, -1 }, 275 .parents = { -1, X1000_CLK_EXCLK, X1000_CLK_APLL, -1 }, 281 .parents = { -1, X1000_CLK_SCLKA, X1000_CLK_MPLL, -1 }, 292 .parents = { X1000_CLK_CPUMUX }, 304 .parents = { X1000_CLK_CPUMUX }, 310 .parents = { -1, X1000_CLK_SCLKA, X1000_CLK_MPLL, -1 }, 317 .parents = { -1, X1000_CLK_SCLKA, X1000_CLK_MPLL, -1 }, 323 .parents = { X1000_CLK_AHB2PMUX }, [all …]
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H A D | jz4740-cgu.c | 71 .parents = { JZ4740_CLK_EXT, -1, -1, -1 }, 96 .parents = { JZ4740_CLK_PLL, -1, -1, -1 }, 110 .parents = { JZ4740_CLK_PLL, -1, -1, -1 }, 119 .parents = { JZ4740_CLK_PLL, -1, -1, -1 }, 128 .parents = { JZ4740_CLK_PLL, -1, -1, -1 }, 142 .parents = { JZ4740_CLK_PLL, -1, -1, -1 }, 151 .parents = { JZ4740_CLK_PLL_HALF, -1, -1, -1 }, 161 .parents = { JZ4740_CLK_PLL_HALF, -1, -1, -1 }, 167 .parents = { JZ4740_CLK_EXT, JZ4740_CLK_PLL_HALF, -1, -1 }, 175 .parents = { JZ4740_CLK_EXT, JZ4740_CLK_PLL, -1, -1 }, [all …]
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/linux/drivers/clk/st/ |
H A D | clkgen-mux.c | 21 const char **parents; in clkgen_mux_get_parents() local 28 parents = kcalloc(nparents, sizeof(const char *), GFP_KERNEL); in clkgen_mux_get_parents() 29 if (!parents) in clkgen_mux_get_parents() 32 *num_parents = of_clk_parent_fill(np, parents, nparents); in clkgen_mux_get_parents() 33 return parents; in clkgen_mux_get_parents() 57 const char **parents; in st_of_clkgen_mux_setup() local 76 parents = clkgen_mux_get_parents(np, &num_parents); in st_of_clkgen_mux_setup() 77 if (IS_ERR(parents)) { in st_of_clkgen_mux_setup() 79 __func__, PTR_ERR(parents)); in st_of_clkgen_mux_setup() 83 clk = clk_register_mux(NULL, np->name, parents, num_parents, in st_of_clkgen_mux_setup() [all …]
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/linux/drivers/clk/starfive/ |
H A D | clk-starfive-jh71x0.h | 29 u8 parents[4]; member 37 .parents = { [0] = _parent }, \ 45 .parents = { [0] = _parent }, \ 53 .parents = { [0] = _parent }, \ 61 .parents = { [0] = _parent }, \ 69 .parents = { __VA_ARGS__ }, \ 78 .parents = { __VA_ARGS__ }, \ 86 .parents = { __VA_ARGS__ }, \ 95 .parents = { __VA_ARGS__ }, \ 103 .parents = { [0] = _parent }, \
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H A D | clk-starfive-jh7110-aon.c | 88 struct clk_parent_data parents[4] = {}; in jh7110_aoncrg_probe() local 92 .parent_data = parents, in jh7110_aoncrg_probe() 101 unsigned int pidx = jh7110_aonclk_data[idx].parents[i]; in jh7110_aoncrg_probe() 104 parents[i].hw = &priv->reg[pidx].hw; in jh7110_aoncrg_probe() 106 parents[i].fw_name = "osc"; in jh7110_aoncrg_probe() 108 parents[i].fw_name = "gmac0_rmii_refin"; in jh7110_aoncrg_probe() 110 parents[i].fw_name = "gmac0_rgmii_rxin"; in jh7110_aoncrg_probe() 112 parents[i].fw_name = "stg_axiahb"; in jh7110_aoncrg_probe() 114 parents[i].fw_name = "apb_bus"; in jh7110_aoncrg_probe() 116 parents[i].fw_name = "gmac0_gtxclk"; in jh7110_aoncrg_probe() [all …]
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H A D | clk-starfive-jh7110-sys.c | 475 struct clk_parent_data parents[4] = {}; in jh7110_syscrg_probe() local 479 .parent_data = parents, in jh7110_syscrg_probe() 488 unsigned int pidx = jh7110_sysclk_data[idx].parents[i]; in jh7110_syscrg_probe() 491 parents[i].hw = &priv->reg[pidx].hw; in jh7110_syscrg_probe() 493 parents[i].fw_name = "osc"; in jh7110_syscrg_probe() 495 parents[i].fw_name = "gmac1_rmii_refin"; in jh7110_syscrg_probe() 497 parents[i].fw_name = "gmac1_rgmii_rxin"; in jh7110_syscrg_probe() 499 parents[i].fw_name = "i2stx_bclk_ext"; in jh7110_syscrg_probe() 501 parents[i].fw_name = "i2stx_lrck_ext"; in jh7110_syscrg_probe() 503 parents[i].fw_name = "i2srx_bclk_ext"; in jh7110_syscrg_probe() [all …]
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H A D | clk-starfive-jh7100-audio.c | 116 struct clk_parent_data parents[4] = {}; in jh7100_audclk_probe() local 120 .parent_data = parents, in jh7100_audclk_probe() 128 unsigned int pidx = jh7100_audclk_data[idx].parents[i]; in jh7100_audclk_probe() 131 parents[i].hw = &priv->reg[pidx].hw; in jh7100_audclk_probe() 133 parents[i].fw_name = "audio_src"; in jh7100_audclk_probe() 135 parents[i].fw_name = "audio_12288"; in jh7100_audclk_probe() 137 parents[i].fw_name = "dom7ahb_bus"; in jh7100_audclk_probe()
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/linux/drivers/clk/zynqmp/ |
H A D | clkc.c | 99 u32 parents[CLK_GET_PARENTS_RESP_WORDS]; member 123 const char * const *parents, 311 const char * const *parents, in zynqmp_clk_register_fixed_factor() argument 335 parents[0], in zynqmp_clk_register_fixed_factor() 476 static int __zynqmp_clock_get_parents(struct clock_parent *parents, in __zynqmp_clock_get_parents() argument 483 for (i = 0; i < ARRAY_SIZE(response->parents); i++) { in __zynqmp_clock_get_parents() 484 if (response->parents[i] == NA_PARENT) in __zynqmp_clock_get_parents() 487 parent = &parents[i]; in __zynqmp_clock_get_parents() 488 parent->id = FIELD_GET(CLK_PARENTS_ID, response->parents[i]); in __zynqmp_clock_get_parents() 489 if (response->parents[i] == DUMMY_PARENT) { in __zynqmp_clock_get_parents() [all …]
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H A D | clk-zynqmp.h | 71 const char * const *parents, 76 const char * const *parents, 82 const char * const *parents, 87 const char * const *parents, 93 const char * const *parents,
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/linux/drivers/clk/sunxi/ |
H A D | clk-sun8i-mbus.c | 27 const char **parents; in sun8i_a23_mbus_setup() local 37 parents = kcalloc(num_parents, sizeof(*parents), GFP_KERNEL); in sun8i_a23_mbus_setup() 38 if (!parents) in sun8i_a23_mbus_setup() 60 of_clk_parent_fill(node, parents, num_parents); in sun8i_a23_mbus_setup() 77 clk = clk_register_composite(NULL, clk_name, parents, num_parents, in sun8i_a23_mbus_setup() 89 kfree(parents); /* parents is deep copied */ in sun8i_a23_mbus_setup() 107 kfree(parents); in sun8i_a23_mbus_setup()
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H A D | clk-sun4i-display.c | 19 u8 parents; member 104 const char *parents[4]; in sun4i_a10_display_init() local 123 ret = of_clk_parent_fill(node, parents, data->parents); in sun4i_a10_display_init() 124 if (ret != data->parents) { in sun4i_a10_display_init() 158 parents, data->parents, in sun4i_a10_display_init() 224 .parents = 4, 242 .parents = 3,
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/linux/drivers/clk/tegra/ |
H A D | clk-bpmp.c | 23 unsigned int parents[MRQ_CLK_MAX_PARENTS]; member 35 unsigned int *parents; member 208 request.parent_id = clk->parents[index]; in tegra_bpmp_clk_set_parent() 249 if (clk->parents[i] == response.parent_id) in tegra_bpmp_clk_get_parent() 374 info->parents[i] = response.parents[i]; in tegra_bpmp_clk_get_info() 418 dev_printk(level, bpmp->dev, " %03u\n", info->parents[i]); in tegra_bpmp_clk_info_dump() 509 const char **parents; in tegra_bpmp_clk_register() local 520 clk->parents = devm_kcalloc(bpmp->dev, info->num_parents, in tegra_bpmp_clk_register() 521 sizeof(*clk->parents), GFP_KERNEL); in tegra_bpmp_clk_register() 522 if (!clk->parents) in tegra_bpmp_clk_register() [all …]
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/linux/drivers/clk/imx/ |
H A D | clk.h | 148 #define imx_clk_mux(name, reg, shift, width, parents, num_parents) \ argument 149 to_clk(imx_clk_hw_mux(name, reg, shift, width, parents, num_parents)) 151 #define imx_clk_mux_flags(name, reg, shift, width, parents, num_parents, flags) \ argument 152 to_clk(imx_clk_hw_mux_flags(name, reg, shift, width, parents, num_parents, flags)) 154 #define imx_clk_mux2_flags(name, reg, shift, width, parents, num_parents, flags) \ argument 155 to_clk(imx_clk_hw_mux2_flags(name, reg, shift, width, parents, num_parents, flags)) 199 #define imx_clk_hw_mux2(name, reg, shift, width, parents, num_parents) \ argument 200 imx_clk_hw_mux2_flags(name, reg, shift, width, parents, num_parents, 0) 202 #define imx_clk_hw_mux(name, reg, shift, width, parents, num_parents) \ argument 203 __imx_clk_hw_mux(name, reg, shift, width, parents, num_parents, 0, 0) [all …]
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/linux/drivers/gpu/drm/sun4i/ |
H A D | sun8i_hdmi_phy_clk.c | 148 const char *parents[2]; in sun8i_phy_clk_create() local 150 parents[0] = __clk_get_name(phy->clk_pll0); in sun8i_phy_clk_create() 151 if (!parents[0]) in sun8i_phy_clk_create() 155 parents[1] = __clk_get_name(phy->clk_pll1); in sun8i_phy_clk_create() 156 if (!parents[1]) in sun8i_phy_clk_create() 166 init.parent_names = parents; in sun8i_phy_clk_create()
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H A D | sun4i_hdmi_tmds_clk.c | 207 const char *parents[2]; in sun4i_tmds_create() local 209 parents[0] = __clk_get_name(hdmi->pll0_clk); in sun4i_tmds_create() 210 if (!parents[0]) in sun4i_tmds_create() 213 parents[1] = __clk_get_name(hdmi->pll1_clk); in sun4i_tmds_create() 214 if (!parents[1]) in sun4i_tmds_create() 223 init.parent_names = parents; in sun4i_tmds_create()
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/linux/drivers/clk/x86/ |
H A D | clk-pmc-atom.c | 36 struct clk_plt_fixed **parents; member 237 plt_clk_unregister_fixed_rate(data->parents[i]); in plt_clk_unregister_fixed_rate_loop() 268 data->parents = devm_kcalloc(&pdev->dev, nparents, in plt_clk_register_parents() 269 sizeof(*data->parents), GFP_KERNEL); in plt_clk_register_parents() 270 if (!data->parents) in plt_clk_register_parents() 279 data->parents[i] = in plt_clk_register_parents() 283 if (IS_ERR(data->parents[i])) { in plt_clk_register_parents() 284 err = PTR_ERR(data->parents[i]); in plt_clk_register_parents()
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/linux/drivers/clk/nxp/ |
H A D | clk-lpc18xx-cgu.c | 534 const char *parents[CLK_SRC_MAX]; in lpc18xx_cgu_register_div() local 540 lpc18xx_fill_parent_names(parents, clk->mux.table, clk->n_parents); in lpc18xx_cgu_register_div() 542 return clk_register_composite(NULL, name, parents, clk->n_parents, in lpc18xx_cgu_register_div() 554 const char *parents[CLK_SRC_MAX]; in lpc18xx_register_base_clk() local 562 lpc18xx_fill_parent_names(parents, clk->mux.table, clk->n_parents); in lpc18xx_register_base_clk() 566 return clk_register_composite(NULL, name, parents, clk->n_parents, in lpc18xx_register_base_clk() 570 return clk_register_composite(NULL, name, parents, clk->n_parents, in lpc18xx_register_base_clk() 581 const char *parents[CLK_SRC_MAX]; in lpc18xx_cgu_register_pll() local 587 lpc18xx_fill_parent_names(parents, clk->mux.table, clk->n_parents); in lpc18xx_cgu_register_pll() 589 return clk_register_composite(NULL, name, parents, clk->n_parents, in lpc18xx_cgu_register_pll() [all …]
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/linux/drivers/clk/samsung/ |
H A D | clk-exynos-clkout.c | 115 struct clk *parents[EXYNOS_CLKOUT_PARENTS]; in exynos_clkout_probe() local 148 parents[i] = of_clk_get_by_name(clkout->np, name); in exynos_clkout_probe() 149 if (IS_ERR(parents[i])) { in exynos_clkout_probe() 154 parent_names[i] = __clk_get_name(parents[i]); in exynos_clkout_probe() 200 if (!IS_ERR(parents[i])) in exynos_clkout_probe() 201 clk_put(parents[i]); in exynos_clkout_probe()
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/linux/arch/arm64/boot/dts/freescale/ |
H A D | imx8mm-overdrive.dtsi | 6 assigned-clock-parents = <&clk IMX8MM_GPU_PLL_OUT>; 13 assigned-clock-parents = <&clk IMX8MM_GPU_PLL_OUT>; 22 assigned-clock-parents = <&clk IMX8MM_SYS_PLL3_OUT>,
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