| /linux/drivers/clk/imx/ |
| H A D | clk-pllv3.c | 112 unsigned long parent_rate) in clk_pllv3_recalc_rate() argument
117 return (div == 1) ? parent_rate * 22 : parent_rate * 20; in clk_pllv3_recalc_rate()
123 unsigned long parent_rate = req->best_parent_rate; in clk_pllv3_determine_rate() local
125 req->rate = (req->rate >= parent_rate * 22) ? parent_rate * 22 : parent_rate * 20; in clk_pllv3_determine_rate()
131 unsigned long parent_rate) in clk_pllv3_set_rate() argument
136 if (rate == parent_rate * 22) in clk_pllv3_set_rate()
138 else if (rate == parent_rate * 20) in clk_pllv3_set_rate()
161 unsigned long parent_rate) in clk_pllv3_sys_recalc_rate() argument
166 return parent_rate * div / 2; in clk_pllv3_sys_recalc_rate()
172 unsigned long parent_rate = req->best_parent_rate; in clk_pllv3_sys_determine_rate() local
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| H A D | clk-pllv4.c | 79 unsigned long parent_rate) in clk_pllv4_recalc_rate() argument
91 temp64 = parent_rate; in clk_pllv4_recalc_rate()
95 return (parent_rate * mult) + (u32)temp64; in clk_pllv4_recalc_rate()
102 unsigned long parent_rate = req->best_parent_rate; in clk_pllv4_determine_rate() local
111 do_div(temp64, parent_rate); in clk_pllv4_determine_rate()
115 round_rate = parent_rate * mult; in clk_pllv4_determine_rate()
120 round_rate = parent_rate * pllv4_mult_table[i]; in clk_pllv4_determine_rate()
130 clk_hw_get_name(hw), req->rate, parent_rate); in clk_pllv4_determine_rate()
136 if (parent_rate <= MAX_MFD) in clk_pllv4_determine_rate()
137 mfd = parent_rate; in clk_pllv4_determine_rate()
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| H A D | clk-frac-pll.c | 97 unsigned long parent_rate) in clk_pll_recalc_rate() argument
101 u64 temp64 = parent_rate; in clk_pll_recalc_rate()
115 rate = parent_rate * 8 * (divfi + 1); in clk_pll_recalc_rate()
125 u64 parent_rate = req->best_parent_rate; in clk_pll_determine_rate() local
129 parent_rate *= 8; in clk_pll_determine_rate()
132 do_div(temp64, parent_rate); in clk_pll_determine_rate()
134 temp64 = req->rate - divfi * parent_rate; in clk_pll_determine_rate()
136 do_div(temp64, parent_rate); in clk_pll_determine_rate()
139 temp64 = parent_rate; in clk_pll_determine_rate()
143 req->rate = parent_rate * divfi + temp64; in clk_pll_determine_rate()
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| /linux/drivers/clk/ |
| H A D | clk-fractional-divider_test.c | 19 unsigned long rate, parent_rate, parent_rate_before, m, n, max_n; in clk_fd_test_approximation_max_denominator() local
29 parent_rate = (max_n + 1) * rate; /* so that it exceeds the maximum divisor */ in clk_fd_test_approximation_max_denominator()
30 parent_rate_before = parent_rate; in clk_fd_test_approximation_max_denominator()
32 clk_fractional_divider_general_approximation(&fd->hw, rate, &parent_rate, &m, &n); in clk_fd_test_approximation_max_denominator()
33 KUNIT_ASSERT_EQ(test, parent_rate, parent_rate_before); in clk_fd_test_approximation_max_denominator()
48 unsigned long rate, parent_rate, parent_rate_before, m, n, max_m; in clk_fd_test_approximation_max_numerator() local
58 parent_rate = rate / (max_m + 1); /* so that it exceeds the maximum numerator */ in clk_fd_test_approximation_max_numerator()
59 parent_rate_before = parent_rate; in clk_fd_test_approximation_max_numerator()
61 clk_fractional_divider_general_approximation(&fd->hw, rate, &parent_rate, &m, &n); in clk_fd_test_approximation_max_numerator()
62 KUNIT_ASSERT_EQ(test, parent_rate, parent_rate_before); in clk_fd_test_approximation_max_numerator()
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| H A D | clk-vt8500.c | 115 unsigned long parent_rate) in vt8500_dclk_recalc_rate() argument
128 return parent_rate / div; in vt8500_dclk_recalc_rate()
159 unsigned long parent_rate) in vt8500_dclk_set_rate() argument
168 divisor = parent_rate / rate; in vt8500_dclk_set_rate()
351 static int vt8500_find_pll_bits(unsigned long rate, unsigned long parent_rate, in vt8500_find_pll_bits() argument
357 if ((rate < parent_rate * 4) || (rate > parent_rate * 62)) { in vt8500_find_pll_bits()
363 if (rate <= parent_rate * 31) in vt8500_find_pll_bits()
369 *multiplier = rate / (parent_rate / *prediv); in vt8500_find_pll_bits()
370 tclk = (parent_rate / *prediv) * *multiplier; in vt8500_find_pll_bits()
391 unsigned long parent_rate, u32 *multiplier, u32 *divisor1, in wm8650_find_pll_bits() argument
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| H A D | clk-multiplier.c | 33 unsigned long parent_rate) in __get_mult() argument
36 return DIV_ROUND_CLOSEST(rate, parent_rate); in __get_mult()
38 return rate / parent_rate; in __get_mult()
42 unsigned long parent_rate) in clk_multiplier_recalc_rate() argument
53 return parent_rate * val; in clk_multiplier_recalc_rate()
71 unsigned long parent_rate, current_rate, best_rate = ~0; in __bestmult() local
101 parent_rate = clk_hw_round_rate(clk_hw_get_parent(hw), in __bestmult()
103 current_rate = parent_rate * i; in __bestmult()
108 *best_parent_rate = parent_rate; in __bestmult()
128 unsigned long parent_rate) in clk_multiplier_set_rate() argument
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| H A D | clk-sparx5.c | 58 static unsigned long s5_calc_freq(unsigned long parent_rate, in s5_calc_freq() argument
61 unsigned long rate = parent_rate / conf->div; in s5_calc_freq()
76 unsigned long parent_rate, in s5_search_fractional() argument
94 conf->freq = s5_calc_freq(parent_rate, conf); in s5_search_fractional()
109 unsigned long parent_rate, in s5_calc_params() argument
112 if (parent_rate % rate) { in s5_calc_params()
116 div = DIV_ROUND_CLOSEST_ULL(parent_rate, rate); in s5_calc_params()
117 s5_search_fractional(rate, parent_rate, div, &alt1); in s5_calc_params()
124 div = parent_rate / rate; in s5_calc_params()
126 s5_search_fractional(rate, parent_rate, div, in s5_calc_params()
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| H A D | clk-xgene.c | 72 unsigned long parent_rate) in xgene_clk_pll_recalc_rate() argument
91 fvco = parent_rate * (N_DIV_RD(pll) + 4); in xgene_clk_pll_recalc_rate()
101 fref = parent_rate / nref; in xgene_clk_pll_recalc_rate()
110 fvco = parent_rate * SC_N_DIV_RD(pll); in xgene_clk_pll_recalc_rate()
113 clk_hw_get_name(hw), fvco / nout, parent_rate, in xgene_clk_pll_recalc_rate()
238 unsigned long parent_rate) in xgene_clk_pmd_recalc_rate() argument
257 ret = (u64)parent_rate; in xgene_clk_pmd_recalc_rate()
269 ret = (u64)parent_rate; in xgene_clk_pmd_recalc_rate()
299 unsigned long parent_rate) in xgene_clk_pmd_set_rate() argument
313 scale = DIV_ROUND_UP_ULL(ret, (u64)parent_rate); in xgene_clk_pmd_set_rate()
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| H A D | clk-divider.c | 136 unsigned long divider_recalc_rate(struct clk_hw *hw, unsigned long parent_rate, in divider_recalc_rate() argument
148 return parent_rate; in divider_recalc_rate()
151 return DIV_ROUND_UP_ULL((u64)parent_rate, div); in divider_recalc_rate()
156 unsigned long parent_rate) in clk_divider_recalc_rate() argument
164 return divider_recalc_rate(hw, parent_rate, val, divider->table, in clk_divider_recalc_rate()
226 unsigned long parent_rate, unsigned long rate, in _div_round_up() argument
229 int div = DIV_ROUND_UP_ULL((u64)parent_rate, rate); in _div_round_up()
240 unsigned long parent_rate, unsigned long rate, in _div_round_closest() argument
246 up = DIV_ROUND_UP_ULL((u64)parent_rate, rate); in _div_round_closest()
247 down = parent_rate / rate; in _div_round_closest()
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| /linux/drivers/clk/actions/ |
| H A D | owl-factor.c | 44 unsigned long rate, unsigned long parent_rate) in _get_table_val() argument
51 calc_rate = parent_rate * clkt->mul; in _get_table_val()
71 unsigned long parent_rate, try_parent_rate, best = 0, cur_rate; in owl_clk_val_best() local
79 parent_rate = *best_parent_rate; in owl_clk_val_best()
80 bestval = _get_table_val(clkt, rate, parent_rate); in owl_clk_val_best()
100 parent_rate = clk_hw_round_rate(clk_hw_get_parent(hw), in owl_clk_val_best()
102 cur_rate = DIV_ROUND_UP(parent_rate, clkt->div) * clkt->mul; in owl_clk_val_best()
106 *best_parent_rate = parent_rate; in owl_clk_val_best()
122 unsigned long *parent_rate) in owl_factor_helper_round_rate() argument
127 val = owl_clk_val_best(factor_hw, &common->hw, rate, parent_rate); in owl_factor_helper_round_rate()
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| /linux/drivers/clk/sunxi/ |
| H A D | clk-sun9i-cpus.c | 50 unsigned long parent_rate) in sun9i_a80_cpus_clk_recalc_rate() argument
61 parent_rate /= SUN9I_CPUS_PLL4_DIV_GET(reg) + 1; in sun9i_a80_cpus_clk_recalc_rate()
64 rate = parent_rate / (SUN9I_CPUS_DIV_GET(reg) + 1); in sun9i_a80_cpus_clk_recalc_rate()
70 u8 parent, unsigned long parent_rate) in sun9i_a80_cpus_clk_round() argument
78 if (parent_rate && rate > parent_rate) in sun9i_a80_cpus_clk_round()
79 rate = parent_rate; in sun9i_a80_cpus_clk_round()
81 div = DIV_ROUND_UP(parent_rate, rate); in sun9i_a80_cpus_clk_round()
107 return parent_rate / pre_div / div; in sun9i_a80_cpus_clk_round()
115 unsigned long parent_rate, best = 0, child_rate, best_child_rate = 0; in sun9i_a80_cpus_clk_determine_rate() local
125 parent_rate = clk_hw_round_rate(parent, rate); in sun9i_a80_cpus_clk_determine_rate()
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| H A D | clk-sun9i-core.c | 103 if (req->parent_rate < req->rate) in sun9i_a80_get_gt_factors()
104 req->rate = req->parent_rate; in sun9i_a80_get_gt_factors()
106 div = DIV_ROUND_UP(req->parent_rate, req->rate); in sun9i_a80_get_gt_factors()
112 req->rate = req->parent_rate / div; in sun9i_a80_get_gt_factors()
158 if (req->parent_rate < req->rate) in sun9i_a80_get_ahb_factors()
159 req->rate = req->parent_rate; in sun9i_a80_get_ahb_factors()
161 _p = order_base_2(DIV_ROUND_UP(req->parent_rate, req->rate)); in sun9i_a80_get_ahb_factors()
167 req->rate = req->parent_rate >> _p; in sun9i_a80_get_ahb_factors()
238 if (req->parent_rate < req->rate) in sun9i_a80_get_apb1_factors()
239 req->rate = req->parent_rate; in sun9i_a80_get_apb1_factors()
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| /linux/drivers/clk/pxa/ |
| H A D | clk-pxa27x.c | 202 unsigned long parent_rate) in clk_pxa27x_cpll_get_rate() argument
215 L = l * parent_rate; in clk_pxa27x_cpll_get_rate()
229 unsigned long parent_rate) in clk_pxa27x_cpll_set_rate() argument
233 pr_debug("%s(rate=%lu parent_rate=%lu)\n", __func__, rate, parent_rate); in clk_pxa27x_cpll_set_rate()
249 unsigned long parent_rate) in clk_pxa27x_lcd_base_get_rate() argument
259 return parent_rate * 2; in clk_pxa27x_lcd_base_get_rate()
261 return parent_rate; in clk_pxa27x_lcd_base_get_rate()
265 return parent_rate; in clk_pxa27x_lcd_base_get_rate()
267 return parent_rate / 2; in clk_pxa27x_lcd_base_get_rate()
268 return parent_rate / 4; in clk_pxa27x_lcd_base_get_rate()
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| /linux/drivers/clk/at91/ |
| H A D | clk-utmi.c | 47 unsigned long parent_rate; in clk_utmi_prepare() local
55 parent_rate = clk_hw_get_rate(hw_parent); in clk_utmi_prepare()
57 switch (parent_rate) { in clk_utmi_prepare()
111 unsigned long parent_rate) in clk_utmi_recalc_rate() argument
198 unsigned long parent_rate; in clk_utmi_sama7g5_prepare() local
202 parent_rate = clk_hw_get_rate(hw_parent); in clk_utmi_sama7g5_prepare()
204 switch (parent_rate) { in clk_utmi_sama7g5_prepare()
232 unsigned long parent_rate; in clk_utmi_sama7g5_is_prepared() local
236 parent_rate = clk_hw_get_rate(hw_parent); in clk_utmi_sama7g5_is_prepared()
241 if (parent_rate == 16000000) in clk_utmi_sama7g5_is_prepared()
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| H A D | clk-audio-pll.c | 159 static unsigned long clk_audio_pll_fout(unsigned long parent_rate, in clk_audio_pll_fout() argument
162 unsigned long long fr = (unsigned long long)parent_rate * fracr; in clk_audio_pll_fout()
170 return parent_rate * (nd + 1) + fr; in clk_audio_pll_fout()
174 unsigned long parent_rate) in clk_audio_pll_frac_recalc_rate() argument
179 fout = clk_audio_pll_fout(parent_rate, frac->nd, frac->fracr); in clk_audio_pll_frac_recalc_rate()
188 unsigned long parent_rate) in clk_audio_pll_pad_recalc_rate() argument
194 apad_rate = parent_rate / (apad_ck->qdaudio * apad_ck->div); in clk_audio_pll_pad_recalc_rate()
203 unsigned long parent_rate) in clk_audio_pll_pmc_recalc_rate() argument
208 apmc_rate = parent_rate / (apmc_ck->qdpmc + 1); in clk_audio_pll_pmc_recalc_rate()
217 unsigned long parent_rate, in clk_audio_pll_frac_compute_frac() argument
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| H A D | clk-h32mx.c | 29 unsigned long parent_rate) in clk_sama5d4_h32mx_recalc_rate() argument
36 return parent_rate / 2; in clk_sama5d4_h32mx_recalc_rate()
38 if (parent_rate > H32MX_MAX_FREQ) in clk_sama5d4_h32mx_recalc_rate()
40 return parent_rate; in clk_sama5d4_h32mx_recalc_rate()
72 unsigned long parent_rate) in clk_sama5d4_h32mx_set_rate() argument
77 if (parent_rate != rate && (parent_rate / 2) != rate) in clk_sama5d4_h32mx_set_rate()
80 if ((parent_rate / 2) == rate) in clk_sama5d4_h32mx_set_rate()
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| H A D | clk-programmable.c | 33 unsigned long parent_rate) in clk_programmable_recalc_rate() argument
43 rate = parent_rate / (PROG_PRES(layout, pckr) + 1); in clk_programmable_recalc_rate()
45 rate = parent_rate >> PROG_PRES(layout, pckr); in clk_programmable_recalc_rate()
57 unsigned long parent_rate; in clk_programmable_determine_rate() local
67 parent_rate = clk_hw_get_rate(parent); in clk_programmable_determine_rate()
70 tmp_rate = parent_rate / (shift + 1); in clk_programmable_determine_rate()
76 tmp_rate = parent_rate >> shift; in clk_programmable_determine_rate()
88 req->best_parent_rate = parent_rate; in clk_programmable_determine_rate()
149 unsigned long parent_rate) in clk_programmable_set_rate() argument
153 unsigned long div = parent_rate / rate; in clk_programmable_set_rate()
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| /linux/drivers/clk/nuvoton/ |
| H A D | clk-ma35d1-pll.c | 82 unsigned long parent_rate) in ma35d1_calc_smic_pll_freq() argument
88 return parent_rate; in ma35d1_calc_smic_pll_freq()
94 pll_freq = (u64)parent_rate * n; in ma35d1_calc_smic_pll_freq()
99 static unsigned long ma35d1_calc_pll_freq(u8 mode, u32 *reg_ctl, unsigned long parent_rate) in ma35d1_calc_pll_freq() argument
105 return parent_rate; in ma35d1_calc_pll_freq()
112 pll_freq = (u64)parent_rate * n; in ma35d1_calc_pll_freq()
118 pll_freq = div_u64(parent_rate * n, 100 * m * p); in ma35d1_calc_pll_freq()
124 unsigned long parent_rate, u32 *reg_ctl, in ma35d1_pll_find_closest() argument
148 tmp = div_u64(parent_rate, m); in ma35d1_pll_find_closest()
153 fclk = div_u64(parent_rate * n, m); in ma35d1_pll_find_closest()
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| /linux/drivers/clk/qcom/ |
| H A D | clk-rcg2.c | 194 __clk_rcg2_recalc_rate(struct clk_hw *hw, unsigned long parent_rate, u32 cfg) in __clk_rcg2_recalc_rate() argument
215 return calc_rate(parent_rate, m, n, mode, hid_div); in __clk_rcg2_recalc_rate()
219 clk_rcg2_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) in clk_rcg2_recalc_rate() argument
226 return __clk_rcg2_recalc_rate(hw, parent_rate, cfg); in clk_rcg2_recalc_rate()
294 unsigned long parent_rate, rate; in __clk_rcg2_select_conf() local
314 parent_rate = clk_hw_get_rate(p); in __clk_rcg2_select_conf()
315 rate = calc_rate(parent_rate, conf->n, conf->m, conf->n, conf->pre_div); in __clk_rcg2_select_conf()
434 static void clk_rcg2_calc_mnd(u64 parent_rate, u64 rate, struct freq_tbl *f, in clk_rcg2_calc_mnd() argument
442 rates_gcd = gcd(parent_rate, rate); in clk_rcg2_calc_mnd()
444 scaled_parent_rate = div64_u64(parent_rate, rates_gcd); in clk_rcg2_calc_mnd()
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| H A D | clk-regmap-mux-div.c | 98 unsigned long parent_rate = clk_hw_get_rate(parent); in mux_div_determine_rate() local
102 parent_rate = mult_frac(req_rate, div, 2); in mux_div_determine_rate()
103 parent_rate = clk_hw_round_rate(parent, parent_rate); in mux_div_determine_rate()
104 actual_rate = mult_frac(parent_rate, 2, div); in mux_div_determine_rate()
109 req->best_parent_rate = parent_rate; in mux_div_determine_rate()
135 unsigned long parent_rate = clk_hw_get_rate(parent); in __mux_div_set_rate_and_parent() local
139 parent_rate = mult_frac(rate, div, 2); in __mux_div_set_rate_and_parent()
140 parent_rate = clk_hw_round_rate(parent, parent_rate); in __mux_div_set_rate_and_parent()
141 actual_rate = mult_frac(parent_rate, 2, div); in __mux_div_set_rate_and_parent()
214 unsigned long parent_rate = clk_hw_get_rate(p); in mux_div_recalc_rate() local
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| /linux/drivers/clk/tegra/ |
| H A D | clk-tegra20-emc.c | 55 unsigned long parent_rate) in emc_recalc_rate() argument
63 return DIV_ROUND_UP(parent_rate * 2, div + 2); in emc_recalc_rate()
102 unsigned long parent_rate) in emc_set_rate() argument
108 div = div_frac_get(rate, parent_rate, 8, 1, 0); in emc_set_rate()
135 unsigned long parent_rate, in emc_set_rate_and_parent() argument
141 div = div_frac_get(rate, parent_rate, 8, 1, 0); in emc_set_rate_and_parent()
173 unsigned long parent_rate; in emc_determine_rate() local
187 parent_rate = req->best_parent_rate; in emc_determine_rate()
189 parent_rate = clk_hw_get_rate(parent_hw); in emc_determine_rate()
191 if (emc_rate > parent_rate) in emc_determine_rate()
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| H A D | clk-pll.c | 520 unsigned long rate, unsigned long parent_rate) in _get_table_rate() argument
527 if (sel->input_rate == parent_rate && in _get_table_rate()
554 unsigned long rate, unsigned long parent_rate) in _calc_rate() argument
564 switch (parent_rate) { in _calc_rate()
581 cfreq = parent_rate / (parent_rate / 1000000); in _calc_rate()
585 __func__, parent_rate); in _calc_rate()
594 cfg->m = parent_rate / cfreq; in _calc_rate()
604 cfg->output_rate = cfg->n * DIV_ROUND_UP(parent_rate, cfg->m); in _calc_rate()
802 unsigned long parent_rate) in clk_pll_set_rate() argument
819 if (_get_table_rate(hw, &cfg, rate, parent_rate) && in clk_pll_set_rate()
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| /linux/drivers/clk/sunxi-ng/ |
| H A D | ccu_phase.c | 17 unsigned int parent_rate, grandparent_rate; in ccu_phase_get_phase() local
35 parent_rate = clk_hw_get_rate(parent); in ccu_phase_get_phase()
36 if (!parent_rate) in ccu_phase_get_phase()
50 parent_div = grandparent_rate / parent_rate; in ccu_phase_get_phase()
60 unsigned int parent_rate, grandparent_rate; in ccu_phase_set_phase() local
71 parent_rate = clk_hw_get_rate(parent); in ccu_phase_set_phase()
72 if (!parent_rate) in ccu_phase_set_phase()
89 parent_div = grandparent_rate / parent_rate; in ccu_phase_set_phase()
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| /linux/drivers/clk/mxs/ |
| H A D | clk-frac.c | 34 unsigned long parent_rate) in clk_frac_recalc_rate() argument
43 tmp_rate = (u64)parent_rate * div; in clk_frac_recalc_rate()
51 unsigned long parent_rate = req->best_parent_rate; in clk_frac_determine_rate() local
55 if (req->rate > parent_rate) in clk_frac_determine_rate()
60 do_div(tmp, parent_rate); in clk_frac_determine_rate()
66 tmp_rate = (u64)parent_rate * div; in clk_frac_determine_rate()
76 unsigned long parent_rate) in clk_frac_set_rate() argument
83 if (rate > parent_rate) in clk_frac_set_rate()
88 do_div(tmp, parent_rate); in clk_frac_set_rate()
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| /linux/drivers/clk/mmp/ |
| H A D | clk-mix.c | 114 unsigned long parent_rate; in _filter_clk_table() local
121 parent_rate = clk_hw_get_rate(parent); in _filter_clk_table()
122 if (parent_rate % item->rate) { in _filter_clk_table()
125 item->divisor = parent_rate / item->rate; in _filter_clk_table()
207 unsigned long parent_rate, mix_rate, mix_rate_best, parent_rate_best; in mmp_clk_mix_determine_rate() local
226 parent_rate = clk_hw_get_rate(parent); in mmp_clk_mix_determine_rate()
227 mix_rate = parent_rate / item->divisor; in mmp_clk_mix_determine_rate()
231 parent_rate_best = parent_rate; in mmp_clk_mix_determine_rate()
241 parent_rate = clk_hw_get_rate(parent); in mmp_clk_mix_determine_rate()
245 mix_rate = parent_rate / div; in mmp_clk_mix_determine_rate()
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