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Searched refs:p_state_change_support (Results 1 – 10 of 10) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn201/
H A Ddcn201_clk_mgr.c78 clk_mgr->clks.p_state_change_support = true; in dcn201_init_clocks()
95 bool p_state_change_support; in dcn201_update_clocks() local
134 p_state_change_support = new_clocks->p_state_change_support || (total_plane_count == 0); in dcn201_update_clocks()
135 …should_update_pstate_support(safe_to_lower, p_state_change_support, clk_mgr_base->clks.p_state_cha… in dcn201_update_clocks()
136 clk_mgr_base->clks.prev_p_state_change_support = clk_mgr_base->clks.p_state_change_support; in dcn201_update_clocks()
137 clk_mgr_base->clks.p_state_change_support = p_state_change_support; in dcn201_update_clocks()
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn60/
H A Ddcn60_clk_mgr.c450 else if (a->p_state_change_support != b->p_state_change_support) in dcn60_are_clock_states_equal()
689 clk_mgr_base->clks.p_state_change_support = true; in dcn60_init_clocks()
863 if (!new_clocks->p_state_change_support) in dcn60_auto_dpm_test_log()
1051 bool uclk_pstate_supported = new_clocks->p_state_change_support in dcn60_make_bandwidth_clocks_update_action()
1097 clk_mgr_base->clks.p_state_change_support)) { in dcn60_make_bandwidth_clocks_update_action()
1156 || clk_mgr_base->clks.p_state_change_support; in dcn60_build_bandwidth_clocks_block_sequence_with_action()
1212 || clk_mgr_base->clks.p_state_change_support); in dcn60_build_bandwidth_clocks_block_sequence_with_action()
1256 clk_mgr_base->clks.p_state_change_support = true; in dcn60_update_bandwidth_clocks_state_with_action()
1258 clk_mgr_base->clks.p_state_change_support = false; in dcn60_update_bandwidth_clocks_state_with_action()
1413 new_clocks.p_state_change_support = context->bw_ctx.bw.dcn.clk.p_state_change_support; in dcn60_set_hard_min_memclk()
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/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn30/
H A Ddcn30_hwseq.c1232 if ((!dc->clk_mgr->clks.p_state_change_support || subvp_in_use || in dcn30_hardware_release()
1257 context->bw_ctx.bw.dcn.clk.p_state_change_support = false; in dcn30_prepare_bandwidth()
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/
H A Ddcn31_clk_mgr.c305 clk_mgr->clks.p_state_change_support = true; in dcn31_init_clocks()
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn50/
H A Ddcn50_hwseq.c75 clocks->p_state_change_support = true; in dcn50_initialize_min_clocks()
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/
H A Ddcn314_clk_mgr.c195 clk_mgr->clks.p_state_change_support = true; in dcn314_init_clocks()
/linux/drivers/gpu/drm/amd/display/dc/core/
H A Ddc.c6802 bool p_state_change_support; in dc_enable_dcmode_clk_limit() local
6813 p_state_change_support = dc->clk_mgr->clks.p_state_change_support; in dc_enable_dcmode_clk_limit()
6816 if (p_state_change_support) { in dc_enable_dcmode_clk_limit()
6826 if (p_state_change_support) { in dc_enable_dcmode_clk_limit()
7450 profile.power_level = !context->bw_ctx.bw.dcn.clk.p_state_change_support; in dc_get_power_profile_for_dc_state()
7555 out_data->uclk_p_state = dc->current_state->clk_mgr->clks.p_state_change_support; in dc_get_power_feature_status()
/linux/drivers/gpu/drm/amd/display/amdgpu_dm/
H A Damdgpu_dm_helpers.c1600 dc_state->bw_ctx.bw.dcn.clk.p_state_change_support = false; in dm_helpers_dp_handle_test_pattern_request()
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/
H A Ddcn35_clk_mgr.c745 clk_mgr->clks.p_state_change_support = true; in init_clk_states()
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn315/
H A Ddcn315_resource.c1975 return !context->bw_ctx.bw.dcn.clk.p_state_change_support; in dcn315_get_power_profile()