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Searched refs:outb (Results 1 – 25 of 371) sorted by relevance

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/linux/arch/arm/mach-footbridge/
H A Ddma-isa.c103 outb(address >> 16, isa_dma_port[chan][ISA_DMA_PGLO]); in isa_enable_dma()
104 outb(address >> 24, isa_dma_port[chan][ISA_DMA_PGHI]); in isa_enable_dma()
111 outb(0, isa_dma_port[chan][ISA_DMA_CLRFF]); in isa_enable_dma()
113 outb(address, isa_dma_port[chan][ISA_DMA_ADDR]); in isa_enable_dma()
114 outb(address >> 8, isa_dma_port[chan][ISA_DMA_ADDR]); in isa_enable_dma()
116 outb(length, isa_dma_port[chan][ISA_DMA_COUNT]); in isa_enable_dma()
117 outb(length >> 8, isa_dma_port[chan][ISA_DMA_COUNT]); in isa_enable_dma()
119 outb(mode, isa_dma_port[chan][ISA_DMA_MODE]); in isa_enable_dma()
122 outb(chan & 3, isa_dma_port[chan][ISA_DMA_MASK]); in isa_enable_dma()
127 outb(chan | 4, isa_dma_port[chan][ISA_DMA_MASK]); in isa_disable_dma()
[all …]
H A Disa-irq.c34 outb(inb(PIC_MASK_LO) | mask, PIC_MASK_LO); in isa_mask_pic_lo_irq()
41 outb(inb(PIC_MASK_LO) | mask, PIC_MASK_LO); in isa_ack_pic_lo_irq()
42 outb(0x20, PIC_LO); in isa_ack_pic_lo_irq()
49 outb(inb(PIC_MASK_LO) & ~mask, PIC_MASK_LO); in isa_unmask_pic_lo_irq()
62 outb(inb(PIC_MASK_HI) | mask, PIC_MASK_HI); in isa_mask_pic_hi_irq()
69 outb(inb(PIC_MASK_HI) | mask, PIC_MASK_HI); in isa_ack_pic_hi_irq()
70 outb(0x62, PIC_LO); in isa_ack_pic_hi_irq()
71 outb(0x20, PIC_HI); in isa_ack_pic_hi_irq()
78 outb(inb(PIC_MASK_HI) & ~mask, PIC_MASK_HI); in isa_unmask_pic_hi_irq()
120 outb(0x11, PIC_LO); in isa_init_irq()
[all …]
H A Dnetwinder-hw.c37 outb(0x87, 0x370); in wb977_open()
38 outb(0x87, 0x370); in wb977_open()
43 outb(0xaa, 0x370); in wb977_close()
48 outb(reg, 0x370); in wb977_wb()
49 outb(val, 0x371); in wb977_wb()
54 outb(reg, 0x370); in wb977_ww()
55 outb(val >> 8, 0x371); in wb977_ww()
56 outb(reg + 1, 0x370); in wb977_ww()
57 outb(val & 255, 0x371); in wb977_ww()
83 outb(new_gpio, GP1_IO_BASE); in nw_gpio_modify_op()
[all …]
/linux/arch/alpha/kernel/
H A Dsmc37c93x.c98 outb(CONFIG_ON_KEY, configPort); in SMCConfigState()
99 outb(CONFIG_ON_KEY, configPort); in SMCConfigState()
100 outb(DEVICE_ID, indexPort); in SMCConfigState()
103 outb(DEVICE_REV, indexPort); in SMCConfigState()
115 outb(CONFIG_OFF_KEY, baseAddr); in SMCRunState()
144 outb(LOGICAL_DEVICE_NUMBER, indexPort); in SMCEnableDevice()
145 outb(device, dataPort); in SMCEnableDevice()
147 outb(ADDR_LO, indexPort); in SMCEnableDevice()
148 outb(( portaddr & 0xFF ), dataPort); in SMCEnableDevice()
150 outb(ADDR_HI, indexPort); in SMCEnableDevice()
[all …]
H A Dsys_ruffian.c42 outb(0x11,0xA0); in ruffian_init_irq()
43 outb(0x08,0xA1); in ruffian_init_irq()
44 outb(0x02,0xA1); in ruffian_init_irq()
45 outb(0x01,0xA1); in ruffian_init_irq()
46 outb(0xFF,0xA1); in ruffian_init_irq()
48 outb(0x11,0x20); in ruffian_init_irq()
49 outb(0x00,0x21); in ruffian_init_irq()
50 outb(0x04,0x21); in ruffian_init_irq()
51 outb(0x01,0x21); in ruffian_init_irq()
52 outb(0xFF,0x21); in ruffian_init_irq()
[all …]
H A Des1888.c29 outb(0x01, 0x0226); /* reset */ in es1888_init()
31 outb(0x00, 0x0226); /* release reset */ in es1888_init()
35 outb(0xc6, 0x022c); /* enable extended mode */ in es1888_init()
39 outb(0xb1, 0x022c); /* setup for write to Interrupt CR */ in es1888_init()
42 outb(0x14, 0x022c); /* set IRQ 5 */ in es1888_init()
45 outb(0xb2, 0x022c); /* setup for write to DMA CR */ in es1888_init()
48 outb(0x18, 0x022c); /* set DMA channel 1 */ in es1888_init()
/linux/drivers/comedi/drivers/
H A Dssv_dnp.c57 outb(PADR, CSCIR); in dnp_dio_insn_bits()
58 outb(s->state & 0xff, CSCDR); in dnp_dio_insn_bits()
60 outb(PBDR, CSCIR); in dnp_dio_insn_bits()
61 outb((s->state >> 8) & 0xff, CSCDR); in dnp_dio_insn_bits()
63 outb(PCDR, CSCIR); in dnp_dio_insn_bits()
65 outb(((s->state >> 12) & 0xf0) | val, CSCDR); in dnp_dio_insn_bits()
68 outb(PADR, CSCIR); in dnp_dio_insn_bits()
70 outb(PBDR, CSCIR); in dnp_dio_insn_bits()
72 outb(PCDR, CSCIR); in dnp_dio_insn_bits()
96 outb(PAMR, CSCIR); in dnp_dio_insn_config()
[all …]
H A Ddmm32at.c166 outb(DMM32AT_FIFO_CTRL_FIFORST, dev->iobase + DMM32AT_FIFO_CTRL_REG); in dmm32at_ai_set_chanspec()
169 outb(DMM32AT_FIFO_CTRL_SCANEN, in dmm32at_ai_set_chanspec()
172 outb(chan, dev->iobase + DMM32AT_AI_LO_CHAN_REG); in dmm32at_ai_set_chanspec()
173 outb(last_chan, dev->iobase + DMM32AT_AI_HI_CHAN_REG); in dmm32at_ai_set_chanspec()
174 outb(dmm32at_rangebits[range], dev->iobase + DMM32AT_AI_CFG_REG); in dmm32at_ai_set_chanspec()
219 outb(0xff, dev->iobase + DMM32AT_AI_START_CONV_REG); in dmm32at_ai_insn_read()
344 outb(0, dev->iobase + DMM32AT_CTRDIO_CFG_REG); in dmm32at_setaitimer()
350 outb(DMM32AT_CTRL_PAGE_8254, dev->iobase + DMM32AT_CTRL_REG); in dmm32at_setaitimer()
353 outb(DMM32AT_CLKCT1, dev->iobase + DMM32AT_CLKCT); in dmm32at_setaitimer()
354 outb(lo1, dev->iobase + DMM32AT_CLK1); in dmm32at_setaitimer()
[all …]
H A Dni_daq_700.c84 outb(s->state & 0xff, dev->iobase + DIO_W); in daq700_dio_insn_bits()
148 outb(r3_bits | (range & 0x03), dev->iobase + CMD_R3); in daq700_ai_rinsn()
152 outb(chan | 0x80, dev->iobase + CMD_R1); in daq700_ai_rinsn()
159 outb(0x00, dev->iobase + CMD_R2); /* enable ADC conversions */ in daq700_ai_rinsn()
160 outb(0x30, dev->iobase + CMO_R); /* mode 0 out0 L, from H */ in daq700_ai_rinsn()
161 outb(0x00, dev->iobase + ADCLEAR_R); /* clear the ADC FIFO */ in daq700_ai_rinsn()
165 outb(0x32, dev->iobase + CMO_R); in daq700_ai_rinsn()
199 outb(0x80, iobase + CMD_R1); /* disable scanning, ADC to chan 0 */ in daq700_ai_config()
200 outb(0x00, iobase + CMD_R2); /* clear all bits */ in daq700_ai_config()
201 outb(0x00, iobase + CMD_R3); /* set +-10 range */ in daq700_ai_config()
[all …]
/linux/arch/powerpc/sysdev/
H A Di8259.c44 outb(0x0C, 0x20); /* prepare for poll */ in i8259_irq()
51 outb(0x0C, 0xA0); /* prepare for poll */ in i8259_irq()
65 outb(0x0B, 0x20); /* ISR register */ in i8259_irq()
84 outb(cached_A1, 0xA1); in i8259_mask_and_ack_irq()
85 outb(0x20, 0xA0); /* Non-specific EOI */ in i8259_mask_and_ack_irq()
86 outb(0x20, 0x20); /* Non-specific EOI to cascade */ in i8259_mask_and_ack_irq()
90 outb(cached_21, 0x21); in i8259_mask_and_ack_irq()
91 outb(0x20, 0x20); /* Non-specific EOI */ in i8259_mask_and_ack_irq()
98 outb(cached_A1,0xA1); in i8259_set_irq_mask()
99 outb(cached_21,0x21); in i8259_set_irq_mask()
[all …]
/linux/arch/x86/kernel/
H A Di8259.c68 outb(cached_slave_mask, PIC_SLAVE_IMR); in mask_8259A_irq()
70 outb(cached_master_mask, PIC_MASTER_IMR); in mask_8259A_irq()
87 outb(cached_slave_mask, PIC_SLAVE_IMR); in unmask_8259A_irq()
89 outb(cached_master_mask, PIC_MASTER_IMR); in unmask_8259A_irq()
136 outb(0x0B, PIC_MASTER_CMD); /* ISR register */ in i8259A_irq_real()
138 outb(0x0A, PIC_MASTER_CMD); /* back to the IRR register */ in i8259A_irq_real()
141 outb(0x0B, PIC_SLAVE_CMD); /* ISR register */ in i8259A_irq_real()
143 outb(0x0A, PIC_SLAVE_CMD); /* back to the IRR register */ in i8259A_irq_real()
182 outb(cached_slave_mask, PIC_SLAVE_IMR); in mask_and_ack_8259A()
184 outb(0x60+(irq&7), PIC_SLAVE_CMD); in mask_and_ack_8259A()
[all …]
/linux/drivers/media/radio/
H A Dradio-zoltrix.c94 outb(0, isa->io); in zoltrix_s_mute_volume()
95 outb(0, isa->io); in zoltrix_s_mute_volume()
100 outb(vol - 1, isa->io); in zoltrix_s_mute_volume()
126 outb(0, isa->io); in zoltrix_s_frequency()
127 outb(0, isa->io); in zoltrix_s_frequency()
130 outb(0x40, isa->io); in zoltrix_s_frequency()
131 outb(0xc0, isa->io); in zoltrix_s_frequency()
136 outb(0x80, isa->io); in zoltrix_s_frequency()
138 outb(0x00, isa->io); in zoltrix_s_frequency()
140 outb(0x80, isa->io); in zoltrix_s_frequency()
[all …]
H A Dradio-cadet.c122 outb(7, dev->io); /* Select tuner control */ in cadet_getstereo()
137 outb(7, dev->io); /* Select tuner control */ in cadet_gettune()
139 outb(0x00, dev->io + 1); /* Ensure WRITE-ENABLE is LOW */ in cadet_gettune()
148 outb(0x01, dev->io + 1); in cadet_gettune()
150 outb(0x00, dev->io + 1); in cadet_gettune()
157 outb(curvol, dev->io + 1); in cadet_gettune()
194 outb(7, dev->io); /* Select tuner control */ in cadet_settune()
201 outb(7, dev->io); /* Select tuner control */ in cadet_settune()
202 outb(test, dev->io + 1); /* Initialize for write */ in cadet_settune()
205 outb(test, dev->io + 1); in cadet_settune()
[all …]
/linux/drivers/net/ethernet/8390/
H A Dne2k-pci.c256 outb(E8390_NODMA + E8390_PAGE1 + E8390_STOP, ioaddr + E8390_CMD); in ne2k_pci_init_one()
258 outb(0xff, ioaddr + 0x0d); in ne2k_pci_init_one()
259 outb(E8390_NODMA + E8390_PAGE0, ioaddr + E8390_CMD); in ne2k_pci_init_one()
263 outb(reg0, ioaddr); in ne2k_pci_init_one()
265 outb(regd, ioaddr + 0x0d); in ne2k_pci_init_one()
286 outb(inb(ioaddr + NE_RESET), ioaddr + NE_RESET); in ne2k_pci_init_one()
299 outb(0xff, ioaddr + EN0_ISR); in ne2k_pci_init_one()
332 outb(program_seq[i].value, in ne2k_pci_init_one()
348 outb(0x49, ioaddr + EN0_DCFG); in ne2k_pci_init_one()
410 outb(0xC0 + E8390_NODMA, ioaddr + NE_CMD); /* Page 3 */ in set_realtek_fdx()
[all …]
H A Dapne.c214 outb(inb(ioaddr + NE_RESET), ioaddr + NE_RESET); in apne_probe1()
222 outb(0xff, ioaddr + NE_EN0_ISR); /* Ack all intr. */ in apne_probe1()
248 outb(program_seq[i].value, ioaddr + program_seq[i].offset); in apne_probe1()
270 outb(0x49, ioaddr + NE_EN0_DCFG); in apne_probe1()
297 outb(0x49, ioaddr + NE_EN0_DCFG); in apne_probe1()
358 outb(inb(NE_BASE + NE_RESET), NE_BASE + NE_RESET); in apne_reset_8390()
369 outb(ENISR_RESET, NE_BASE + NE_EN0_ISR); /* Ack intr. */ in apne_reset_8390()
394 outb(E8390_NODMA+E8390_PAGE0+E8390_START, nic_base+ NE_CMD); in apne_get_8390_hdr()
395 outb(ENISR_RDC, nic_base + NE_EN0_ISR); in apne_get_8390_hdr()
396 outb(sizeof(struct e8390_pkt_hdr), nic_base + NE_EN0_RCNTLO); in apne_get_8390_hdr()
[all …]
/linux/drivers/irqchip/
H A Dirq-i8259.c77 outb(cached_slave_mask, PIC_SLAVE_IMR); in disable_8259A_irq()
79 outb(cached_master_mask, PIC_MASTER_IMR); in disable_8259A_irq()
92 outb(cached_slave_mask, PIC_SLAVE_IMR); in enable_8259A_irq()
94 outb(cached_master_mask, PIC_MASTER_IMR); in enable_8259A_irq()
117 outb(0x0B, PIC_MASTER_CMD); /* ISR register */ in i8259A_irq_real()
119 outb(0x0A, PIC_MASTER_CMD); /* back to the IRR register */ in i8259A_irq_real()
122 outb(0x0B, PIC_SLAVE_CMD); /* ISR register */ in i8259A_irq_real()
124 outb(0x0A, PIC_SLAVE_CMD); /* back to the IRR register */ in i8259A_irq_real()
163 outb(cached_slave_mask, PIC_SLAVE_IMR); in mask_and_ack_8259A()
164 outb(0x60+(irq&7), PIC_SLAVE_CMD);/* 'Specific EOI' to slave */ in mask_and_ack_8259A()
[all …]
/linux/drivers/input/gameport/
H A Dlightning.c63 outb(L4_SELECT_ANALOG, L4_PORT); in l4_cooked_read()
64 outb(L4_SELECT_DIGITAL + (l4->port >> 2), L4_PORT); in l4_cooked_read()
67 outb(l4->port & 3, L4_PORT); in l4_cooked_read()
86 fail: outb(L4_SELECT_ANALOG, L4_PORT); in l4_cooked_read()
96 outb(L4_SELECT_ANALOG, L4_PORT); in l4_open()
108 outb(L4_SELECT_ANALOG, L4_PORT); in l4_getcal()
109 outb(L4_SELECT_DIGITAL + (port >> 2), L4_PORT); in l4_getcal()
113 outb(L4_CMD_GETCAL, L4_PORT); in l4_getcal()
122 outb(port & 3, L4_PORT); in l4_getcal()
132 out: outb(L4_SELECT_ANALOG, L4_PORT); in l4_getcal()
[all …]
/linux/drivers/scsi/pcmcia/
H A Dsym53c500_cs.c124 #define REG0(x) (outb(C4_IMG, (x) + CONFIG4))
126 #define REG1(x) outb(C7_IMG, (x) + CONFIG7); outb(C5_IMG, (x) + CONFIG5)
141 outb(count & 0xff, (x) + TC_LSB); \
142 outb((count >> 8) & 0xff, (x) + TC_MSB); \
143 outb((count >> 16) & 0xff, (x) + TC_HIGH);
217 outb(0x01, io_port + PIO_STATUS); in chip_init()
218 outb(0x00, io_port + PIO_FLAG); in chip_init()
220 outb(C4_IMG, io_port + CONFIG4); /* REG0(io_port); */ in chip_init()
221 outb(C3_IMG, io_port + CONFIG3); in chip_init()
222 outb(C2_IMG, io_port + CONFIG2); in chip_init()
[all …]
/linux/drivers/i2c/busses/
H A Dscx200_acb.c123 outb(inb(ACBCTL1) | ACBCTL1_STOP, ACBCTL1); in scx200_acb_machine()
124 outb(ACBST_STASTR | ACBST_NEGACK, ACBST); in scx200_acb_machine()
127 outb(0, ACBST); in scx200_acb_machine()
138 outb(iface->address_byte & ~1, ACBSDA); in scx200_acb_machine()
144 outb(iface->command, ACBSDA); in scx200_acb_machine()
153 outb(inb(ACBCTL1) | ACBCTL1_START, ACBCTL1); in scx200_acb_machine()
159 outb(inb(ACBCTL1) | ACBCTL1_ACK, ACBCTL1); in scx200_acb_machine()
161 outb(inb(ACBCTL1) & ~ACBCTL1_ACK, ACBCTL1); in scx200_acb_machine()
162 outb(iface->address_byte, ACBSDA); in scx200_acb_machine()
166 outb(iface->address_byte, ACBSDA); in scx200_acb_machine()
[all …]
/linux/drivers/parisc/
H A Dsuperio.c100 outb (OCW3_POLL,IC_PIC1+0); in superio_interrupt()
129 outb(OCW3_ISR,IC_PIC1+0); in superio_interrupt()
143 outb((OCW2_SEOI|local_irq),IC_PIC1 + 0); in superio_interrupt()
244 outb (0x11,IC_PIC1+0); /* ICW1: ICW4 write req | ICW1 */ in superio_init()
245 outb (0x00,IC_PIC1+1); /* ICW2: interrupt vector table - not used */ in superio_init()
246 outb (0x04,IC_PIC1+1); /* ICW3: Cascade */ in superio_init()
247 outb (0x01,IC_PIC1+1); /* ICW4: x86 mode */ in superio_init()
250 outb (0xff,IC_PIC1+1); /* OCW1: Mask all interrupts */ in superio_init()
251 outb (0xc2,IC_PIC1+0); /* OCW2: priority (3-7,0-2) */ in superio_init()
254 outb (0x11,IC_PIC2+0); /* ICW1: ICW4 write req | ICW1 */ in superio_init()
[all …]
/linux/drivers/bluetooth/
H A Dbluecard_cs.c171 outb(0x08 | 0x20, iobase + 0x30); in bluecard_activity_led_timeout()
187 outb(0x18 | 0x60, iobase + 0x30); in bluecard_enable_activity_led()
190 outb(0x00, iobase + 0x30); in bluecard_enable_activity_led()
266 outb(info->ctrl_reg, iobase + REG_CONTROL); in bluecard_write_wakeup()
309 outb(info->ctrl_reg, iobase + REG_CONTROL); in bluecard_write_wakeup()
313 outb(info->ctrl_reg, iobase + REG_CONTROL); in bluecard_write_wakeup()
341 outb(REG_COMMAND_RX_WIN_ONE, iobase + REG_COMMAND); in bluecard_read()
350 outb(REG_COMMAND_RX_WIN_TWO, iobase + REG_COMMAND); in bluecard_read()
513 outb(info->ctrl_reg, iobase + REG_CONTROL); in bluecard_interrupt()
521 outb(0x04, iobase + REG_INTERRUPT); in bluecard_interrupt()
[all …]
/linux/arch/x86/boot/
H A Dearly_serial_console.c31 outb(0x3, port + LCR); /* 8n1 */ in early_serial_init()
32 outb(0, port + IER); /* no interrupt */ in early_serial_init()
33 outb(0, port + FCR); /* no fifo */ in early_serial_init()
34 outb(0x3, port + MCR); /* DTR + RTS */ in early_serial_init()
38 outb(c | DLAB, port + LCR); in early_serial_init()
39 outb(divisor & 0xff, port + DLL); in early_serial_init()
40 outb((divisor >> 8) & 0xff, port + DLH); in early_serial_init()
41 outb(c & ~DLAB, port + LCR); in early_serial_init()
108 outb(lcr | DLAB, port + LCR); in probe_baud()
111 outb(lcr, port + LCR); in probe_baud()
/linux/drivers/parport/
H A Dparport_pc.c124 outb(new, ECONTROL(pb)); in frob_econtrol()
218 outb(r | 0x01, STATUS(pb)); /* Some reset by writing 1 */ in clear_epp_timeout()
219 outb(r & 0xfe, STATUS(pb)); /* Others by writing 0 */ in clear_epp_timeout()
259 outb(c, CONTROL(p)); in parport_pc_restore_state()
361 outb(*((char *)buf), EPPDATA(port)); in parport_pc_epp_write_data()
412 outb(*((char *)buf), EPPADDR(port)); in parport_pc_epp_write_addr()
573 outb(byte, fifo); in parport_pc_fifo_write_block_pio()
774 outb(0, FIFO(port)); in parport_pc_compat_write_block_pio()
869 outb(0, FIFO(port)); in parport_pc_ecp_write_block_pio()
978 outb(key, io); in show_parconfig_smsc37c669()
[all …]
/linux/arch/x86/pci/
H A Ddirect.c66 outb((u8)value, 0xCFC + (reg & 3)); in pci_conf1_write()
115 outb((u8)(0xF0 | (fn << 1)), 0xCF8); in pci_conf2_read()
116 outb((u8)bus, 0xCFA); in pci_conf2_read()
130 outb(0, 0xCF8); in pci_conf2_read()
155 outb((u8)(0xF0 | (fn << 1)), 0xCF8); in pci_conf2_write()
156 outb((u8)bus, 0xCFA); in pci_conf2_write()
160 outb((u8)value, PCI_CONF2_ADDRESS(dev, reg)); in pci_conf2_write()
170 outb(0, 0xCF8); in pci_conf2_write()
231 outb(0x01, 0xCFB); in pci_check_type1()
250 outb(0x00, 0xCFB); in pci_check_type2()
[all …]
/linux/sound/isa/wavefront/
H A Dwavefront_fx.c56 outb (onoff ? 0x02 : 0x00, dev->fx_op); in wavefront_fx_mute()
80 outb (FX_LSB_TRANSFER, dev->fx_lcr); in wavefront_fx_memset()
81 outb (page, dev->fx_dsp_page); in wavefront_fx_memset()
82 outb (addr, dev->fx_dsp_addr); in wavefront_fx_memset()
83 outb ((data[0] >> 8), dev->fx_dsp_msb); in wavefront_fx_memset()
84 outb ((data[0] & 0xff), dev->fx_dsp_lsb); in wavefront_fx_memset()
92 outb (FX_AUTO_INCR|FX_LSB_TRANSFER, dev->fx_lcr); in wavefront_fx_memset()
93 outb (page, dev->fx_dsp_page); in wavefront_fx_memset()
94 outb (addr, dev->fx_dsp_addr); in wavefront_fx_memset()
97 outb ((data[i] >> 8), dev->fx_dsp_msb); in wavefront_fx_memset()
[all …]

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