124 #define REG0(x)		(outb(C4_IMG, (x) + CONFIG4))
126 #define REG1(x)		outb(C7_IMG, (x) + CONFIG7); outb(C5_IMG, (x) + CONFIG5)
141   outb(count & 0xff, (x) + TC_LSB); \
142   outb((count >> 8) & 0xff, (x) + TC_MSB); \
143   outb((count >> 16) & 0xff, (x) + TC_HIGH);
217 	outb(0x01, io_port + PIO_STATUS);  in chip_init()
218 	outb(0x00, io_port + PIO_FLAG);  in chip_init()
220 	outb(C4_IMG, io_port + CONFIG4);	/* REG0(io_port); */  in chip_init()
221 	outb(C3_IMG, io_port + CONFIG3);  in chip_init()
222 	outb(C2_IMG, io_port + CONFIG2);  in chip_init()
223 	outb(C1_IMG, io_port + CONFIG1);  in chip_init()
225 	outb(0x05, io_port + CLKCONV);	/* clock conversion factor */  in chip_init()
226 	outb(0x9C, io_port + SRTIMOUT);	/* Selection timeout */  in chip_init()
227 	outb(0x05, io_port + SYNCPRD);	/* Synchronous transfer period */  in chip_init()
228 	outb(SYNC_MODE, io_port + SYNCOFF);	/* synchronous mode */    in chip_init()
234 	outb(C4_IMG, io_port + CONFIG4);	/* REG0(io_port); */  in SYM53C500_int_host_reset()
235 	outb(CHIP_RESET, io_port + CMD_REG);  in SYM53C500_int_host_reset()
236 	outb(SCSI_NOP, io_port + CMD_REG);	/* required after reset */  in SYM53C500_int_host_reset()
237 	outb(SCSI_RESET, io_port + CMD_REG);  in SYM53C500_int_host_reset()
338 					outb(*request++, base + PIO_FIFO);  in SYM53C500_pio_write()
424 			outb(FLUSH_FIFO, port_base + CMD_REG);  in SYM53C500_intr()
426 			outb(TRANSFER_INFO | DMA_OP, port_base + CMD_REG);  in SYM53C500_intr()
443 			outb(FLUSH_FIFO, port_base + CMD_REG);  in SYM53C500_intr()
445 			outb(TRANSFER_INFO | DMA_OP, port_base + CMD_REG);  in SYM53C500_intr()
463 		outb(FLUSH_FIFO, port_base + CMD_REG);  in SYM53C500_intr()
464 		outb(INIT_CMD_COMPLETE, port_base + CMD_REG);  in SYM53C500_intr()
475 		outb(SET_ATN, port_base + CMD_REG);	/* Reject the message */  in SYM53C500_intr()
476 		outb(MSG_ACCEPT, port_base + CMD_REG);  in SYM53C500_intr()
490 			outb(SET_ATN, port_base + CMD_REG);	/* Reject message */  in SYM53C500_intr()
493 		outb(MSG_ACCEPT, port_base + CMD_REG);  in SYM53C500_intr()
572 	outb(scmd_id(SCpnt), port_base + DEST_ID);	/* set destination */  in SYM53C500_queue_lck()
573 	outb(FLUSH_FIFO, port_base + CMD_REG);	/* reset the fifos */  in SYM53C500_queue_lck()
576 		outb(SCpnt->cmnd[i], port_base + SCSI_FIFO);  in SYM53C500_queue_lck()
578 	outb(SELECT_NO_ATN, port_base + CMD_REG);  in SYM53C500_queue_lck()
732 		outb(0xb4, link->resource[0]->start + 0xd);  in SYM53C500_config()
733 		outb(0x24, link->resource[0]->start + 0x9);  in SYM53C500_config()
734 		outb(0x04, link->resource[0]->start + 0xd);  in SYM53C500_config()
820 		outb(0x80, link->resource[0]->start + 0xd);  in sym53c500_resume()
821 		outb(0x24, link->resource[0]->start + 0x9);  in sym53c500_resume()
822 		outb(0x04, link->resource[0]->start + 0xd);  in sym53c500_resume()