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Searched refs:orr (Results 1 – 25 of 118) sorted by relevance

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/linux/arch/arm/lib/
H A Dio-readsb.S39 orr r3, r3, r4, put_byte_1
41 orr r3, r3, r5, put_byte_2
43 orr r3, r3, r6, put_byte_3
47 orr r4, r4, r5, put_byte_1
49 orr r4, r4, r6, put_byte_2
51 orr r4, r4, ip, put_byte_3
55 orr r5, r5, r6, put_byte_1
57 orr r5, r5, ip, put_byte_2
59 orr r5, r5, lr, put_byte_3
62 orr r6, r6, ip, put_byte_1
[all …]
H A Dio-writesw-armv3.S25 orr r3, r3, r3, lsl #16
44 orr ip, ip, ip, lsr #16
48 orr ip, ip, ip, lsl #16
52 orr ip, ip, ip, lsr #16
56 orr ip, ip, ip, lsl #16
60 orr ip, ip, ip, lsr #16
64 orr ip, ip, ip, lsl #16
68 orr ip, ip, ip, lsr #16
72 orr ip, ip, ip, lsl #16
87 orr ip, ip, ip, lsr #16
[all …]
H A Dcsumpartialcopygeneric.S177 orr r4, r4, r5, lspush #24
179 orr r5, r5, r6, lspush #24
181 orr r6, r6, r7, lspush #24
183 orr r7, r7, r8, lspush #24
198 orr r4, r4, r5, lspush #24
200 orr r5, r5, r6, lspush #24
208 orr r4, r4, r5, lspush #24
229 orr r4, r4, r5, lspush #16
231 orr r5, r5, r6, lspush #16
233 orr r6, r6, r7, lspush #16
[all …]
H A Dio-readsw-armv3.S36 orr ip, ip, ip, lsl #8
45 orr r3, r3, r4, lsl #16
50 orr r4, r4, r5, lsl #16
55 orr r5, r5, r6, lsl #16
60 orr r6, r6, lr, lsl #16
76 orr r3, r3, r4, lsl #16
81 orr r4, r4, r5, lsl #16
91 orr r3, r3, r4, lsl #16
H A Dmemmove.S158 orr lr, lr, ip, lspull #\pull
160 orr ip, ip, r10, lspull #\pull
162 orr r10, r10, r9, lspull #\pull
164 orr r9, r9, r8, lspull #\pull
166 orr r8, r8, r6, lspull #\pull
168 orr r6, r6, r5, lspull #\pull
170 orr r5, r5, r4, lspull #\pull
172 orr r4, r4, r3, lspull #\pull
186 orr lr, lr, r3, lspull #\pull
H A Dcopy_template.S208 orr r3, r3, r4, lspush #\push
210 orr r4, r4, r5, lspush #\push
212 orr r5, r5, r6, lspush #\push
214 orr r6, r6, r8, lspush #\push
216 orr r8, r8, r9, lspush #\push
218 orr r9, r9, r10, lspush #\push
220 orr r10, r10, ip, lspush #\push
222 orr ip, ip, lr, lspush #\push
236 orr r3, r3, lr, lspush #\push
/linux/drivers/scsi/arm/
H A Dacornscsi-io.S25 orr lr, lr, #0xff00
31 orr r3, r3, r4, lsl #16
33 orr r4, r4, r6, lsl #16
36 orr r5, r5, r6, lsl #16
38 orr r6, r6, ip, lsl #16
47 orr r3, r3, r4, lsl #16
49 orr r4, r4, r6, lsl #16
58 orr r3, r3, r4, lsl #16
83 orr r3, r3, r3, lsr #16
85 orr r4, r4, r4, lsl #16
[all …]
/linux/arch/arm/mach-omap1/
H A Dsleep.S73 orr r4, r4, #TCMIF_ASM_BASE & 0x00ff0000
74 orr r4, r4, #TCMIF_ASM_BASE & 0x0000ff00
88 orr r5, r5, #SELF_REFRESH_MODE & 0xff000000
89 orr r5, r5, #SELF_REFRESH_MODE & 0x000000ff
94 orr r5, r5, #IDLE_EMIFS_REQUEST & 0xff
99 orr r4, r4, #CLKGEN_REG_ASM_BASE & 0x00ff0000
100 orr r4, r4, #CLKGEN_REG_ASM_BASE & 0x0000ff00
104 orr r5, r5, #OMAP1510_IDLE_CLOCK_DOMAINS & 0xff00
109 orr r3, r3, #OMAP1510_DEEP_SLEEP_REQUEST & 0xff00
113 orr r5, r5, #IDLE_WAIT_CYCLES & 0xff00
[all …]
H A Dsram.S26 orr r2, r2, #OMAP1_IO_ADDRESS(DPLL_CTL) & 0x00ff0000
27 orr r2, r2, #OMAP1_IO_ADDRESS(DPLL_CTL) & 0x0000ff00
30 orr r3, r3, #OMAP1_IO_ADDRESS(ARM_CKCTL) & 0x00ff0000
31 orr r3, r3, #OMAP1_IO_ADDRESS(ARM_CKCTL) & 0x0000ff00
37 orr r0, r0, #1 << 4 @ set lock bit again
44 orr r4, r4, #0x00ff
/linux/arch/arm/mach-at91/
H A Dpm_suspend.S92 orr \reg, \reg, #0x200000
143 orr tmp1, tmp1, #UDDRC_PWRCTL_SELFREF_SW
164 orr tmp1, tmp1, #DDR3PHY_DXDLLCR_DLLDIS
168 orr tmp1, tmp1, #DDR3PHY_DXDLLCR_DLLDIS
174 orr tmp1, tmp1, #DDR3PHY_DXCCR_DXPDR
179 orr tmp1, tmp1, #DDR3PHY_ACIORC_ACPDD
180 orr tmp1, tmp1, #DDR3PHY_ACIOCR_CKPDD_CK0
181 orr tmp1, tmp1, #DDR3PHY_ACIOCR_CSPDD_CS0
186 orr tmp1, tmp1, #DDR3PHY_DSGCR_ODTPDD_ODT0
260 orr tmp1, tmp1, #UDDRC_DFIMISC_DFI_INIT_COMPLETE_EN
[all …]
/linux/arch/arm64/lib/
H A Dstrlen.S97 orr tmp2, data1, REP8_7f
99 orr tmp4, data2, REP8_7f
126 orr tmp2, tmp1, tmp3
132 orr tmp2, tmp1, tmp3
138 orr tmp2, data1, REP8_7f
139 orr tmp4, data2, REP8_7f
155 orr tmp2, data1, REP8_7f
171 orr tmp2, data1, REP8_7f
173 orr tmp4, data2, REP8_7f
180 orr tmp2, data1, REP8_7f
[all …]
H A Dstrcmp.S73 orr tmp, tmp, REP8_7f
76 orr tmp, data1, REP8_7f
85 orr syndrome, diff, has_nul
117 orr data1, data1, tmp
118 orr data2, data2, tmp
142 orr data3, data3, tmp
144 orr tmp, data3, REP8_7f
159 orr tmp, data3, REP8_7f
170 orr syndrome, diff, tmp
182 orr syndrome, diff, has_nul
H A Dstrncmp.S80 orr tmp2, data1, #REP8_7f
90 orr syndrome, diff, has_nul
121 orr has_nul, has_nul, mask
139 orr tmp2, tmp3, #REP8_7f
142 orr syndrome, diff, has_nul
174 orr data1, data1, tmp2
175 orr data2, data2, tmp2
249 orr data2, data2, tmp1 /* 8 bytes from SRC2 combined from two regs.*/
252 orr tmp3, data1, #REP8_7f
255 orr tmp3, endloop, has_nul
[all …]
H A Dstrnlen.S75 orr tmp2, data1, #REP8_7f
77 orr tmp4, data2, #REP8_7f
81 orr tmp1, has_nul1, has_nul2
107 CPU_BE( orr tmp2, data2, #REP8_7f )
149 orr data1, data1, tmp2
150 orr data2a, data2, tmp2
/linux/arch/arm/mm/
H A Dproc-v7-2level.S46 ALT_SMP(orr r0, r0, #TTB_FLAGS_SMP)
47 ALT_UP(orr r0, r0, #TTB_FLAGS_UP)
80 orr r3, r3, r2
81 orr r3, r3, #PTE_EXT_AP0 | 2
148 ALT_SMP(orr \ttbr0l, \ttbr0l, #TTB_FLAGS_SMP)
149 ALT_UP(orr \ttbr0l, \ttbr0l, #TTB_FLAGS_UP)
150 ALT_SMP(orr \ttbr1, \ttbr1, #TTB_FLAGS_SMP)
151 ALT_UP(orr \ttbr1, \ttbr1, #TTB_FLAGS_UP)
H A Dproc-v6.S107 ALT_SMP(orr r0, r0, #TTB_FLAGS_SMP)
108 ALT_UP(orr r0, r0, #TTB_FLAGS_UP)
116 orr r1, r1, r2 @ insert into new context ID
171 ALT_SMP(orr r1, r1, #TTB_FLAGS_SMP)
172 ALT_UP(orr r1, r1, #TTB_FLAGS_UP)
208 orr r0, r0, #0x20
220 ALT_SMP(orr r4, r4, #TTB_FLAGS_SMP)
221 ALT_UP(orr r4, r4, #TTB_FLAGS_UP)
222 ALT_SMP(orr r8, r8, #TTB_FLAGS_SMP)
223 ALT_UP(orr r8, r8, #TTB_FLAGS_UP)
[all …]
H A Dproc-v7-3level.S49 orr rpgdh, rpgdh, r2, lsl #(48 - 32) @ upper 32-bits of pgd
121 ALT_SMP(orr \tmp, \tmp, #TTB_FLAGS_SMP)
122 ALT_UP(orr \tmp, \tmp, #TTB_FLAGS_UP)
123 ALT_SMP(orr \tmp, \tmp, #TTB_FLAGS_SMP << 16)
124 ALT_UP(orr \tmp, \tmp, #TTB_FLAGS_UP << 16)
H A Dproc-v7.S172 ALT_SMP(orr r1, r1, #TTB_FLAGS_SMP)
173 ALT_UP(orr r1, r1, #TTB_FLAGS_UP)
310 orr r10, r10, #(1 << 6) @ Enable SMP/nAMP mode
313 orr r10, r10, r0 @ Set required bits
394 orr r10, r10, #1 << 12 @ set bit #12
399 orr r10, r10, #1 << 1 @ set bit #1
404 orr r10, r10, #1 << 24 @ set bit #24
409 orr r10, r10, #3 << 10 @ set bits #10 and #11
429 orr r10, r10, #3 << 10 @ set bits #10 and #11
461 orr r0, r0, #PJ4B_CLEAN_LINE
[all …]
/linux/arch/arm/mach-davinci/
H A Dsleep.S55 orr ip, ip, #DDR2_LPMODEN_BIT
59 orr ip, ip, #DDR2_MCLKSTOPEN_BIT
90 orr ip, ip, #PLLCTL_PLLPWRDN
95 orr ip, ip, #DEEPSLEEP_SLEEPENABLE_BIT
124 orr ip, ip, #PLLCTL_PLLRST
135 orr ip, ip, #PLLCTL_PLLEN
141 orr ip, ip, #PLLDIV_EN
180 orr ip, ip, r0
185 orr ip, ip, #0x1
/linux/arch/arm/mach-tegra/
H A Dreset-handler.S53 orr r1, r1, \
68 orr r1, r1, #1
158 orr r0, r0, #1 << 14 @ erratum 716044
161 orr r0, r0, #1 << 4 @ erratum 742230
162 orr r0, r0, #1 << 11 @ erratum 751472
174 orr r0, r0, #1 << 6 @ erratum 743622
175 orr r0, r0, #1 << 11 @ erratum 751472
268 orr r0, r0, #FLOW_CTRL_CSR_INTR_FLAG | FLOW_CTRL_CSR_EVENT_FLAG
269 orr r0, r0, #FLOW_CTRL_CSR_ENABLE
/linux/arch/arm/mach-sunxi/
H A Dheadsmp.S38 orr r1, r1, #(0x1 << 31)
44 orr r1, r1, #(0x1 << 26)
46 orr r1, r1, #(0x1<<3)
52 orr r1, r1, #(0x3 << 0)
/linux/arch/arm/mach-pxa/
H A Dstandby.S74 orr r0, r0, #PXA3_RCOMP_SWEVAL
81 orr r0, r0, #PXA3_DMCIER_EDLP
86 orr r0, r0, #PXA3_DDR_HCAL_HCEN | PXA3_DDR_HCAL_HCPROG
94 orr r0, r0, #PXA3_MDCNFG_DMCEN
101 orr r0, r0, #2 @ HCRNG
/linux/arch/arm/kernel/
H A Dhead-nommu.S171 orr r0, r0, #CR_A
236 orr \acr, \acr, \sr
278 orr r6, r6, #(1 << PMSAv7_RSR_EN) @ Set region enabled bit
325 orr r6, r6, #(1 << PMSAv7_RSR_EN) @ Set region enabled bit
347 orr r5, r5, #(PMSAv8_AP_PL1RW_PL0NA | PMSAv8_RGN_SHARED)
348 orr r6, r6, #(PMSAv8_LAR_IDX(PMSAv8_RGN_NORMAL) | PMSAv8_LAR_EN)
361 orr r5, r5, #(PMSAv8_AP_PL1RW_PL0NA | PMSAv8_RGN_SHARED)
362 orr r6, r6, #(PMSAv8_LAR_IDX(PMSAv8_RGN_NORMAL) | PMSAv8_LAR_EN)
385 orr r5, r5, #(PMSAv8_AP_PL1RW_PL0NA | PMSAv8_RGN_SHARED | PMSAv8_BAR_XN)
386 orr r6, r6, #(PMSAv8_LAR_IDX(PMSAv8_RGN_DEVICE_nGnRnE) | PMSAv8_LAR_EN)
[all …]
/linux/arch/arm/mach-omap2/
H A Dsram242x.S52 orr r10, r10, #0x8 @ make sure DLL on (es2 bit pos)
53 orr r10, r10, #0x2 @ 90 degree phase for all below 133MHz
101 orr r5, r5, r9 @ bulld value for L0/L1-volt operation.
104 orr r5, r5, r3 @ build value for force
157 orr r3, r3, #0x3
159 orr r3, r3, r0 @ new state value
196 orr r8, r8, r9 @ bulld value for L0/L1-volt operation.
199 orr r8, r8, r7 @ build value for force
242 orr r7, r5, #0x2 @ fast relock val
272 orr r8, r7, #0x3 @ val for lock dpll
[all …]
H A Dsram243x.S52 orr r10, r10, #0x8 @ make sure DLL on (es2 bit pos)
53 orr r10, r10, #0x2 @ 90 degree phase for all below 133MHz
101 orr r5, r5, r9 @ bulld value for L0/L1-volt operation.
104 orr r5, r5, r3 @ build value for force
157 orr r3, r3, #0x3
159 orr r3, r3, r0 @ new state value
196 orr r8, r8, r9 @ bulld value for L0/L1-volt operation.
199 orr r8, r8, r7 @ build value for force
242 orr r7, r5, #0x2 @ fast relock val
272 orr r8, r7, #0x3 @ val for lock dpll
[all …]

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