| /linux/drivers/clocksource/ |
| H A D | timer-sp.h | 42 int mis; member
58 void __iomem *mis; member
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| /linux/drivers/pinctrl/starfive/ |
| H A D | pinctrl-starfive-jh7110-aon.c | 100 unsigned long mis; in jh7110_aon_irq_handler() local
105 mis = readl_relaxed(sfp->base + JH7110_AON_GPIOMIS); in jh7110_aon_irq_handler()
106 for_each_set_bit(pin, &mis, JH7110_AON_NGPIO) in jh7110_aon_irq_handler()
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| H A D | pinctrl-starfive-jh7110-sys.c | 367 unsigned long mis; in jh7110_sys_irq_handler() local
372 mis = readl_relaxed(sfp->base + JH7110_SYS_GPIOMIS0); in jh7110_sys_irq_handler()
373 for_each_set_bit(pin, &mis, 32) in jh7110_sys_irq_handler()
376 mis = readl_relaxed(sfp->base + JH7110_SYS_GPIOMIS1); in jh7110_sys_irq_handler()
377 for_each_set_bit(pin, &mis, 32) in jh7110_sys_irq_handler()
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| H A D | pinctrl-starfive-jh7100.c | 1177 unsigned long mis; in starfive_gpio_irq_handler() local
1182 mis = readl_relaxed(sfp->base + GPIOMIS + 0); in starfive_gpio_irq_handler()
1183 for_each_set_bit(pin, &mis, 32) in starfive_gpio_irq_handler()
1186 mis = readl_relaxed(sfp->base + GPIOMIS + 4); in starfive_gpio_irq_handler()
1187 for_each_set_bit(pin, &mis, 32) in starfive_gpio_irq_handler()
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| /linux/fs/ceph/ |
| H A D | metric.h | 68 __le64 mis; member
103 __le64 mis; member
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| H A D | metric.c | 69 cap->mis = cpu_to_le64(percpu_counter_sum(&m->i_caps_mis)); in ceph_mdsc_send_metrics()
119 dlease->mis = cpu_to_le64(percpu_counter_sum(&m->d_lease_mis)); in ceph_mdsc_send_metrics()
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| /linux/drivers/pinctrl/spear/ |
| H A D | pinctrl-plgpio.c | 49 u32 mis; /* mask interrupt status register */ member
383 regmap_read(plgpio->regmap, plgpio->regs.mis + in plgpio_irq_handler()
389 regmap_write(plgpio->regmap, plgpio->regs.mis + in plgpio_irq_handler()
509 plgpio->regs.mis = val; in plgpio_probe_dt()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dce110/ |
| H A D | dce110_resource.c | 826 if (pool->base.mis[i] != NULL) { in dce110_resource_destruct()
827 kfree(TO_DCE_MEM_INPUT(pool->base.mis[i])); in dce110_resource_destruct()
828 pool->base.mis[i] = NULL; in dce110_resource_destruct()
1138 pipe_ctx->plane_res.mi = pool->mis[underlay_idx]; in dce110_acquire_underlay()
1272 pool->mis[pool->pipe_count] = &dce110_miv->base; in underlay_create()
1453 pool->base.mis[i] = dce110_mem_input_create(ctx, i); in dce110_resource_construct()
1454 if (pool->base.mis[i] == NULL) { in dce110_resource_construct()
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| /linux/arch/x86/events/intel/ |
| H A D | lbr.c | 781 u64 from, to, mis = 0, pred = 0, in_tx = 0, abort = 0; in intel_pmu_lbr_read_64() local
799 mis = !!(info & LBR_INFO_MISPRED); in intel_pmu_lbr_read_64()
800 pred = !mis; in intel_pmu_lbr_read_64()
811 mis = !!(from & LBR_FROM_FLAG_MISPRED); in intel_pmu_lbr_read_64()
812 pred = !mis; in intel_pmu_lbr_read_64()
842 br[out].mispred = mis; in intel_pmu_lbr_read_64()
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| /linux/drivers/net/ethernet/realtek/rtase/ |
| H A D | rtase_main.c | 214 u32 len = ring->mis.len[entry]; in rtase_tx_clear_range()
221 ring->mis.len[entry] = 0; in rtase_tx_clear_range()
285 rtase_unmap_tx_skb(tp->pdev, ring->mis.len[entry], desc); in tx_handler()
286 ring->mis.len[entry] = 0; in tx_handler()
332 ring->mis.len[i] = 0; in rtase_tx_desc_init()
408 &ring->mis.data_phy_addr[i]); in rtase_rx_ring_fill()
543 ring->mis.data_phy_addr[entry], in rx_handler()
596 ring->mis.data_phy_addr[i] = 0; in rtase_rx_desc_init()
1281 ring->mis.len[entry] = len; in rtase_xmit_frags()
1380 ring->mis.len[entry] = len; in rtase_start_xmit()
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| H A D | rtase.h | 289 } mis; member
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dce112/ |
| H A D | dce112_resource.c | 791 if (pool->base.mis[i] != NULL) { in dce112_resource_destruct()
792 kfree(TO_DCE_MEM_INPUT(pool->base.mis[i])); in dce112_resource_destruct()
793 pool->base.mis[i] = NULL; in dce112_resource_destruct()
1340 pool->base.mis[i] = dce112_mem_input_create(ctx, i); in dce112_resource_construct()
1341 if (pool->base.mis[i] == NULL) { in dce112_resource_construct()
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| /linux/arch/arm/boot/dts/st/ |
| H A D | spear310.dtsi | 109 st-plgpio,mis-reg = <0x60>;
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| H A D | spear320.dtsi | 137 st-plgpio,mis-reg = <0x84>;
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| H A D | spear1340.dtsi | 162 st-plgpio,mis-reg = <0xa0>;
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| H A D | spear1310.dtsi | 302 st-plgpio,mis-reg = <0x10>;
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| /linux/Documentation/staging/ |
| H A D | speculation.rst | 42 It is possible that a CPU mis-predicts the conditional branch, and
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| /linux/drivers/media/dvb-frontends/ |
| H A D | stv0900_core.c | 1544 enum fe_stv0900_demod_num demod, int mis) in stv0900_set_mis() argument
1548 if (mis < 0 || mis > 255) { in stv0900_set_mis()
1552 dprintk("Enable MIS filtering - %d\n", mis); in stv0900_set_mis()
1554 stv0900_write_reg(intp, ISIENTRY, mis); in stv0900_set_mis()
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| H A D | stv090x.c | 3441 static int stv090x_set_mis(struct stv090x_state *state, int mis) in stv090x_set_mis() argument
3445 if (mis < 0 || mis > 255) { in stv090x_set_mis()
3452 dprintk(FE_DEBUG, 1, "Enable MIS filtering - %d", mis); in stv090x_set_mis()
3457 if (STV090x_WRITE_DEMOD(state, ISIENTRY, mis) < 0) in stv090x_set_mis()
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| /linux/Documentation/networking/ |
| H A D | tls.rst | 283 ``TLS_RX_EXPECT_NO_PAD`` mis-prediction. Note that this counter will
288 ``TLS_RX_EXPECT_NO_PAD`` mis-prediction.
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| /linux/tools/perf/Documentation/ |
| H A D | tips.txt | 19 Profiling branch (mis)predictions with: perf record -b / perf report
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| /linux/Documentation/admin-guide/hw-vuln/ |
| H A D | srso.rst | 20 but the concern is that an attacker can mis-train the CPU BTB to predict
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| /linux/Documentation/networking/device_drivers/ethernet/toshiba/ |
| H A D | spider_net.rst | 62 The head pointer (somewhat mis-named) follows after the tail pointer.
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| /linux/fs/befs/ |
| H A D | ChangeLog | 125 * Added workaround for mis-understanding of the nature of the b+trees used
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| /linux/tools/perf/ |
| H A D | design.txt | 7 as instructions executed, cachemisses suffered, or branches mis-predicted -
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