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Searched refs:min_clock_in_sr (Results 1 – 11 of 11) sorted by relevance

/linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dvega12_hwmgr.h146 uint32_t min_clock_in_sr; member
H A Dvega10_hwmgr.h168 uint32_t min_clock_in_sr; member
H A Dvega20_hwmgr.h200 uint32_t min_clock_in_sr; member
H A Dsmu7_hwmgr.c4229 if (data->display_timing.min_clock_in_sr != min_clocks.engineClockInSR && in smu7_find_dpm_states_clocks_in_dpm_table()
4231 data->display_timing.min_clock_in_sr >= SMU7_MINIMUM_ENGINE_CLOCK)) in smu7_find_dpm_states_clocks_in_dpm_table()
4814 if (data->display_timing.min_clock_in_sr != hwmgr->display_config->min_core_set_clock_in_sr && in smu7_check_smc_update_required_for_display_configuration()
4815 (data->display_timing.min_clock_in_sr >= SMU7_MINIMUM_ENGINE_CLOCK || in smu7_check_smc_update_required_for_display_configuration()
H A Dvega12_hwmgr.c2635 if (data->display_timing.min_clock_in_sr != hwmgr->display_config->min_core_set_clock_in_sr) in vega12_check_smc_update_required_for_display_configuration()
H A Dvega20_hwmgr.c3965 (data->display_timing.min_clock_in_sr != in vega20_check_smc_update_required_for_display_configuration()
/linux/drivers/gpu/drm/amd/pm/powerplay/smumgr/
H A Diceland_smumgr.c931 data->display_timing.min_clock_in_sr = in iceland_populate_single_graphic_level()
938 data->display_timing.min_clock_in_sr); in iceland_populate_single_graphic_level()
H A Dtonga_smumgr.c658 data->display_timing.min_clock_in_sr = in tonga_populate_single_graphic_level()
665 data->display_timing.min_clock_in_sr); in tonga_populate_single_graphic_level()
H A Dvegam_smumgr.c839 data->display_timing.min_clock_in_sr = hwmgr->display_config->min_core_set_clock_in_sr; in vegam_populate_single_graphic_level()
H A Dfiji_smumgr.c974 data->display_timing.min_clock_in_sr = hwmgr->display_config->min_core_set_clock_in_sr; in fiji_populate_single_graphic_level()
H A Dpolaris10_smumgr.c993 data->display_timing.min_clock_in_sr = hwmgr->display_config->min_core_set_clock_in_sr; in polaris10_populate_single_graphic_level()