Home
last modified time | relevance | path

Searched refs:mclk_table (Results 1 – 10 of 10) sorted by relevance

/linux/drivers/gpu/drm/amd/pm/powerplay/smumgr/
H A Dci_smumgr.c1315 for (i = 0; i < dpm_table->mclk_table.count; i++) { in ci_populate_all_memory_levels()
1316 PP_ASSERT_WITH_CODE((0 != dpm_table->mclk_table.dpm_levels[i].value), in ci_populate_all_memory_levels()
1318 result = ci_populate_single_memory_level(hwmgr, dpm_table->mclk_table.dpm_levels[i].value, in ci_populate_all_memory_levels()
1324 if (data->mclk_dpm_key_disabled && dpm_table->mclk_table.count) { in ci_populate_all_memory_levels()
1326 for (i = 0; i < dpm_table->mclk_table.count - 1; i++) { in ci_populate_all_memory_levels()
1327 levels[i] = levels[dpm_table->mclk_table.count - 1]; in ci_populate_all_memory_levels()
1336 if ((dpm_table->mclk_table.count >= 2) && in ci_populate_all_memory_levels()
1347 smu_data->smc_state_table.MemoryDpmLevelCount = (uint8_t)dpm_table->mclk_table.count; in ci_populate_all_memory_levels()
1348 …vel_enable_mask.mclk_dpm_enable_mask = phm_get_dpm_level_enable_mask_value(&dpm_table->mclk_table); in ci_populate_all_memory_levels()
1349 …smu_data->smc_state_table.MemoryLevel[dpm_table->mclk_table.count-1].DisplayWatermark = PPSMC_DISP… in ci_populate_all_memory_levels()
[all …]
H A Diceland_smumgr.c1361 for (i = 0; i < dpm_table->mclk_table.count; i++) { in iceland_populate_all_memory_levels()
1362 PP_ASSERT_WITH_CODE((0 != dpm_table->mclk_table.dpm_levels[i].value), in iceland_populate_all_memory_levels()
1364 result = iceland_populate_single_memory_level(hwmgr, dpm_table->mclk_table.dpm_levels[i].value, in iceland_populate_all_memory_levels()
1382 smu_data->smc_state_table.MemoryDpmLevelCount = (uint8_t)dpm_table->mclk_table.count; in iceland_populate_all_memory_levels()
1383 …vel_enable_mask.mclk_dpm_enable_mask = phm_get_dpm_level_enable_mask_value(&dpm_table->mclk_table); in iceland_populate_all_memory_levels()
1385 …smu_data->smc_state_table.MemoryLevel[dpm_table->mclk_table.count-1].DisplayWatermark = PPSMC_DISP… in iceland_populate_all_memory_levels()
1622 for (j = 0; j < data->dpm_table.mclk_table.count; j++) { in iceland_program_memory_timing_parameters()
1625 data->dpm_table.mclk_table.dpm_levels[j].value, in iceland_program_memory_timing_parameters()
1667 result = phm_find_boot_level(&(data->dpm_table.mclk_table), in iceland_populate_smc_boot_level()
1761 for (i = 0; i < data->dpm_table.mclk_table.count; i++) { in iceland_convert_mc_reg_table_to_smc()
[all …]
H A Dvegam_smumgr.c1049 for (i = 0; i < dpm_table->mclk_table.count; i++) { in vegam_populate_all_memory_levels()
1050 PP_ASSERT_WITH_CODE((0 != dpm_table->mclk_table.dpm_levels[i].value), in vegam_populate_all_memory_levels()
1054 dpm_table->mclk_table.dpm_levels[i].value, in vegam_populate_all_memory_levels()
1067 (uint8_t)dpm_table->mclk_table.count; in vegam_populate_all_memory_levels()
1069 phm_get_dpm_level_enable_mask_value(&dpm_table->mclk_table); in vegam_populate_all_memory_levels()
1071 for (i = 0; i < dpm_table->mclk_table.count; i++) in vegam_populate_all_memory_levels()
1075 levels[dpm_table->mclk_table.count - 1].DisplayWatermark = in vegam_populate_all_memory_levels()
1288 for (j = 0; j < hw_data->dpm_table.mclk_table.count; j++) { in vegam_program_memory_timing_parameters()
1291 hw_data->dpm_table.mclk_table.dpm_levels[j].value, in vegam_program_memory_timing_parameters()
1380 result = phm_find_boot_level(&(data->dpm_table.mclk_table), in vegam_populate_smc_boot_level()
H A Dfiji_smumgr.c1234 for (i = 0; i < dpm_table->mclk_table.count; i++) { in fiji_populate_all_memory_levels()
1235 PP_ASSERT_WITH_CODE((0 != dpm_table->mclk_table.dpm_levels[i].value), in fiji_populate_all_memory_levels()
1239 dpm_table->mclk_table.dpm_levels[i].value, in fiji_populate_all_memory_levels()
1257 (uint8_t)dpm_table->mclk_table.count; in fiji_populate_all_memory_levels()
1259 phm_get_dpm_level_enable_mask_value(&dpm_table->mclk_table); in fiji_populate_all_memory_levels()
1261 levels[dpm_table->mclk_table.count - 1].DisplayWatermark = in fiji_populate_all_memory_levels()
1374 data->dpm_table.mclk_table.dpm_levels[0].value; in fiji_populate_smc_acpi_level()
1395 data->dpm_table.mclk_table.dpm_levels[0].value, in fiji_populate_smc_acpi_level()
1533 for (j = 0; j < data->dpm_table.mclk_table.count; j++) { in fiji_program_memory_timing_parameters()
1536 data->dpm_table.mclk_table.dpm_levels[j].value, in fiji_program_memory_timing_parameters()
[all …]
H A Dpolaris10_smumgr.c1223 for (i = 0; i < dpm_table->mclk_table.count; i++) { in polaris10_populate_all_memory_levels()
1224 PP_ASSERT_WITH_CODE((0 != dpm_table->mclk_table.dpm_levels[i].value), in polaris10_populate_all_memory_levels()
1228 dpm_table->mclk_table.dpm_levels[i].value, in polaris10_populate_all_memory_levels()
1230 if (i == dpm_table->mclk_table.count - 1) in polaris10_populate_all_memory_levels()
1237 (uint8_t)dpm_table->mclk_table.count; in polaris10_populate_all_memory_levels()
1239 phm_get_dpm_level_enable_mask_value(&dpm_table->mclk_table); in polaris10_populate_all_memory_levels()
1340 data->dpm_table.mclk_table.dpm_levels[0].value, in polaris10_populate_smc_acpi_level()
1499 for (j = 0; j < hw_data->dpm_table.mclk_table.count; j++) { in polaris10_program_memory_timing_parameters()
1502 hw_data->dpm_table.mclk_table.dpm_levels[j].value, in polaris10_program_memory_timing_parameters()
1505 result = atomctrl_set_ac_timing_ai(hwmgr, hw_data->dpm_table.mclk_table.dpm_levels[j].value, j); in polaris10_program_memory_timing_parameters()
[all …]
H A Dtonga_smumgr.c1107 for (i = 0; i < dpm_table->mclk_table.count; i++) { in tonga_populate_all_memory_levels()
1108 PP_ASSERT_WITH_CODE((0 != dpm_table->mclk_table.dpm_levels[i].value), in tonga_populate_all_memory_levels()
1113 dpm_table->mclk_table.dpm_levels[i].value, in tonga_populate_all_memory_levels()
1130 smu_data->smc_state_table.MemoryDpmLevelCount = (uint8_t)dpm_table->mclk_table.count; in tonga_populate_all_memory_levels()
1131 …vel_enable_mask.mclk_dpm_enable_mask = phm_get_dpm_level_enable_mask_value(&dpm_table->mclk_table); in tonga_populate_all_memory_levels()
1133 …smu_data->smc_state_table.MemoryLevel[dpm_table->mclk_table.count-1].DisplayWatermark = PPSMC_DISP… in tonga_populate_all_memory_levels()
1498 for (j = 0; j < data->dpm_table.mclk_table.count; j++) { in tonga_program_memory_timing_parameters()
1501 data->dpm_table.mclk_table.dpm_levels[j].value, in tonga_program_memory_timing_parameters()
1545 result = phm_find_boot_level(&(data->dpm_table.mclk_table), in tonga_populate_smc_boot_level()
2140 for (i = 0; i < data->dpm_table.mclk_table.count; i++) { in tonga_convert_mc_reg_table_to_smc()
[all …]
/linux/drivers/gpu/drm/radeon/
H A Dci_dpm.c2513 for (j = 0; j < pi->dpm_table.mclk_table.count; j++) { in ci_do_program_memory_timing_parameters()
2516 pi->dpm_table.mclk_table.dpm_levels[j].value, in ci_do_program_memory_timing_parameters()
3295 for (i = 0; i < dpm_table->mclk_table.count; i++) { in ci_populate_all_memory_levels()
3296 if (dpm_table->mclk_table.dpm_levels[i].value == 0) in ci_populate_all_memory_levels()
3299 dpm_table->mclk_table.dpm_levels[i].value, in ci_populate_all_memory_levels()
3307 if ((dpm_table->mclk_table.count >= 2) && in ci_populate_all_memory_levels()
3318 pi->smc_state_table.MemoryDpmLevelCount = (u8)dpm_table->mclk_table.count; in ci_populate_all_memory_levels()
3320 ci_get_dpm_level_enable_mask_value(&dpm_table->mclk_table); in ci_populate_all_memory_levels()
3322 pi->smc_state_table.MemoryLevel[dpm_table->mclk_table.count - 1].DisplayWatermark = in ci_populate_all_memory_levels()
3423 &pi->dpm_table.mclk_table, in ci_setup_default_dpm_tables()
[all …]
H A Dci_dpm.h70 struct ci_single_dpm_table mclk_table; member
/linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dvega12_hwmgr.c2725 struct vega12_single_dpm_table *mclk_table = &(data->dpm_table.mem_table);
2728 int value = mclk_table->dpm_levels[mclk_table->count - 1].value;
H A Dvega20_hwmgr.c1526 struct vega20_single_dpm_table *mclk_table = in vega20_get_mclk_od() local
1530 int value = mclk_table->dpm_levels[mclk_table->count - 1].value; in vega20_get_mclk_od()