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Searched refs:intrs (Results 1 – 25 of 27) sorted by relevance

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/linux/drivers/scsi/
H A Dpmcraid.c428 u32 intrs in pmcraid_disable_interrupts() argument
434 iowrite32(intrs, pinstance->int_regs.ioa_host_interrupt_clr_reg); in pmcraid_disable_interrupts()
439 iowrite32(intrs, in pmcraid_disable_interrupts()
456 u32 intrs) in pmcraid_enable_interrupts() argument
464 iowrite32(~intrs, in pmcraid_enable_interrupts()
519 u32 intrs; in pmcraid_reset_type() local
523 intrs = ioread32(pinstance->int_regs.ioa_host_interrupt_reg); in pmcraid_reset_type()
528 (intrs & PMCRAID_ERROR_INTERRUPTS)) { in pmcraid_reset_type()
534 if (intrs & INTRS_IOA_UNIT_CHECK) in pmcraid_reset_type()
580 u32 doorbells, intrs; in pmcraid_start_bist() local
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/linux/drivers/char/tpm/st33zp24/
H A Dst33zp24.c224 cur_intrs = tpm_dev->intrs; in wait_for_stat()
237 cur_intrs != tpm_dev->intrs, in wait_for_stat()
292 tpm_dev->intrs++; in tpm_ioserirq_handler()
496 tpm_dev->intrs = 0; in st33zp24_probe()
H A Dst33zp24.h22 u32 intrs; member
/linux/drivers/gpu/drm/nouveau/nvkm/subdev/mc/
H A Dgk20a.c30 .intrs = gk104_mc_intrs,
H A Dnv11.c40 .intrs = nv11_mc_intrs,
H A Dnv17.c49 .intrs = nv17_mc_intrs,
H A Dgp10b.c38 .intrs = gp100_mc_intrs,
H A Dnv50.c51 .intrs = nv50_mc_intrs,
H A Dgk104.c55 .intrs = gk104_mc_intrs,
H A Dg98.c58 .intrs = g98_mc_intrs,
H A Dg84.c58 .intrs = g84_mc_intrs,
H A Dnv44.c44 .intrs = nv17_mc_intrs,
H A Dgf100.c71 .intrs = gf100_mc_intrs,
H A Dpriv.h21 const struct nvkm_intr_data *intrs; member
H A Dgt215.c85 .intrs = gt215_mc_intrs,
H A Dgp100.c94 .intrs = gp100_mc_intrs,
H A Dnv04.c128 .intrs = nv04_mc_intrs,
H A Dbase.c140 ret = nvkm_intr_add(mc->func->intr, mc->func->intrs, &mc->subdev, in nvkm_mc_new_()
/linux/drivers/char/tpm/
H A Dtpm_i2c_nuvoton.c49 unsigned int intrs; member
177 unsigned int cur_intrs = priv->intrs; in i2c_nuvoton_wait_for_stat()
181 cur_intrs != priv->intrs, in i2c_nuvoton_wait_for_stat()
487 priv->intrs++; in i2c_nuvoton_int_handler()
/linux/drivers/gpu/drm/nouveau/nvkm/subdev/vfn/
H A Dga100.c40 .intrs = ga100_vfn_intrs,
H A Dpriv.h11 const struct nvkm_intr_data *intrs; member
H A Dbase.c51 ret = nvkm_intr_add(vfn->func->intr, vfn->func->intrs, in nvkm_vfn_new_()
/linux/drivers/ufs/core/
H A Dufs-mcq.c350 u32 intrs; in ufshcd_mcq_make_queues_operational() local
355 intrs = UFSHCD_ENABLE_MCQ_INTRS; in ufshcd_mcq_make_queues_operational()
357 intrs &= ~MCQ_CQ_EVENT_STATUS; in ufshcd_mcq_make_queues_operational()
358 ufshcd_enable_intr(hba, intrs); in ufshcd_mcq_make_queues_operational()
H A Dufshcd-priv.h9 void ufshcd_enable_intr(struct ufs_hba *hba, u32 intrs);
/linux/drivers/gpu/drm/rockchip/
H A Drockchip_drm_vop.h135 const int *intrs; member

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