xref: /linux/drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv50.c (revision 7ae9fb1b7ecbb5d85d07857943f677fd1a559b18)
1c39f472eSBen Skeggs /*
2c39f472eSBen Skeggs  * Copyright 2012 Red Hat Inc.
3c39f472eSBen Skeggs  *
4c39f472eSBen Skeggs  * Permission is hereby granted, free of charge, to any person obtaining a
5c39f472eSBen Skeggs  * copy of this software and associated documentation files (the "Software"),
6c39f472eSBen Skeggs  * to deal in the Software without restriction, including without limitation
7c39f472eSBen Skeggs  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8c39f472eSBen Skeggs  * and/or sell copies of the Software, and to permit persons to whom the
9c39f472eSBen Skeggs  * Software is furnished to do so, subject to the following conditions:
10c39f472eSBen Skeggs  *
11c39f472eSBen Skeggs  * The above copyright notice and this permission notice shall be included in
12c39f472eSBen Skeggs  * all copies or substantial portions of the Software.
13c39f472eSBen Skeggs  *
14c39f472eSBen Skeggs  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15c39f472eSBen Skeggs  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16c39f472eSBen Skeggs  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17c39f472eSBen Skeggs  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18c39f472eSBen Skeggs  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19c39f472eSBen Skeggs  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20c39f472eSBen Skeggs  * OTHER DEALINGS IN THE SOFTWARE.
21c39f472eSBen Skeggs  *
22c39f472eSBen Skeggs  * Authors: Ben Skeggs
23c39f472eSBen Skeggs  */
2454dcadd5SBen Skeggs #include "priv.h"
25c39f472eSBen Skeggs 
26fe76fe49SBen Skeggs static const struct nvkm_intr_data
27fe76fe49SBen Skeggs nv50_mc_intrs[] = {
28fe76fe49SBen Skeggs 	{ NVKM_ENGINE_DISP , 0, 0, 0x04000000, true },
29fe76fe49SBen Skeggs 	{ NVKM_ENGINE_GR   , 0, 0, 0x00001000, true },
30*2fc71a05SBen Skeggs 	{ NVKM_ENGINE_FIFO , 0, 0, 0x00000100 },
31fe76fe49SBen Skeggs 	{ NVKM_ENGINE_MPEG , 0, 0, 0x00000001, true },
32fe76fe49SBen Skeggs 	{ NVKM_SUBDEV_FB   , 0, 0, 0x00001101, true },
33fe76fe49SBen Skeggs 	{ NVKM_SUBDEV_BUS  , 0, 0, 0x10000000, true },
34fe76fe49SBen Skeggs 	{ NVKM_SUBDEV_GPIO , 0, 0, 0x00200000, true },
35fe76fe49SBen Skeggs 	{ NVKM_SUBDEV_I2C  , 0, 0, 0x00200000, true },
36fe76fe49SBen Skeggs 	{ NVKM_SUBDEV_TIMER, 0, 0, 0x00100000, true },
37c39f472eSBen Skeggs 	{},
38c39f472eSBen Skeggs };
39c39f472eSBen Skeggs 
4054dcadd5SBen Skeggs void
nv50_mc_init(struct nvkm_mc * mc)4154dcadd5SBen Skeggs nv50_mc_init(struct nvkm_mc *mc)
42c39f472eSBen Skeggs {
4325e3a463SBen Skeggs 	struct nvkm_device *device = mc->subdev.device;
4425e3a463SBen Skeggs 	nvkm_wr32(device, 0x000200, 0xffffffff); /* everything on */
45c39f472eSBen Skeggs }
46c39f472eSBen Skeggs 
4754dcadd5SBen Skeggs static const struct nvkm_mc_func
4854dcadd5SBen Skeggs nv50_mc = {
49c39f472eSBen Skeggs 	.init = nv50_mc_init,
50fe76fe49SBen Skeggs 	.intr = &nv04_mc_intr,
51fe76fe49SBen Skeggs 	.intrs = nv50_mc_intrs,
52ebb195dbSBen Skeggs 	.device = &nv04_mc_device,
5379360b7dSBen Skeggs 	.reset = nv17_mc_reset,
5454dcadd5SBen Skeggs };
5554dcadd5SBen Skeggs 
5654dcadd5SBen Skeggs int
nv50_mc_new(struct nvkm_device * device,enum nvkm_subdev_type type,int inst,struct nvkm_mc ** pmc)571fc2fddfSBen Skeggs nv50_mc_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, struct nvkm_mc **pmc)
5854dcadd5SBen Skeggs {
591fc2fddfSBen Skeggs 	return nvkm_mc_new_(&nv50_mc, device, type, inst, pmc);
6054dcadd5SBen Skeggs }
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