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/linux/Documentation/driver-api/cxl/linux/
H A Dcxl-driver.rst40 :caption: Diagraph of CXL fabric with a host-bridge interleave memory region
191 :caption: Diagraph of CXL fabric with a host-bridge interleave memory region
242 Decoders may have one or more `Downstream Targets` if configured to interleave
248 A `Root Decoder` is logical construct of the physical address and interleave
263 of a root decoder are `Host Bridges`, which means interleave done at the root
274 Interleave settings in a root decoder describe how to interleave accesses among
275 the *immediate downstream targets*, not the entire interleave set.
324 is a multi-downstream-port interleave (or `Intra-Host-Bridge Interleave` for
327 Interleave settings in a switch decoder describe how to interleave accesses
328 among the *immediate downstream targets*, not the entire interleave set.
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/linux/Documentation/devicetree/bindings/sound/
H A Dmax98373.txt15 interleave slot.
24 - maxim,interleave-mode : For cases where a single combined channel
29 Boolean, define to enable the interleave mode, Default : false
39 maxim,interleave-mode;
/linux/sound/pci/echoaudio/
H A Dechoaudio_dsp.c789 if (format->interleave > 2) { in set_audio_format()
801 dsp_format |= format->interleave; in set_audio_format()
804 switch (format->interleave) { in set_audio_format()
814 } else if (format->interleave == 1 && in set_audio_format()
822 if (format->interleave == 2) in set_audio_format()
829 if (format->interleave == 2) in set_audio_format()
835 if (format->interleave == 2) in set_audio_format()
841 if (format->interleave == 2) in set_audio_format()
1055 int pipe_index, int interleave) in allocate_pipes() argument
1061 "allocate_pipes: ch=%d int=%d\n", pipe_index, interleave); in allocate_pipes()
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H A Dechoaudio.h316 short interleave; member
326 u8 interleave; /* How the data is arranged in memory: member
/linux/Documentation/driver-api/cxl/linux/example-configurations/
H A Dmulti-interleave.rst11 * The CXL root is configured to interleave across the two host bridges.
144 which has the same interleave configuration as :code:`region0` (shown later).
147 which has the same interleave configuration as :code:`region0` (shown later).
326 applies the interleave across the downstream ports :code:`port1` and
359 :code:`decoder0.0`. This region describes the overall interleave configuration
360 of the interleave set. So we see there are a total of :code:`4` interleave
H A Dhb-interleave.rst11 * The CXL root is configured to interleave across the two host bridges.
117 which has the same interleave configuration as :code:`region0` (shown later).
250 applies the interleave across the downstream ports :code:`port1` and
283 :code:`decoder0.0`. This region describes the overall interleave configuration
284 of the interleave set.
H A Dintra-hb-interleave.rst11 * The Host bridge decoder is programmed to interleave across the expanders.
143 which has the same interleave configuration memory region they belong to
234 applies the interleave across the downstream ports :code:`port1` and
260 :code:`decoder0.0`. This region describes the overall interleave configuration
261 of the interleave set.
H A Dsingle-device.rst11 * No interleave is present.
116 which has the same interleave configuration as :code:`region0` (shown later).
/linux/drivers/mtd/chips/
H A Dcfi_util.c43 unsigned interleave = cfi_interleave(cfi); in cfi_build_cmd_addr() local
47 addr = (cmd_ofs * type) * interleave; in cfi_build_cmd_addr()
54 if (((type * interleave) > bankwidth) && ((cmd_ofs & 0xff) == 0xaa)) in cfi_build_cmd_addr()
55 addr |= (type >> 1)*interleave; in cfi_build_cmd_addr()
222 int osf = cfi->interleave * cfi->device_type; /* scale factor */ in cfi_qry_present()
302 int ofs_factor = cfi->interleave * cfi->device_type; in cfi_read_pri()
H A DKconfig128 bool "Support 1-chip flash interleave" if MTD_CFI_GEOMETRY
135 bool "Support 2-chip flash interleave" if MTD_CFI_GEOMETRY
142 bool "Support 4-chip flash interleave" if MTD_CFI_GEOMETRY
149 bool "Support 8-chip flash interleave" if MTD_CFI_GEOMETRY
H A Dcfi_cmdset_0001.c623 unsigned long devsize = (1<<cfi->cfiq->DevSize) * cfi->interleave; in cfi_intelext_setup()
638 ersize = ((cfi->cfiq->EraseRegionInfo[i] >> 8) & ~0xff) * cfi->interleave; in cfi_intelext_setup()
757 mtd->writesize = cfi->interleave << prinfo->ProgRegShift; in cfi_intelext_partition_fixup()
761 cfi->interleave * prinfo->ControlValid, in cfi_intelext_partition_fixup()
762 cfi->interleave * prinfo->ControlInvalid); in cfi_intelext_partition_fixup()
813 map->name, cfi->numchips, cfi->interleave, in cfi_intelext_partition_fixup()
2095 int status, ofs_factor = cfi->interleave * cfi->device_type; in do_getlockstatus_oneblock()
2337 devsize = (1 << cfi->cfiq->DevSize) * cfi->interleave; in cfi_intelext_otp_walk()
2367 data_offset *= cfi->interleave * cfi->device_type; in cfi_intelext_otp_walk()
2368 reg_prot_offset *= cfi->interleave * cfi->device_type; in cfi_intelext_otp_walk()
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/linux/Documentation/driver-api/cxl/
H A Dtheory-of-operation.rst28 Platform firmware enumerates a menu of interleave options at the "CXL root port"
32 at which the interleave can be split. For example, platform firmware may say a
34 interleave cycles across multiple Root Ports. An intervening Switch between a
35 port and an endpoint may interleave cycles across multiple Downstream Switch
251 participate". A given expander can participate in multiple CXL.mem interleave
253 example mem3 can participate in one or more of a PMEM interleave that spans two
254 Host Bridges, a PMEM interleave that targets a single Host Bridge, a Volatile
255 memory interleave that spans 2 Host Bridges, and a Volatile memory interleave
/linux/arch/sparc/kernel/
H A Dchmc.c84 int interleave; member
651 bp->interleave = 1; in chmc_interpret_one_decode_reg()
655 bp->interleave = 2; in chmc_interpret_one_decode_reg()
659 bp->interleave = 4; in chmc_interpret_one_decode_reg()
663 bp->interleave = 8; in chmc_interpret_one_decode_reg()
667 bp->interleave = 16; in chmc_interpret_one_decode_reg()
676 bp->size /= bp->interleave; in chmc_interpret_one_decode_reg()
/linux/include/linux/mtd/
H A Dcfi.h28 # define cfi_interleave(cfi) ((cfi)->interleave)
40 # define cfi_interleave(cfi) ((cfi)->interleave)
52 # define cfi_interleave(cfi) ((cfi)->interleave)
276 int interleave; member
/linux/tools/testing/selftests/bpf/progs/
H A Dlocal_storage_bench.c43 const volatile unsigned int interleave; variable
85 if (interleave && map_idx % 3 == 0) in loop()
/linux/tools/testing/selftests/bpf/benchs/
H A Dbench_local_storage.c187 skel->rodata->interleave = 0; in hashmap_setup()
202 skel->rodata->interleave = 0; in local_storage_cache_get_setup()
217 skel->rodata->interleave = 1; in local_storage_cache_get_interleaved_setup()
/linux/drivers/scsi/esas2r/
H A Desas2r_targdb.c145 if (dc->interleave == 0 in esas2r_targ_db_add_raid()
157 t->inter_byte = dc->interleave; in esas2r_targ_db_add_raid()
158 t->inter_block = dc->interleave / dc->block_size; in esas2r_targ_db_add_raid()
/linux/tools/perf/scripts/python/
H A Dintel-pt-events.py105 if glb_args.interleave:
130 countdown = glb_args.interleave
436 if glb_args.interleave:
446 if glb_args.interleave:
467 if glb_args.interleave:
/linux/Documentation/translations/zh_CN/filesystems/
H A Dtmpfs.rst80 mpol=interleave 倾向于依次从每个节点分配
81 mpol=interleave:NodeList 依次从每个节点分配
/linux/Documentation/translations/zh_TW/filesystems/
H A Dtmpfs.rst80 mpol=interleave 傾向於依次從每個節點分配
81 mpol=interleave:NodeList 依次從每個節點分配
/linux/Documentation/driver-api/cxl/platform/acpi/
H A Dcedt.rst31 describes any inter-host-bridge interleave configuration that may have been
60 INTRA-host-bridge interleave (multiple devices on one host bridge) is NOT
H A Dhmat.rst16 This table is used by Linux to configure interleave weights and memory tiers.
/linux/Documentation/ABI/testing/
H A Dsysfs-kernel-mm-mempolicy-weighted-interleave11 The interleave weight for a memory node (N). These weights are
34 Configuration mode for weighted interleave. 'true' indicates
H A Dsysfs-bus-cxl296 configured interleave order of the decoder's dport instances.
395 decoder's position in the interleave is determined by the
397 decoders their interleave is specified by platform firmware and
408 to the next target in the interleave at address N +
420 (interleave-set) within the decode range bounded by root decoder
470 interleave set will claim. The possible interleave granularity
495 interleave configuration parameters. Once set it cannot be
541 interleave and N is the 'interleave_ways' setting for the
544 position relative to the root decoder interleave. EBUSY is
546 if the region is not in a state to accept interleave
/linux/Documentation/driver-api/cxl/platform/
H A Dexample-configs.rst12 example-configurations/hb-interleave.rst

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