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/linux/drivers/mtd/nand/raw/
H A Dnand_base.c1146 struct nand_op_instr instrs[] = { in nand_sp_exec_read_page_op() local
1153 struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs); in nand_sp_exec_read_page_op()
1161 instrs[0].ctx.cmd.opcode = NAND_CMD_READOOB; in nand_sp_exec_read_page_op()
1164 instrs[0].ctx.cmd.opcode = NAND_CMD_READ1; in nand_sp_exec_read_page_op()
1175 instrs[1].ctx.addr.naddrs++; in nand_sp_exec_read_page_op()
1188 struct nand_op_instr instrs[] = { in nand_lp_exec_read_page_op() local
1196 struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs); in nand_lp_exec_read_page_op()
1212 instrs[1].ctx.addr.naddrs++; in nand_lp_exec_read_page_op()
1401 struct nand_op_instr instrs[] = { in nand_read_param_page_op() local
1409 struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs); in nand_read_param_page_op()
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H A Dfsl_upm.c148 ret = func_exec_instr(chip, &op->instrs[i]); in fun_exec_op()
152 if (op->instrs[i].delay_ns) in fun_exec_op()
153 ndelay(op->instrs[i].delay_ns); in fun_exec_op()
H A Dnand_hynix.c74 struct nand_op_instr instrs[] = { in hynix_nand_cmd_op() local
77 struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs); in hynix_nand_cmd_op()
92 struct nand_op_instr instrs[] = { in hynix_nand_reg_write_op() local
96 struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs); in hynix_nand_reg_write_op()
H A Darasan-nand-controller.c615 instr = &subop->instrs[op_id]; in anfc_parse_instructions()
768 if (subop->instrs[0].ctx.cmd.opcode == NAND_CMD_RNDOUT && in anfc_data_read_type_exec()
769 subop->instrs[2].ctx.cmd.opcode == NAND_CMD_RNDOUTSTART) in anfc_data_read_type_exec()
820 if (subop->instrs[0].ctx.cmd.opcode != NAND_CMD_STATUS) in anfc_status_type_exec()
828 memcpy(subop->instrs[1].ctx.data.buf.in, &tmp, 1); in anfc_status_type_exec()
917 instr = &op->instrs[op_id]; in anfc_check_op()
950 op->instrs[0].type == NAND_OP_CMD_INSTR && in anfc_check_op()
951 op->instrs[0].ctx.cmd.opcode != NAND_CMD_STATUS && in anfc_check_op()
952 op->instrs[1].type == NAND_OP_DATA_IN_INSTR) in anfc_check_op()
H A Dgpio.c151 ret = gpio_nand_exec_instr(chip, &op->instrs[i]); in gpio_nand_exec_op()
155 if (op->instrs[i].delay_ns) in gpio_nand_exec_op()
156 ndelay(op->instrs[i].delay_ns); in gpio_nand_exec_op()
H A Dnand_toshiba.c37 struct nand_op_instr instrs[] = { in toshiba_nand_benand_read_eccstatus_op() local
42 struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs); in toshiba_nand_benand_read_eccstatus_op()
H A Dnand_macronix.c264 struct nand_op_instr instrs[] = { in nand_power_down_op() local
268 struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs); in nand_power_down_op()
H A Dams-delta.c151 for (instr = op->instrs; instr < op->instrs + op->ninstrs; instr++) { in gpio_nand_exec_op()
H A Dtechnologic-nand-controller.c122 ret = ts72xx_nand_exec_instr(chip, &op->instrs[i]); in ts72xx_nand_exec_op()
H A Dcadence-nand-controller.c2101 instr = &subop->instrs[op_id]; in cadence_nand_cmd_opcode()
2135 instr = &subop->instrs[op_id]; in cadence_nand_cmd_address()
2169 if (subop->instrs[0].ctx.cmd.opcode == NAND_CMD_ERASE1) { in cadence_nand_cmd_erase()
2176 instr = &subop->instrs[1]; in cadence_nand_cmd_erase()
2195 .instrs = &subop->instrs[op_id], in cadence_nand_cmd_erase()
2216 instr = &subop->instrs[op_id]; in cadence_nand_cmd_data()
2282 const struct nand_op_instr *instr = &subop->instrs[op_id]; in cadence_nand_cmd_waitrdy()
H A Ddiskonchip.c348 struct nand_op_instr instrs[] = { in doc200x_readid() local
354 struct nand_operation op = NAND_OPERATION(cs, instrs); in doc200x_readid()
583 doc200x_exec_instr(this, &op->instrs[i]); in doc200x_exec_op()
655 doc2001plus_exec_instr(this, &op->instrs[i]); in doc2001plus_exec_op()
H A Dau1550nd.c227 ret = au1550nd_exec_instr(this, &op->instrs[i]); in au1550nd_exec_op()
H A Dcs553x_nand.c206 ret = cs553x_exec_instr(cs553x, &op->instrs[i]); in cs553x_exec_op()
H A Dmxic_nand.c402 instr = &op->instrs[op_id]; in mxic_nfc_exec_op()
H A Dintel-nand-controller.c526 instr = &op->instrs[op_id]; in ebu_nand_exec_op()
H A Dmeson_nand.c1010 instr = &op->instrs[op_id]; in meson_nfc_check_op()
1047 instr = &op->instrs[op_id]; in meson_nfc_exec_op()
H A Dnandsim.c2170 instr = &op->instrs[op_id]; in ns_exec_op()
2183 instr = &op->instrs[op_id]; in ns_exec_op()
H A Dpl35x-nand-controller.c676 instr = &subop->instrs[op_id]; in pl35x_nand_exec_op()
H A Dtegra_nand.c366 instr = &subop->instrs[op_id]; in tegra_nand_cmd()
H A Dnuvoton-ma35d1-nand-controller.c839 ret = ma35_nfc_exec_instr(chip, &op->instrs[i]); in ma35_nfc_exec_op()
H A Ddenali.c1165 ret = denali_exec_instr(chip, &op->instrs[i]); in denali_exec_op()
/linux/drivers/gpu/drm/panthor/
H A Dpanthor_sched.c3134 struct panthor_job_ringbuf_instrs *instrs) in copy_instrs_to_ringbuf() argument
3145 instrs->count = ALIGN(instrs->count, NUM_INSTRS_PER_CACHE_LINE); in copy_instrs_to_ringbuf()
3146 size = instrs->count * sizeof(u64); in copy_instrs_to_ringbuf()
3150 memcpy(queue->ringbuf->kmap + start, instrs->buffer, written); in copy_instrs_to_ringbuf()
3154 &instrs->buffer[written / sizeof(u64)], in copy_instrs_to_ringbuf()
3203 struct panthor_job_ringbuf_instrs *instrs) in prepare_job_instrs() argument
3258 instrs->count = 0; in prepare_job_instrs()
3261 static_assert(sizeof(instrs->buffer) % 64 == 0, in prepare_job_instrs()
3266 ARRAY_SIZE(instrs->buffer), in prepare_job_instrs()
3275 instrs->buffer[instrs->count++] = instr_seq[i].instr; in prepare_job_instrs()
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/linux/include/linux/mtd/
H A Drawnand.h863 const struct nand_op_instr *instrs; member
1016 const struct nand_op_instr *instrs; member
1023 .instrs = _instrs, \
1031 .instrs = _instrs, \
/linux/drivers/mtd/nand/raw/brcmnand/
H A Dbrcmnand.c2457 const struct nand_op_instr *instr = &op->instrs[i]; in brcmnand_exec_instr()
2469 ((i == (op->ninstrs - 2)) && (op->instrs[i + 1].type == NAND_OP_WAITRDY_INSTR)); in brcmnand_exec_instr()
2515 op->instrs[0].type == NAND_OP_CMD_INSTR && in brcmnand_op_is_status()
2516 op->instrs[0].ctx.cmd.opcode == NAND_CMD_STATUS && in brcmnand_op_is_status()
2517 op->instrs[1].type == NAND_OP_DATA_IN_INSTR) in brcmnand_op_is_status()
2526 op->instrs[0].type == NAND_OP_CMD_INSTR && in brcmnand_op_is_reset()
2527 op->instrs[0].ctx.cmd.opcode == NAND_CMD_RESET && in brcmnand_op_is_reset()
2528 op->instrs[1].type == NAND_OP_WAITRDY_INSTR) in brcmnand_op_is_reset()
2564 instr = &op->instrs[i]; in brcmnand_check_instructions_legacy()
2597 instr = &op->instrs[i]; in brcmnand_exec_instructions_legacy()
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/linux/tools/arch/x86/kcpuid/
H A Dcpuid.csv

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