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Searched refs:i915 (Results 1 – 25 of 144) sorted by relevance

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/linux/drivers/gpu/drm/xe/
H A DMakefile199 -I$(src)/compat-i915-headers \
200 -I$(srctree)/drivers/gpu/drm/i915/display/ \
204 $(obj)/i915-soc/%.o: $(srctree)/drivers/gpu/drm/i915/soc/%.c FORCE
209 $(obj)/i915-display/%.o: $(srctree)/drivers/gpu/drm/i915/display/%.c FORCE
233 i915-soc/intel_dram.o \
234 i915-soc/intel_rom.o
238 i915-display/icl_dsi.o \
239 i915-display/intel_alpm.o \
240 i915-display/intel_atomic.o \
241 i915-display/intel_audio.o \
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/linux/drivers/gpu/drm/i915/pxp/
H A Dintel_pxp_tee.c63 struct drm_i915_private *i915 = pxp->ctrl_gt->i915; in intel_pxp_tee_io_message() local
81 drm_err(&i915->drm, "Failed to send PXP TEE message\n"); in intel_pxp_tee_io_message()
88 drm_err(&i915->drm, "Failed to receive PXP TEE message\n"); in intel_pxp_tee_io_message()
93 drm_err(&i915->drm, in intel_pxp_tee_io_message()
115 struct drm_i915_private *i915 = pxp->ctrl_gt->i915; in intel_pxp_tee_stream_message() local
140 drm_err(&i915->drm, "Failed to send PXP TEE gsc command\n"); in intel_pxp_tee_stream_message()
162 struct drm_i915_private *i915 = kdev_to_i915(i915_kdev); in i915_pxp_tee_component_bind() local
163 struct intel_pxp *pxp = i915->pxp; in i915_pxp_tee_component_bind()
169 if (!HAS_HECI_PXP(i915)) { in i915_pxp_tee_component_bind()
171 if (drm_WARN_ON(&i915->drm, !pxp->dev_link)) in i915_pxp_tee_component_bind()
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/linux/drivers/gpu/drm/i915/gem/selftests/
H A Di915_gem_dmabuf.c20 struct drm_i915_private *i915 = arg; in igt_dmabuf_export() local
24 obj = i915_gem_object_create_shmem(i915, PAGE_SIZE); in igt_dmabuf_export()
42 struct drm_i915_private *i915 = arg; in igt_dmabuf_import_self() local
48 obj = i915_gem_object_create_shmem(i915, PAGE_SIZE); in igt_dmabuf_import_self()
60 import = i915_gem_prime_import(&i915->drm, dmabuf); in igt_dmabuf_import_self()
95 struct drm_i915_private *i915 = arg; in igt_dmabuf_import_same_driver_lmem() local
96 struct intel_memory_region *lmem = i915->mm.regions[INTEL_REGION_LMEM_0]; in igt_dmabuf_import_same_driver_lmem()
107 obj = __i915_gem_object_create_user(i915, PAGE_SIZE, &lmem, 1); in igt_dmabuf_import_same_driver_lmem()
127 import = i915_gem_prime_import(&i915->drm, dmabuf); in igt_dmabuf_import_same_driver_lmem()
148 static int verify_access(struct drm_i915_private *i915, in verify_access() argument
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H A Di915_gem_object.c15 struct drm_i915_private *i915 = arg; in igt_gem_object() local
21 obj = i915_gem_object_create_shmem(i915, PAGE_SIZE); in igt_gem_object()
37 struct drm_i915_private *i915 = arg; in igt_gem_huge() local
44 obj = huge_gem_object(i915, in igt_gem_huge()
46 to_gt(i915)->ggtt->vm.total + PAGE_SIZE); in igt_gem_huge()
79 struct drm_i915_private *i915; in i915_gem_object_mock_selftests() local
82 i915 = mock_gem_device(); in i915_gem_object_mock_selftests()
83 if (!i915) in i915_gem_object_mock_selftests()
86 err = i915_subtests(tests, i915); in i915_gem_object_mock_selftests()
88 mock_destroy_device(i915); in i915_gem_object_mock_selftests()
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H A Di915_gem_phys.c13 struct drm_i915_private *i915 = arg; in mock_phys_object() local
21 obj = i915_gem_object_create_shmem(i915, PAGE_SIZE); in mock_phys_object()
76 struct drm_i915_private *i915; in i915_gem_phys_mock_selftests() local
79 i915 = mock_gem_device(); in i915_gem_phys_mock_selftests()
80 if (!i915) in i915_gem_phys_mock_selftests()
83 err = i915_subtests(tests, i915); in i915_gem_phys_mock_selftests()
85 mock_destroy_device(i915); in i915_gem_phys_mock_selftests()
/linux/drivers/gpu/drm/i915/selftests/
H A Digt_live_test.c16 struct drm_i915_private *i915, in igt_live_test_begin() argument
26 t->i915 = i915; in igt_live_test_begin()
30 for_each_gt(gt, i915, i) { in igt_live_test_begin()
41 i915_reset_engine_count(&i915->gpu_error, in igt_live_test_begin()
45 t->reset_global = i915_reset_count(&i915->gpu_error); in igt_live_test_begin()
52 struct drm_i915_private *i915 = t->i915; in igt_live_test_end() local
58 if (igt_flush_test(i915)) in igt_live_test_end()
61 if (t->reset_global != i915_reset_count(&i915->gpu_error)) { in igt_live_test_end()
64 i915_reset_count(&i915->gpu_error) - t->reset_global); in igt_live_test_end()
68 for_each_gt(gt, i915, i) { in igt_live_test_end()
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H A Di915_gem_evict.c57 obj = i915_gem_object_create_internal(ggtt->vm.i915, in populate_ggtt()
104 i915_gem_drain_freed_objects(ggtt->vm.i915); in cleanup_objects()
170 obj = i915_gem_object_create_internal(gt->i915, I915_GTT_PAGE_SIZE); in igt_overcommit()
249 .color = i915_gem_get_pat_index(gt->i915, I915_CACHE_LLC), in igt_evict_for_cache_color()
265 obj = i915_gem_object_create_internal(gt->i915, I915_GTT_PAGE_SIZE); in igt_evict_for_cache_color()
281 obj = i915_gem_object_create_internal(gt->i915, I915_GTT_PAGE_SIZE); in igt_evict_for_cache_color()
312 target.color = i915_gem_get_pat_index(gt->i915, I915_CACHE_L3_LLC); in igt_evict_for_cache_color()
380 struct drm_i915_private *i915 = gt->i915; in igt_evict_contexts() local
403 if (!HAS_FULL_PPGTT(i915)) in igt_evict_contexts()
406 wakeref = intel_runtime_pm_get(&i915->runtime_pm); in igt_evict_contexts()
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H A Dmock_region.c68 struct drm_i915_private *i915 = mem->i915; in mock_object_init() local
73 drm_gem_private_object_init(&i915->drm, &obj->base, size); in mock_object_init()
89 struct drm_i915_private *i915 = mem->i915; in mock_region_fini() local
94 ida_free(&i915->selftest.mock_region_instances, instance); in mock_region_fini()
106 mock_region_create(struct drm_i915_private *i915, in mock_region_create() argument
113 int instance = ida_alloc_max(&i915->selftest.mock_region_instances, in mock_region_create()
120 return intel_memory_region_create(i915, start, size, min_page_size, in mock_region_create()
H A Di915_perf.c97 .engine = intel_engine_lookup_user(perf->i915, in test_stream()
101 .oa_format = GRAPHICS_VER(perf->i915) == 12 ? in test_stream()
148 struct drm_i915_private *i915 = arg; in live_sanitycheck() local
153 stream = test_stream(&i915->perf); in live_sanitycheck()
171 if (GRAPHICS_VER(rq->i915) >= 8) in write_timestamp()
199 struct drm_i915_private *i915 = arg; in live_noa_delay() local
210 stream = test_stream(&i915->perf); in live_noa_delay()
291 struct drm_i915_private *i915 = arg; in live_noa_gpr() local
303 stream = test_stream(&i915->perf); in live_noa_gpr()
372 if (GRAPHICS_VER(i915) >= 8) in live_noa_gpr()
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/linux/drivers/gpu/drm/i915/
H A Dintel_device_info.c229 static void intel_device_info_subplatform_init(struct drm_i915_private *i915) in intel_device_info_subplatform_init() argument
231 const struct intel_device_info *info = INTEL_INFO(i915); in intel_device_info_subplatform_init()
232 const struct intel_runtime_info *rinfo = RUNTIME_INFO(i915); in intel_device_info_subplatform_init()
235 u16 devid = INTEL_DEVID(i915); in intel_device_info_subplatform_init()
239 RUNTIME_INFO(i915)->platform_mask[pi] = BIT(pb); in intel_device_info_subplatform_init()
248 if (IS_HASWELL(i915) || IS_BROADWELL(i915)) { in intel_device_info_subplatform_init()
294 RUNTIME_INFO(i915)->platform_mask[pi] |= mask; in intel_device_info_subplatform_init()
297 static void ip_ver_read(struct drm_i915_private *i915, u32 offset, struct intel_ip_version *ip) in ip_ver_read() argument
299 struct pci_dev *pdev = to_pci_dev(i915->drm.dev); in ip_ver_read()
306 if (drm_WARN_ON(&i915->drm, !addr)) in ip_ver_read()
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H A Di915_hwmon.h16 void i915_hwmon_register(struct drm_i915_private *i915);
17 void i915_hwmon_unregister(struct drm_i915_private *i915);
18 void i915_hwmon_power_max_disable(struct drm_i915_private *i915, bool *old);
19 void i915_hwmon_power_max_restore(struct drm_i915_private *i915, bool old);
21 static inline void i915_hwmon_register(struct drm_i915_private *i915) { }; in i915_hwmon_register() argument
22 static inline void i915_hwmon_unregister(struct drm_i915_private *i915) { }; in i915_hwmon_unregister() argument
23 static inline void i915_hwmon_power_max_disable(struct drm_i915_private *i915, bool *old) { }; in i915_hwmon_power_max_disable() argument
24 static inline void i915_hwmon_power_max_restore(struct drm_i915_private *i915, bool old) { }; in i915_hwmon_power_max_restore() argument
H A Dintel_memory_region.h43 #define for_each_memory_region(mr, i915, id) \ argument
44 for (id = 0; id < ARRAY_SIZE((i915)->mm.regions); id++) \
45 for_each_if((mr) = (i915)->mm.regions[id])
60 struct drm_i915_private *i915; member
91 intel_memory_region_lookup(struct drm_i915_private *i915,
95 intel_memory_region_create(struct drm_i915_private *i915,
107 int intel_memory_regions_hw_probe(struct drm_i915_private *i915);
108 void intel_memory_regions_driver_release(struct drm_i915_private *i915);
110 intel_memory_region_by_type(struct drm_i915_private *i915,
129 i915_gem_ttm_system_setup(struct drm_i915_private *i915,
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H A Di915_hwmon.c300 static int hwm_pcode_read_i1(struct drm_i915_private *i915, u32 *uval) in hwm_pcode_read_i1() argument
303 if (IS_DG1(i915) || IS_DG2(i915)) in hwm_pcode_read_i1()
306 return snb_pcode_read_p(&i915->uncore, PCODE_POWER_SETUP, in hwm_pcode_read_i1()
310 static int hwm_pcode_write_i1(struct drm_i915_private *i915, u32 uval) in hwm_pcode_write_i1() argument
312 return snb_pcode_write_p(&i915->uncore, PCODE_POWER_SETUP, in hwm_pcode_write_i1()
350 struct drm_i915_private *i915 = ddat->uncore->i915; in hwm_in_is_visible() local
354 return IS_DG1(i915) || IS_DG2(i915) ? 0444 : 0; in hwm_in_is_visible()
382 struct drm_i915_private *i915 = ddat->uncore->i915; in hwm_power_is_visible() local
392 return (hwm_pcode_read_i1(i915, &uval) || in hwm_power_is_visible()
515 ret = hwm_pcode_read_i1(ddat->uncore->i915, &uval); in hwm_power_read()
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H A Di915_vgpu.h32 void intel_vgpu_detect(struct drm_i915_private *i915);
33 bool intel_vgpu_active(struct drm_i915_private *i915);
34 void intel_vgpu_register(struct drm_i915_private *i915);
35 bool intel_vgpu_has_full_ppgtt(struct drm_i915_private *i915);
36 bool intel_vgpu_has_hwsp_emulation(struct drm_i915_private *i915);
37 bool intel_vgpu_has_huge_gtt(struct drm_i915_private *i915);
H A DMakefile26 i915-y += \
58 i915-y += \
64 i915-y += \
72 i915-$(CONFIG_COMPAT) += \
74 i915-$(CONFIG_DEBUG_FS) += \
77 i915-$(CONFIG_PERF_EVENTS) += \
144 i915-y += $(gt-y)
175 i915-y += \
193 i915-y += \
219 i915-y += \
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/linux/drivers/gpu/drm/i915/gt/
H A Dintel_gsc.c49 obj = i915_gem_object_create_lmem(gt->i915, size, in gsc_ext_om_alloc()
128 static void gsc_destroy_one(struct drm_i915_private *i915, in gsc_destroy_one() argument
152 static void gsc_init_one(struct drm_i915_private *i915, struct intel_gsc *gsc, in gsc_init_one() argument
155 struct pci_dev *pdev = to_pci_dev(i915->drm.dev); in gsc_init_one()
169 drm_dbg(&i915->drm, "Not initializing gsc for remote tiles\n"); in gsc_init_one()
173 if (intf_id == 0 && !HAS_HECI_PXP(i915)) in gsc_init_one()
176 if (IS_DG1(i915)) { in gsc_init_one()
178 } else if (IS_DG2(i915)) { in gsc_init_one()
181 drm_warn_once(&i915->drm, "Unknown platform\n"); in gsc_init_one()
186 drm_warn_once(&i915->drm, "HECI%d is not implemented!\n", intf_id + 1); in gsc_init_one()
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H A Dintel_gt_print.h14 drm_err(&(_gt)->i915->drm, "GT%u: " _fmt, (_gt)->info.id, ##__VA_ARGS__)
17 drm_warn(&(_gt)->i915->drm, "GT%u: " _fmt, (_gt)->info.id, ##__VA_ARGS__)
20 drm_warn_once(&(_gt)->i915->drm, "GT%u: " _fmt, (_gt)->info.id, ##__VA_ARGS__)
23 drm_notice(&(_gt)->i915->drm, "GT%u: " _fmt, (_gt)->info.id, ##__VA_ARGS__)
26 drm_info(&(_gt)->i915->drm, "GT%u: " _fmt, (_gt)->info.id, ##__VA_ARGS__)
29 drm_dbg(&(_gt)->i915->drm, "GT%u: " _fmt, (_gt)->info.id, ##__VA_ARGS__)
32 drm_err_ratelimited(&(_gt)->i915->drm, "GT%u: " _fmt, (_gt)->info.id, ##__VA_ARGS__)
35 dev_notice_ratelimited((_gt)->i915->drm.dev, "GT%u: " _fmt, (_gt)->info.id, ##__VA_ARGS__)
46 drm_WARN(&(_gt)->i915->drm, _condition, "GT%u: " _fmt, (_gt)->info.id, ##__VA_ARGS__)
49 drm_WARN_ONCE(&(_gt)->i915->drm, _condition, "GT%u: " _fmt, (_gt)->info.id, ##__VA_ARGS__)
H A Dselftest_gt_pm.c41 struct drm_i915_private *i915 = engine->i915; in read_timestamp() local
46 if (GRAPHICS_VER(i915) == 5 || IS_G4X(i915)) in read_timestamp()
92 if (GRAPHICS_VER(gt->i915) < 4) /* Any CS_TIMESTAMP? */ in live_gt_clocks()
104 if (GRAPHICS_VER(engine->i915) < 7 && engine->id != RCS0) in live_gt_clocks()
177 int intel_gt_pm_live_selftests(struct drm_i915_private *i915) in intel_gt_pm_live_selftests() argument
192 if (intel_gt_is_wedged(to_gt(i915))) in intel_gt_pm_live_selftests()
195 return intel_gt_live_subtests(tests, to_gt(i915)); in intel_gt_pm_live_selftests()
198 int intel_gt_pm_late_selftests(struct drm_i915_private *i915) in intel_gt_pm_late_selftests() argument
209 if (intel_gt_is_wedged(to_gt(i915))) in intel_gt_pm_late_selftests()
212 return intel_gt_live_subtests(tests, to_gt(i915)); in intel_gt_pm_late_selftests()
H A Dintel_gt_pm_irq.c15 struct drm_i915_private *i915 = gt->i915; in write_pm_imr() local
20 if (GRAPHICS_VER(i915) >= 11) { in write_pm_imr()
23 } else if (GRAPHICS_VER(i915) >= 8) { in write_pm_imr()
65 i915_reg_t reg = GRAPHICS_VER(gt->i915) >= 8 ? GEN8_GT_IIR(2) : GEN6_PMIIR; in gen6_gt_pm_reset_iir()
76 struct drm_i915_private *i915 = gt->i915; in write_pm_ier() local
81 if (GRAPHICS_VER(i915) >= 11) { in write_pm_ier()
84 } else if (GRAPHICS_VER(i915) >= 8) { in write_pm_ier()
H A Dintel_llc.c53 struct drm_i915_private *i915 = llc_to_gt(llc)->i915; in get_ia_constants() local
56 if (!HAS_LLC(i915) || IS_DGFX(i915)) in get_ia_constants()
78 struct drm_i915_private *i915 = llc_to_gt(llc)->i915; in calc_ia_freq() local
82 if (GRAPHICS_VER(i915) >= 9) { in calc_ia_freq()
88 } else if (GRAPHICS_VER(i915) >= 8) { in calc_ia_freq()
91 } else if (IS_HASWELL(i915)) { in calc_ia_freq()
H A Dintel_gt.h24 GRAPHICS_VER_FULL((gt)->i915) >= (from) && \
25 GRAPHICS_VER_FULL((gt)->i915) <= (until)))
38 MEDIA_VER_FULL((gt)->i915) >= (from) && \
39 MEDIA_VER_FULL((gt)->i915) <= (until)))
59 IS_GRAPHICS_STEP((gt)->i915, (from), (until))))
77 IS_MEDIA_STEP((gt)->i915, (from), (until))))
81 GEM_TRACE("%s " fmt, dev_name(gt__->i915->drm.dev), \
124 return guc_to_gt(guc)->i915; in guc_to_i915()
133 int intel_root_gt_init_early(struct drm_i915_private *i915);
143 void intel_gt_driver_late_release_all(struct drm_i915_private *i915);
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H A Dintel_gt_clock_utils.c95 freq = IS_GEN9_LP(uncore->i915) ? 19200000 : 24000000; in gen9_read_clock_frequency()
151 return DIV_ROUND_CLOSEST(intel_fsb_freq(uncore->i915), 4) * 1000; in gen4_read_clock_frequency()
156 if (GRAPHICS_VER(uncore->i915) >= 11) in read_clock_frequency()
158 else if (GRAPHICS_VER(uncore->i915) >= 9) in read_clock_frequency()
160 else if (GRAPHICS_VER(uncore->i915) >= 6) in read_clock_frequency()
162 else if (GRAPHICS_VER(uncore->i915) == 5) in read_clock_frequency()
164 else if (IS_G4X(uncore->i915)) in read_clock_frequency()
166 else if (GRAPHICS_VER(uncore->i915) == 4) in read_clock_frequency()
177 if (GRAPHICS_VER(gt->i915) == 11) in intel_gt_init_clock_frequency()
233 if (GRAPHICS_VER(gt->i915) == 6) in intel_gt_ns_to_pm_interval()
H A Dselftest_engine_cs.c30 queue_work(gt->i915->unordered_wq, &gt->rps.work); in perf_begin()
41 return igt_flush_test(gt->i915); in perf_end()
46 struct drm_i915_private *i915 = engine->i915; in timestamp_reg() local
48 if (GRAPHICS_VER(i915) == 5 || IS_G4X(i915)) in timestamp_reg()
67 if (GRAPHICS_VER(rq->i915) >= 8) in write_timestamp()
86 obj = i915_gem_object_create_internal(ce->engine->i915, PAGE_SIZE); in create_empty_batch()
141 if (GRAPHICS_VER(gt->i915) < 4) /* Any CS_TIMESTAMP? */ in perf_mi_bb_start()
151 if (GRAPHICS_VER(engine->i915) < 7 && engine->id != RCS0) in perf_mi_bb_start()
226 obj = i915_gem_object_create_internal(ce->engine->i915, SZ_64K); in create_nop_batch()
269 if (GRAPHICS_VER(gt->i915) < 4) /* Any CS_TIMESTAMP? */ in perf_mi_noop()
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/linux/Documentation/ABI/testing/
H A Dsysfs-driver-intel-i915-hwmon1 What: /sys/bus/pci/drivers/i915/.../hwmon/hwmon<i>/in0_input
7 Only supported for particular Intel i915 graphics platforms.
9 What: /sys/bus/pci/drivers/i915/.../hwmon/hwmon<i>/power1_max
21 Only supported for particular Intel i915 graphics platforms.
23 What: /sys/bus/pci/drivers/i915/.../hwmon/hwmon<i>/power1_rated_max
29 Only supported for particular Intel i915 graphics platforms.
31 What: /sys/bus/pci/drivers/i915/.../hwmon/hwmon<i>/power1_max_interval
38 Only supported for particular Intel i915 graphics platforms.
40 What: /sys/bus/pci/drivers/i915/.../hwmon/hwmon<i>/power1_crit
51 Only supported for particular Intel i915 graphics platforms.
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/linux/drivers/gpu/drm/i915/gt/uc/
H A Dintel_uc.c28 struct drm_i915_private *i915 = uc_to_gt(uc)->i915; in uc_expand_default_options() local
30 if (i915->params.enable_guc != -1) in uc_expand_default_options()
34 if (GRAPHICS_VER(i915) < 12) { in uc_expand_default_options()
35 i915->params.enable_guc = 0; in uc_expand_default_options()
40 if (IS_TIGERLAKE(i915) || IS_ROCKETLAKE(i915)) { in uc_expand_default_options()
41 i915->params.enable_guc = 0; in uc_expand_default_options()
46 if (IS_ALDERLAKE_S(i915) && !IS_RAPTORLAKE_S(i915)) { in uc_expand_default_options()
47 i915->params.enable_guc = ENABLE_GUC_LOAD_HUC; in uc_expand_default_options()
52 i915->params.enable_guc = ENABLE_GUC_LOAD_HUC | ENABLE_GUC_SUBMISSION; in uc_expand_default_options()
63 ret = i915_inject_probe_error(gt->i915, -ENXIO); in __intel_uc_reset_hw()
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