| /linux/drivers/gpu/drm/amd/ras/rascore/ |
| H A D | ras_aca_v1_0.c | 59 if ((aca_blk->blk_info->hwip == ACA_ECC_HWIP__SMU) && in aca_decode_bank_info()
69 struct ras_aca_hwip *hwip; in aca_check_bank_hwip() local
76 hwip = &aca_hwid_mcatypes[type]; in aca_check_bank_hwip()
77 if (!hwip->hwid) in aca_check_bank_hwip()
84 return hwip->hwid == hwid && hwip->mcatype == mcatype; in aca_check_bank_hwip()
89 return aca_check_bank_hwip((struct aca_bank_reg *)data, aca_blk->blk_info->hwip); in aca_match_bank_default()
97 if (!aca_check_bank_hwip(bank, aca_blk->blk_info->hwip)) in aca_match_gfx_bank()
122 if (!aca_check_bank_hwip(bank, aca_blk->blk_info->hwip)) in aca_match_sdma_bank()
157 if (!aca_check_bank_hwip(bank, aca_blk->blk_info->hwip)) in aca_match_mmhub_bank()
316 .hwip = ACA_ECC_HWIP__UMC,
[all …]
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| /linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | soc15_common.h | 40 #define __WREG32_SOC15_RLC__(reg, value, flag, hwip, inst) \ argument
42 amdgpu_sriov_wreg(adev, reg, value, flag, hwip, inst) : \
45 #define __RREG32_SOC15_RLC__(reg, flag, hwip, inst) \ argument
47 amdgpu_sriov_rreg(adev, reg, flag, hwip, inst) : \
145 #define WREG32_RLC_NO_KIQ(reg, value, hwip) \ argument
146 __WREG32_SOC15_RLC__(reg, value, AMDGPU_REGS_NO_KIQ | AMDGPU_REGS_RLC, hwip, 0)
148 #define RREG32_RLC_NO_KIQ(reg, hwip) \ argument
149 __RREG32_SOC15_RLC__(reg, AMDGPU_REGS_NO_KIQ | AMDGPU_REGS_RLC, hwip, 0)
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| H A D | amdgpu_aca.c | 137 struct aca_hwip *hwip; in aca_bank_hwip_is_matched() local
144 hwip = &aca_hwid_mcatypes[type]; in aca_bank_hwip_is_matched()
145 if (!hwip->hwid) in aca_bank_hwip_is_matched()
152 return hwip->hwid == hwid && hwip->mcatype == mcatype; in aca_bank_hwip_is_matched()
218 return handle->hwip == ACA_HWIP_TYPE_UMC; in aca_bank_is_valid()
220 if (!aca_bank_hwip_is_matched(bank, handle->hwip)) in aca_bank_is_valid()
665 handle->hwip = ras_info->hwip; in add_aca_handle()
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| H A D | soc15.c | 445 if (!adev->reg_offset[en->hwip][en->inst]) in soc15_read_register()
447 else if (reg_offset != (adev->reg_offset[en->hwip][en->inst][en->seg] in soc15_read_register()
481 reg = adev->reg_offset[entry->hwip][entry->instance][entry->segment] + entry->reg; in soc15_program_register_sequence()
486 tmp = (entry->hwip == GC_HWIP) ? in soc15_program_register_sequence()
499 (entry->hwip == GC_HWIP) ? in soc15_program_register_sequence()
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| H A D | imu_v11_0_3.c | 117 reg = adev->reg_offset[entry->hwip][entry->instance][entry->segment] + entry->reg; in program_rlc_ram_register_setting()
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| H A D | amdgpu_virt.c | 1310 u32 acc_flags, u32 hwip, in amdgpu_virt_get_rlcg_reg_access_flag() argument
1315 switch (hwip) { in amdgpu_virt_get_rlcg_reg_access_flag()
1571 u32 acc_flags, u32 hwip, u32 xcc_id) in amdgpu_sriov_wreg() argument
1579 amdgpu_virt_get_rlcg_reg_access_flag(adev, acc_flags, hwip, true, &rlcg_flag)) { in amdgpu_sriov_wreg()
1591 u32 offset, u32 acc_flags, u32 hwip, u32 xcc_id) in amdgpu_sriov_rreg() argument
1599 amdgpu_virt_get_rlcg_reg_access_flag(adev, acc_flags, hwip, false, &rlcg_flag)) in amdgpu_sriov_rreg()
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| H A D | soc21.c | 348 if (!adev->reg_offset[en->hwip][en->inst]) in soc21_read_register()
350 else if (reg_offset != (adev->reg_offset[en->hwip][en->inst][en->seg] in soc21_read_register()
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| H A D | imu_v12_0.c | 267 reg = adev->reg_offset[entry->hwip][entry->instance][entry->segment] + entry->reg; in program_imu_rlc_ram_old()
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| H A D | umc_v12_0.c | 503 .hwip = ACA_HWIP_TYPE_UMC,
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| H A D | amdgpu_ras.c | 5231 AMDGPU_RAS_REG_ENTRY_OFFSET(reg_entry->hwip, instance, in amdgpu_ras_inst_get_memory_id_field()
5255 AMDGPU_RAS_REG_ENTRY_OFFSET(reg_entry->hwip, instance, in amdgpu_ras_inst_get_err_cnt_field()
5332 AMDGPU_RAS_REG_ENTRY_OFFSET(reg_list[i].hwip, instance, in amdgpu_ras_inst_reset_ras_error_count()
5335 AMDGPU_RAS_REG_ENTRY_OFFSET(reg_list[i].hwip, instance, in amdgpu_ras_inst_reset_ras_error_count()
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| H A D | amdgpu.h | 143 u32 hwip; member
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| H A D | amdgpu_xgmi.c | 1200 .hwip = ACA_HWIP_TYPE_PCS_XGMI,
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| /linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
| H A D | common_baco.h | 47 uint32_t hwip; member
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| H A D | common_baco.c | 112 reg = adev->reg_offset[entry[i].hwip][entry[i].inst][entry[i].seg] in soc15_baco_program_registers()
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