| /linux/drivers/gpu/drm/meson/ |
| H A D | meson_vclk.c | 140 regmap_update_bits(priv->hhi, HHI_VID_PLL_CLK_DIV, VID_PLL_EN, 0); in meson_vid_pll_set()
141 regmap_update_bits(priv->hhi, HHI_VID_PLL_CLK_DIV, VID_PLL_PRESET, 0); in meson_vid_pll_set()
204 regmap_update_bits(priv->hhi, HHI_VID_PLL_CLK_DIV, in meson_vid_pll_set()
208 regmap_update_bits(priv->hhi, HHI_VID_PLL_CLK_DIV, in meson_vid_pll_set()
211 regmap_update_bits(priv->hhi, HHI_VID_PLL_CLK_DIV, in meson_vid_pll_set()
213 regmap_update_bits(priv->hhi, HHI_VID_PLL_CLK_DIV, in meson_vid_pll_set()
215 regmap_update_bits(priv->hhi, HHI_VID_PLL_CLK_DIV, in meson_vid_pll_set()
219 regmap_update_bits(priv->hhi, HHI_VID_PLL_CLK_DIV, in meson_vid_pll_set()
221 regmap_update_bits(priv->hhi, HHI_VID_PLL_CLK_DIV, in meson_vid_pll_set()
223 regmap_update_bits(priv->hhi, HHI_VID_PLL_CLK_DIV, in meson_vid_pll_set()
[all …]
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| H A D | meson_dw_hdmi.c | 292 regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL0, 0x333d3282); in meson_hdmi_phy_setup_mode()
293 regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL3, 0x2136315b); in meson_hdmi_phy_setup_mode()
296 regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL0, 0x33303382); in meson_hdmi_phy_setup_mode()
297 regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL3, 0x2036315b); in meson_hdmi_phy_setup_mode()
300 regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL0, 0x33303362); in meson_hdmi_phy_setup_mode()
301 regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL3, 0x2016315b); in meson_hdmi_phy_setup_mode()
304 regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL0, 0x33604142); in meson_hdmi_phy_setup_mode()
305 regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL3, 0x0016315b); in meson_hdmi_phy_setup_mode()
311 regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL0, 0x33353245); in meson_hdmi_phy_setup_mode()
312 regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL3, 0x2100115b); in meson_hdmi_phy_setup_mode()
[all …]
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| H A D | meson_drv.c | 236 priv->hhi = devm_regmap_init_mmio(dev, regs, in meson_drv_bind_master()
238 if (IS_ERR(priv->hhi)) { in meson_drv_bind_master()
240 ret = PTR_ERR(priv->hhi); in meson_drv_bind_master()
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| H A D | meson_venc.c | 1960 regmap_update_bits(priv->hhi, HHI_GCLK_MPEG2, BIT(25), BIT(25)); in meson_venc_enable_vsync()
1965 regmap_update_bits(priv->hhi, HHI_GCLK_MPEG2, BIT(25), 0); in meson_venc_disable_vsync()
1973 regmap_write(priv->hhi, HHI_VDAC_CNTL0_G12A, 0); in meson_venc_init()
1974 regmap_write(priv->hhi, HHI_VDAC_CNTL1_G12A, 8); in meson_venc_init()
1976 regmap_write(priv->hhi, HHI_VDAC_CNTL0, 0); in meson_venc_init()
1977 regmap_write(priv->hhi, HHI_VDAC_CNTL1, 8); in meson_venc_init()
1984 regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL0, 0); in meson_venc_init()
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| H A D | meson_drv.h | 47 struct regmap *hhi; member
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| /linux/drivers/phy/amlogic/ |
| H A D | phy-meson8-hdmi-tx.c | 36 struct regmap *hhi; member
67 regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL0, in phy_meson8_hdmi_tx_power_on()
71 regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL1, 0x0); in phy_meson8_hdmi_tx_power_on()
75 regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL1, in phy_meson8_hdmi_tx_power_on()
80 regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL1, in phy_meson8_hdmi_tx_power_on()
92 regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL0, in phy_meson8_hdmi_tx_power_off()
123 priv->hhi = syscon_node_to_regmap(np->parent); in phy_meson8_hdmi_tx_probe()
124 if (IS_ERR(priv->hhi)) in phy_meson8_hdmi_tx_probe()
125 return PTR_ERR(priv->hhi); in phy_meson8_hdmi_tx_probe()
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| /linux/Documentation/devicetree/bindings/power/ |
| H A D | amlogic,meson-gx-pwrc.txt | 23 - amlogic,hhi-sysctrl: phandle to the HHI sysctrl node
44 amlogic,hhi-sysctrl = <&sysctrl>;
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| /linux/arch/arm/boot/dts/amlogic/ |
| H A D | meson8b.dtsi | 590 &hhi {
705 amlogic,hhi-sysctrl = <&hhi>;
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| H A D | meson8.dtsi | 647 &hhi {
748 amlogic,hhi-sysctrl = <&hhi>;
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| /linux/arch/arm64/boot/dts/amlogic/ |
| H A D | meson-g12-common.dtsi | 1613 hhi: system-controller@0 { label
1614 compatible = "amlogic,meson-gx-hhi-sysctrl",
2165 reg-names = "vpu", "hhi";
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| H A D | meson-axg.dtsi | 1265 compatible = "amlogic,meson-axg-hhi-sysctrl",
|