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Searched refs:gt (Results 1 – 25 of 236) sorted by relevance

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/linux/drivers/gpu/drm/xe/
H A Dxe_gt.c73 struct xe_gt *gt; in xe_gt_alloc() local
75 gt = drmm_kzalloc(drm, sizeof(*gt), GFP_KERNEL); in xe_gt_alloc()
76 if (!gt) in xe_gt_alloc()
79 gt->tile = tile; in xe_gt_alloc()
88 gt->ordered_wq = ordered_wq; in xe_gt_alloc()
90 return gt; in xe_gt_alloc()
93 void xe_gt_sanitize(struct xe_gt *gt) in xe_gt_sanitize() argument
99 xe_guc_submit_disable(&gt->uc.guc); in xe_gt_sanitize()
102 static void xe_gt_enable_host_l2_vram(struct xe_gt *gt) in xe_gt_enable_host_l2_vram() argument
106 if (!XE_GT_WA(gt, 16023588340)) in xe_gt_enable_host_l2_vram()
[all …]
H A Dxe_gt_sriov_vf.c53 static void vf_post_migration_inject_wait(struct xe_gt *gt, in vf_post_migration_inject_wait() argument
56 while (gt->sriov.vf.migration.debug.resfix_stoppers & wait) { in vf_post_migration_inject_wait()
57 xe_gt_dbg(gt, in vf_post_migration_inject_wait()
60 gt->sriov.vf.migration.debug.resfix_stoppers, wait); in vf_post_migration_inject_wait()
66 #define VF_MIGRATION_INJECT_WAIT(gt, _POS) ({ \ argument
67 struct xe_gt *__gt = (gt); \
90 static int vf_reset_guc_state(struct xe_gt *gt) in vf_reset_guc_state() argument
93 struct xe_guc *guc = &gt->uc.guc; in vf_reset_guc_state()
103 xe_gt_sriov_err(gt, "Failed to reset GuC state (%pe)\n", ERR_PTR(err)); in vf_reset_guc_state()
115 int xe_gt_sriov_vf_reset(struct xe_gt *gt) in xe_gt_sriov_vf_reset() argument
[all …]
H A Dxe_hw_engine.c282 hwe->gt = NULL; in hw_engine_fini()
298 xe_gt_assert(hwe->gt, !(reg.addr & hwe->mmio_base)); in xe_hw_engine_mmio_write32()
299 xe_force_wake_assert_held(gt_to_fw(hwe->gt), hwe->domain); in xe_hw_engine_mmio_write32()
303 xe_mmio_write32(&hwe->gt->mmio, reg, val); in xe_hw_engine_mmio_write32()
318 xe_gt_assert(hwe->gt, !(reg.addr & hwe->mmio_base)); in xe_hw_engine_mmio_read32()
319 xe_force_wake_assert_held(gt_to_fw(hwe->gt), hwe->domain); in xe_hw_engine_mmio_read32()
323 return xe_mmio_read32(&hwe->gt->mmio, reg); in xe_hw_engine_mmio_read32()
329 xe_hw_engine_mask_per_class(hwe->gt, XE_ENGINE_CLASS_COMPUTE); in xe_hw_engine_enable_ring()
333 xe_mmio_write32(&hwe->gt->mmio, RCU_MODE, in xe_hw_engine_enable_ring()
340 if (xe_device_has_msix(gt_to_xe(hwe->gt))) in xe_hw_engine_enable_ring()
[all …]
H A Dxe_gt_ccs_mode.c17 static void __xe_gt_apply_ccs_mode(struct xe_gt *gt, u32 num_engines) in __xe_gt_apply_ccs_mode() argument
20 int num_slices = hweight32(CCS_INSTANCES(gt)); in __xe_gt_apply_ccs_mode()
21 struct xe_device *xe = gt_to_xe(gt); in __xe_gt_apply_ccs_mode()
25 xe_assert(xe, xe_gt_ccs_mode_enabled(gt)); in __xe_gt_apply_ccs_mode()
52 for_each_hw_engine(hwe, gt, id) { in __xe_gt_apply_ccs_mode()
62 while ((CCS_INSTANCES(gt) & BIT(cslice)) == 0) in __xe_gt_apply_ccs_mode()
77 xe_mmio_write32(&gt->mmio, CCS_MODE, mode); in __xe_gt_apply_ccs_mode()
79 xe_gt_dbg(gt, "CCS_MODE=%x config:%08x, num_engines:%d, num_slices:%d\n", in __xe_gt_apply_ccs_mode()
83 void xe_gt_apply_ccs_mode(struct xe_gt *gt) in xe_gt_apply_ccs_mode() argument
85 if (!gt->ccs_mode || IS_SRIOV_VF(gt_to_xe(gt))) in xe_gt_apply_ccs_mode()
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H A Dxe_eu_stall.c54 struct xe_gt *gt; member
86 struct xe_gt *gt; member
218 struct xe_gt *gt = arg; in xe_eu_stall_fini() local
220 destroy_workqueue(gt->eu_stall->buf_ptr_poll_wq); in xe_eu_stall_fini()
221 mutex_destroy(&gt->eu_stall->stream_lock); in xe_eu_stall_fini()
222 kfree(gt->eu_stall); in xe_eu_stall_fini()
233 int xe_eu_stall_init(struct xe_gt *gt) in xe_eu_stall_init() argument
235 struct xe_device *xe = gt_to_xe(gt); in xe_eu_stall_init()
241 gt->eu_stall = kzalloc_obj(*gt->eu_stall); in xe_eu_stall_init()
242 if (!gt->eu_stall) { in xe_eu_stall_init()
[all …]
H A Dxe_gt_idle.c52 struct xe_gt *gt = container_of(guc, struct xe_gt, uc.guc); in pc_to_xe() local
54 return gt_to_xe(gt); in pc_to_xe()
101 void xe_gt_idle_enable_pg(struct xe_gt *gt) in xe_gt_idle_enable_pg() argument
103 struct xe_device *xe = gt_to_xe(gt); in xe_gt_idle_enable_pg()
104 struct xe_gt_idle *gtidle = &gt->gtidle; in xe_gt_idle_enable_pg()
105 struct xe_mmio *mmio = &gt->mmio; in xe_gt_idle_enable_pg()
116 xe_device_assert_mem_access(gt_to_xe(gt)); in xe_gt_idle_enable_pg()
118 vcs_mask = xe_hw_engine_mask_per_class(gt, XE_ENGINE_CLASS_VIDEO_DECODE); in xe_gt_idle_enable_pg()
119 vecs_mask = xe_hw_engine_mask_per_class(gt, XE_ENGINE_CLASS_VIDEO_ENHANCE); in xe_gt_idle_enable_pg()
124 if (xe_gt_is_main_type(gt)) in xe_gt_idle_enable_pg()
[all …]
H A Dxe_gt_sriov_pf_monitor.c24 void xe_gt_sriov_pf_monitor_flr(struct xe_gt *gt, u32 vfid) in xe_gt_sriov_pf_monitor_flr() argument
28 xe_gt_assert(gt, IS_SRIOV_PF(gt_to_xe(gt))); in xe_gt_sriov_pf_monitor_flr()
29 xe_gt_sriov_pf_assert_vfid(gt, vfid); in xe_gt_sriov_pf_monitor_flr()
32 gt->sriov.pf.vfs[vfid].monitor.guc.events[e] = 0; in xe_gt_sriov_pf_monitor_flr()
35 static void pf_update_event_counter(struct xe_gt *gt, u32 vfid, in pf_update_event_counter() argument
38 xe_gt_assert(gt, IS_SRIOV_PF(gt_to_xe(gt))); in pf_update_event_counter()
39 xe_gt_assert(gt, e < XE_GUC_KLV_NUM_THRESHOLDS); in pf_update_event_counter()
41 gt->sriov.pf.vfs[vfid].monitor.guc.events[e]++; in pf_update_event_counter()
44 static int pf_handle_vf_threshold_event(struct xe_gt *gt, u32 vfid, u32 threshold) in pf_handle_vf_threshold_event() argument
54 xe_gt_sriov_notice(gt, "unknown threshold key %#x reported for %s\n", in pf_handle_vf_threshold_event()
[all …]
H A Dxe_gt_sriov_pf_debugfs.c119 struct xe_gt *gt = extract_gt(data); \
120 struct xe_device *xe = gt_to_xe(gt); \
127 err = xe_gt_sriov_pf_policy_set_##POLICY(gt, val); \
136 struct xe_gt *gt = extract_gt(data); \
138 *val = xe_gt_sriov_pf_policy_get_##POLICY(gt); \
148 static void pf_add_policy_attrs(struct xe_gt *gt, struct dentry *parent) in pf_add_policy_attrs() argument
150 xe_gt_assert(gt, gt == extract_gt(parent)); in pf_add_policy_attrs()
151 xe_gt_assert(gt, PFID == extract_vfid(parent)); in pf_add_policy_attrs()
197 struct xe_gt *gt = extract_gt(m->private); in sched_groups_info() local
199 gt->sriov.pf.policy.guc.sched_groups.current_mode; in sched_groups_info()
[all …]
H A Dxe_guc.c156 static bool needs_wa_dual_queue(struct xe_gt *gt) in needs_wa_dual_queue() argument
163 if (XE_GT_WA(gt, 22011391025)) in needs_wa_dual_queue()
178 if (CCS_INSTANCES(gt) && GRAPHICS_VERx100(gt_to_xe(gt)) >= 1270) in needs_wa_dual_queue()
187 struct xe_gt *gt = guc_to_gt(guc); in guc_ctl_wa_flags() local
190 if (XE_GT_WA(gt, 22012773006)) in guc_ctl_wa_flags()
193 if (XE_GT_WA(gt, 14014475959)) in guc_ctl_wa_flags()
196 if (needs_wa_dual_queue(gt)) in guc_ctl_wa_flags()
207 if (XE_GT_WA(gt, 22012727170) || XE_GT_WA(gt, 22012727685)) in guc_ctl_wa_flags()
210 if (XE_GT_WA(gt, 18020744125) && in guc_ctl_wa_flags()
211 !xe_hw_engine_mask_per_class(gt, XE_ENGINE_CLASS_RENDER)) in guc_ctl_wa_flags()
[all …]
H A Dxe_guc_ads.c234 static size_t calculate_regset_size(struct xe_gt *gt) in calculate_regset_size() argument
242 for_each_hw_engine(hwe, gt, id) in calculate_regset_size()
248 if (XE_GT_WA(gt, 1607983814)) in calculate_regset_size()
254 static u32 engine_enable_mask(struct xe_gt *gt, enum xe_engine_class class) in engine_enable_mask() argument
260 for_each_hw_engine(hwe, gt, id) in engine_enable_mask()
269 struct xe_gt *gt = ads_to_gt(ads); in calculate_golden_lrc_size() local
274 if (!engine_enable_mask(gt, class)) in calculate_golden_lrc_size()
277 real_size = xe_gt_lrc_size(gt, class); in calculate_golden_lrc_size()
311 struct xe_gt *gt = ads_to_gt(ads); in guc_waklv_init() local
318 if (XE_GT_WA(gt, 16021333562)) in guc_waklv_init()
[all …]
/linux/drivers/gpu/drm/i915/gt/
H A Dintel_gt.h20 #define IS_GFX_GT_IP_RANGE(gt, from, until) ( \ argument
23 ((gt)->type != GT_MEDIA && \
24 GRAPHICS_VER_FULL((gt)->i915) >= (from) && \
25 GRAPHICS_VER_FULL((gt)->i915) <= (until)))
34 #define IS_MEDIA_GT_IP_RANGE(gt, from, until) ( \ argument
37 ((gt) && (gt)->type == GT_MEDIA && \
38 MEDIA_VER_FULL((gt)->i915) >= (from) && \
39 MEDIA_VER_FULL((gt)->i915) <= (until)))
56 #define IS_GFX_GT_IP_STEP(gt, ipver, from, until) ( \ argument
58 (IS_GFX_GT_IP_RANGE((gt), (ipver), (ipver)) && \
[all …]
H A Dselftest_reset.c18 __igt_reset_stolen(struct intel_gt *gt, in __igt_reset_stolen() argument
22 struct i915_ggtt *ggtt = gt->ggtt; in __igt_reset_stolen()
23 const struct resource *dsm = &gt->i915->dsm.stolen; in __igt_reset_stolen()
51 igt_global_reset_lock(gt); in __igt_reset_stolen()
52 wakeref = intel_runtime_pm_get(gt->uncore->rpm); in __igt_reset_stolen()
54 err = igt_spinner_init(&spin, gt); in __igt_reset_stolen()
58 for_each_engine(engine, gt, id) { in __igt_reset_stolen()
89 i915_gem_get_pat_index(gt->i915, in __igt_reset_stolen()
98 if (!__drm_mm_interval_first(&gt->i915->mm.stolen, in __igt_reset_stolen()
114 intel_gt_reset(gt, mask, NULL); in __igt_reset_stolen()
[all …]
H A Dintel_gt_pm_irq.c13 static void write_pm_imr(struct intel_gt *gt) in write_pm_imr() argument
15 struct drm_i915_private *i915 = gt->i915; in write_pm_imr()
16 struct intel_uncore *uncore = gt->uncore; in write_pm_imr()
17 u32 mask = gt->pm_imr; in write_pm_imr()
32 static void gen6_gt_pm_update_irq(struct intel_gt *gt, in gen6_gt_pm_update_irq() argument
40 lockdep_assert_held(gt->irq_lock); in gen6_gt_pm_update_irq()
42 new_val = gt->pm_imr; in gen6_gt_pm_update_irq()
46 if (new_val != gt->pm_imr) { in gen6_gt_pm_update_irq()
47 gt->pm_imr = new_val; in gen6_gt_pm_update_irq()
48 write_pm_imr(gt); in gen6_gt_pm_update_irq()
[all …]
H A Dintel_gt_sysfs.c49 static struct kobject *gt_get_parent_obj(struct intel_gt *gt) in gt_get_parent_obj() argument
51 return &gt->i915->drm.primary->kdev->kobj; in gt_get_parent_obj()
58 struct intel_gt *gt = intel_gt_sysfs_get_drvdata(kobj, attr->attr.name); in id_show() local
60 return sysfs_emit(buf, "%u\n", gt->info.id); in id_show()
81 void intel_gt_sysfs_register(struct intel_gt *gt) in intel_gt_sysfs_register() argument
91 if (gt_is_root(gt)) in intel_gt_sysfs_register()
92 intel_gt_sysfs_pm_init(gt, gt_get_parent_obj(gt)); in intel_gt_sysfs_register()
95 if (kobject_init_and_add(&gt->sysfs_gt, &kobj_gt_type, in intel_gt_sysfs_register()
96 gt->i915->sysfs_gt, "gt%d", gt->info.id)) in intel_gt_sysfs_register()
99 gt->sysfs_defaults = kobject_create_and_add(".defaults", &gt->sysfs_gt); in intel_gt_sysfs_register()
[all …]
H A Dselftest_slpc.c22 struct intel_gt *gt; member
53 static int slpc_set_freq(struct intel_gt *gt, u32 freq) in slpc_set_freq() argument
56 struct intel_guc_slpc *slpc = &gt_to_guc(gt)->slpc; in slpc_set_freq()
113 static u64 measure_power_at_freq(struct intel_gt *gt, int *freq, u64 *power) in measure_power_at_freq() argument
117 err = slpc_set_freq(gt, *freq); in measure_power_at_freq()
120 *freq = intel_rps_read_actual_frequency(&gt->rps); in measure_power_at_freq()
121 *power = slpc_measure_power(&gt->rps, freq); in measure_power_at_freq()
198 static int slpc_power(struct intel_gt *gt, struct intel_engine_cs *engine) in slpc_power() argument
200 struct intel_guc_slpc *slpc = &gt_to_guc(gt)->slpc; in slpc_power()
212 if (!librapl_supported(gt->i915)) in slpc_power()
[all …]
H A Dselftest_hangcheck.c33 struct intel_gt *gt; member
41 static int hang_init(struct hang *h, struct intel_gt *gt) in hang_init() argument
47 h->gt = gt; in hang_init()
49 h->ctx = kernel_context(gt->i915, NULL); in hang_init()
55 h->hws = i915_gem_object_create_internal(gt->i915, PAGE_SIZE); in hang_init()
61 h->obj = i915_gem_object_create_internal(gt->i915, PAGE_SIZE); in hang_init()
76 intel_gt_coherent_map_type(gt, h->obj, false)); in hang_init()
106 struct intel_gt *gt = h->gt; in hang_create_request() local
116 obj = i915_gem_object_create_internal(gt->i915, PAGE_SIZE); in hang_create_request()
122 vaddr = i915_gem_object_pin_map_unlocked(obj, intel_gt_coherent_map_type(gt, obj, false)); in hang_create_request()
[all …]
H A Dintel_workarounds.c101 static void wa_init_start(struct i915_wa_list *wal, struct intel_gt *gt, in wa_init_start() argument
104 wal->gt = gt; in wa_init_start()
127 gt_dbg(wal->gt, "Initialized %u %s workarounds on %s\n", in wa_init_finish()
150 struct drm_i915_private *i915 = wal->gt->i915; in _wa_add()
435 (INTEL_INFO(i915)->gt == 3 ? HDC_FENCE_DEST_SLM_DISABLE : 0)); in bdw_ctx_workarounds_init()
549 struct intel_gt *gt = engine->gt; in skl_tune_iz_hashing() local
560 if (!is_power_of_2(gt->info.sseu.subslice_7eu[i])) in skl_tune_iz_hashing()
569 ss = ffs(gt->info.sseu.subslice_7eu[i]) - 1; in skl_tune_iz_hashing()
817 struct intel_gt *gt = engine->gt; in xelpg_ctx_gt_tuning_init() local
826 if (!(IS_GFX_GT_IP_STEP(gt, IP_VER(12, 70), STEP_A0, STEP_B0) || in xelpg_ctx_gt_tuning_init()
[all …]
H A Dselftest_gt_pm.c81 struct intel_gt *gt = arg; in live_gt_clocks() local
87 if (!gt->clock_frequency) { /* unknown */ in live_gt_clocks()
92 if (GRAPHICS_VER(gt->i915) < 4) /* Any CS_TIMESTAMP? */ in live_gt_clocks()
95 wakeref = intel_gt_pm_get(gt); in live_gt_clocks()
96 intel_uncore_forcewake_get(gt->uncore, FORCEWAKE_ALL); in live_gt_clocks()
98 for_each_engine(engine, gt, id) { in live_gt_clocks()
109 time = intel_gt_clock_interval_to_ns(engine->gt, cycles); in live_gt_clocks()
110 expected = intel_gt_ns_to_clock_interval(engine->gt, dt); in live_gt_clocks()
114 engine->gt->clock_frequency / 1000); in live_gt_clocks()
131 intel_uncore_forcewake_put(gt->uncore, FORCEWAKE_ALL); in live_gt_clocks()
[all …]
H A Dintel_gt_irq.h23 void gen11_gt_irq_reset(struct intel_gt *gt);
24 void gen11_gt_irq_postinstall(struct intel_gt *gt);
25 void gen11_gt_irq_handler(struct intel_gt *gt, const u32 master_ctl);
27 bool gen11_gt_reset_one_iir(struct intel_gt *gt,
31 void gen5_gt_irq_handler(struct intel_gt *gt, u32 gt_iir);
33 void gen5_gt_irq_postinstall(struct intel_gt *gt);
34 void gen5_gt_irq_reset(struct intel_gt *gt);
35 void gen5_gt_disable_irq(struct intel_gt *gt, u32 mask);
36 void gen5_gt_enable_irq(struct intel_gt *gt, u32 mask);
38 void gen6_gt_irq_handler(struct intel_gt *gt, u32 gt_iir);
[all …]
/linux/drivers/gpu/drm/i915/pxp/
H A Dintel_pxp_irq.c27 struct intel_gt *gt; in intel_pxp_irq_handler() local
32 gt = pxp->ctrl_gt; in intel_pxp_irq_handler()
34 lockdep_assert_held(gt->irq_lock); in intel_pxp_irq_handler()
54 static inline void __pxp_set_interrupts(struct intel_gt *gt, u32 interrupts) in __pxp_set_interrupts() argument
56 struct intel_uncore *uncore = gt->uncore; in __pxp_set_interrupts()
63 static inline void pxp_irq_reset(struct intel_gt *gt) in pxp_irq_reset() argument
65 spin_lock_irq(gt->irq_lock); in pxp_irq_reset()
66 gen11_gt_reset_one_iir(gt, 0, GEN11_KCR); in pxp_irq_reset()
67 spin_unlock_irq(gt->irq_lock); in pxp_irq_reset()
72 struct intel_gt *gt = pxp->ctrl_gt; in intel_pxp_irq_enable() local
[all …]
/linux/drivers/gpu/drm/i915/gt/uc/
H A Dselftest_guc.c51 struct intel_gt *gt = arg; in intel_guc_scrub_ctbs() local
59 if (!intel_has_gpu_reset(gt)) in intel_guc_scrub_ctbs()
62 wakeref = intel_runtime_pm_get(gt->uncore->rpm); in intel_guc_scrub_ctbs()
63 engine = intel_selftest_find_any_engine(gt); in intel_guc_scrub_ctbs()
70 gt_err(gt, "Failed to create context %d: %pe\n", i, ce); in intel_guc_scrub_ctbs()
91 gt_err(gt, "Failed to create request %d: %pe\n", i, rq); in intel_guc_scrub_ctbs()
101 gt_err(gt, "Last request failed to complete: %pe\n", ERR_PTR(ret)); in intel_guc_scrub_ctbs()
109 intel_gt_retire_requests(gt); in intel_guc_scrub_ctbs()
113 intel_gt_handle_error(engine->gt, -1, 0, "selftest reset"); in intel_guc_scrub_ctbs()
116 ret = intel_gt_wait_for_idle(gt, HZ); in intel_guc_scrub_ctbs()
[all …]
H A Dintel_gsc_uc.c19 struct intel_gt *gt = gsc_uc_to_gt(gsc); in gsc_work() local
24 wakeref = intel_runtime_pm_get(gt->uncore->rpm); in gsc_work()
26 spin_lock_irq(gt->irq_lock); in gsc_work()
29 spin_unlock_irq(gt->irq_lock); in gsc_work()
53 if (intel_uc_uses_huc(&gt->uc) && in gsc_work()
54 intel_huc_is_authenticated(&gt->uc.huc, INTEL_HUC_AUTH_BY_GUC)) in gsc_work()
55 intel_huc_auth(&gt->uc.huc, INTEL_HUC_AUTH_BY_GSC); in gsc_work()
60 gt_err(gt, "Proxy request received with GSC not loaded!\n"); in gsc_work()
71 gt_err(gt, "GSC proxy handler failed to init\n"); in gsc_work()
85 gt_dbg(gt, "GSC Proxy initialized\n"); in gsc_work()
[all …]
/linux/drivers/gpu/drm/i915/selftests/
H A Digt_reset.c14 void igt_global_reset_lock(struct intel_gt *gt) in igt_global_reset_lock() argument
19 pr_debug("%s: current gpu_error=%08lx\n", __func__, gt->reset.flags); in igt_global_reset_lock()
21 while (test_and_set_bit(I915_RESET_BACKOFF, &gt->reset.flags)) in igt_global_reset_lock()
22 wait_event(gt->reset.queue, in igt_global_reset_lock()
23 !test_bit(I915_RESET_BACKOFF, &gt->reset.flags)); in igt_global_reset_lock()
25 for_each_engine(engine, gt, id) { in igt_global_reset_lock()
27 &gt->reset.flags)) in igt_global_reset_lock()
28 wait_on_bit(&gt->reset.flags, I915_RESET_ENGINE + id, in igt_global_reset_lock()
33 void igt_global_reset_unlock(struct intel_gt *gt) in igt_global_reset_unlock() argument
38 for_each_engine(engine, gt, id) in igt_global_reset_unlock()
[all …]
/linux/drivers/media/radio/
H A Dradio-gemtek.c150 static void gemtek_bu2614_transmit(struct gemtek *gt) in gemtek_bu2614_transmit() argument
152 struct radio_isa_card *isa = &gt->isa; in gemtek_bu2614_transmit()
155 mute = gt->muted ? GEMTEK_MT : 0x00; in gemtek_bu2614_transmit()
160 for (i = 0, q = gt->bu2614data; i < 32; i++, q >>= 1) { in gemtek_bu2614_transmit()
182 struct gemtek *gt = kzalloc_obj(*gt); in gemtek_alloc() local
184 if (gt) in gemtek_alloc()
185 gt->muted = true; in gemtek_alloc()
186 return gt ? &gt->isa : NULL; in gemtek_alloc()
194 struct gemtek *gt = container_of(isa, struct gemtek, isa); in gemtek_s_frequency() local
196 if (hardmute && gt->muted) in gemtek_s_frequency()
[all …]
/linux/drivers/gpu/drm/i915/
H A Di915_gpu_error.c458 for_each_ss_steering(iter, ee->engine->gt, slice, subslice) in error_print_instdone()
463 for_each_ss_steering(iter, ee->engine->gt, slice, subslice) in error_print_instdone()
472 for_each_ss_steering(iter, ee->engine->gt, slice, subslice) in error_print_instdone()
790 struct intel_gt_coredump *gt) in err_print_gt_info() argument
794 intel_gt_info_print(&gt->info, &p); in err_print_gt_info()
795 intel_sseu_print_topology(gt->_gt->i915, &gt->info.sseu, &p); in err_print_gt_info()
799 struct intel_gt_coredump *gt) in err_print_gt_global_nonguc() argument
803 err_printf(m, "GT awake: %s\n", str_yes_no(gt->awake)); in err_print_gt_global_nonguc()
805 gt->clock_frequency, gt->clock_period_ns); in err_print_gt_global_nonguc()
806 err_printf(m, "EIR: 0x%08x\n", gt->eir); in err_print_gt_global_nonguc()
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