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Searched refs:gpu_cc_pll1 (Results 1 – 19 of 19) sorted by relevance

/linux/drivers/clk/qcom/
H A Dgpucc-sdm845.c38 static struct clk_alpha_pll gpu_cc_pll1 = { variable
62 { .hw = &gpu_cc_pll1.clkr.hw },
145 [GPU_CC_PLL1] = &gpu_cc_pll1.clkr,
184 clk_fabia_pll_configure(&gpu_cc_pll1, regmap, &gpu_cc_pll1_config); in gpu_cc_sdm845_probe()
H A Dgpucc-sc7180.c36 static struct clk_alpha_pll gpu_cc_pll1 = { variable
62 { .hw = &gpu_cc_pll1.clkr.hw },
192 [GPU_CC_PLL1] = &gpu_cc_pll1.clkr,
236 clk_fabia_pll_configure(&gpu_cc_pll1, regmap, &gpu_cc_pll_config); in gpu_cc_sc7180_probe()
H A Dgpucc-qcs615.c97 static struct clk_alpha_pll gpu_cc_pll1 = { variable
137 .hw = &gpu_cc_pll1.clkr.hw,
156 { .hw = &gpu_cc_pll1.clkr.hw },
174 { .hw = &gpu_cc_pll1.clkr.hw },
439 [GPU_CC_PLL1] = &gpu_cc_pll1.clkr,
458 &gpu_cc_pll1,
H A Dgpucc-sm6350.c105 static struct clk_alpha_pll gpu_cc_pll1 = { variable
134 { .hw = &gpu_cc_pll1.clkr.hw },
152 { .hw = &gpu_cc_pll1.clkr.hw },
153 { .hw = &gpu_cc_pll1.clkr.hw },
461 [GPU_CC_PLL1] = &gpu_cc_pll1.clkr,
503 clk_fabia_pll_configure(&gpu_cc_pll1, regmap, &gpu_cc_pll1_config); in gpu_cc_sm6350_probe()
H A Dgpucc-sm8250.c50 static struct clk_alpha_pll gpu_cc_pll1 = { variable
76 { .hw = &gpu_cc_pll1.clkr.hw },
261 [GPU_CC_PLL1] = &gpu_cc_pll1.clkr,
312 clk_lucid_pll_configure(&gpu_cc_pll1, regmap, &gpu_cc_pll1_config); in gpu_cc_sm8250_probe()
H A Dgpucc-sm8150.c47 static struct clk_alpha_pll gpu_cc_pll1 = { variable
73 { .hw = &gpu_cc_pll1.clkr.hw },
253 [GPU_CC_PLL1] = &gpu_cc_pll1.clkr,
305 clk_trion_pll_configure(&gpu_cc_pll1, regmap, &gpu_cc_pll1_config); in gpu_cc_sm8150_probe()
H A Dgpucc-sc8280xp.c87 static struct clk_alpha_pll gpu_cc_pll1 = { variable
113 { .hw = &gpu_cc_pll1.clkr.hw },
127 { .hw = &gpu_cc_pll1.clkr.hw },
379 [GPU_CC_PLL1] = &gpu_cc_pll1.clkr,
446 clk_lucid_pll_configure(&gpu_cc_pll1, regmap, &gpu_cc_pll1_config); in gpu_cc_sc8280xp_probe()
H A Dgpucc-sar2130p.c88 static struct clk_alpha_pll gpu_cc_pll1 = { variable
128 { .hw = &gpu_cc_pll1.clkr.hw },
142 { .hw = &gpu_cc_pll1.clkr.hw },
435 [GPU_CC_PLL1] = &gpu_cc_pll1.clkr,
484 clk_lucid_ole_pll_configure(&gpu_cc_pll1, regmap, &gpu_cc_pll1_config); in gpu_cc_sar2130p_probe()
H A Dgpucc-sc7280.c63 static struct clk_alpha_pll gpu_cc_pll1 = { variable
91 { .hw = &gpu_cc_pll1.clkr.hw },
105 { .hw = &gpu_cc_pll1.clkr.hw },
431 [GPU_CC_PLL1] = &gpu_cc_pll1.clkr,
465 clk_lucid_pll_configure(&gpu_cc_pll1, regmap, &gpu_cc_pll1_config); in gpu_cc_sc7280_probe()
H A Dgpucc-sm6115.c118 static struct clk_alpha_pll gpu_cc_pll1 = { variable
151 &gpu_cc_pll1.clkr.hw,
170 { .hw = &gpu_cc_pll1.clkr.hw },
433 [GPU_CC_PLL1] = &gpu_cc_pll1.clkr,
481 clk_alpha_pll_configure(&gpu_cc_pll1, regmap, &gpu_cc_pll1_config); in gpu_cc_sm6115_probe()
H A Dgpucc-sm4450.c84 static struct clk_alpha_pll gpu_cc_pll1 = { variable
124 { .hw = &gpu_cc_pll1.clkr.hw },
142 { .hw = &gpu_cc_pll1.clkr.hw },
143 { .hw = &gpu_cc_pll1.clkr.hw },
156 { .hw = &gpu_cc_pll1.clkr.hw },
724 [GPU_CC_PLL1] = &gpu_cc_pll1.clkr,
782 clk_lucid_evo_pll_configure(&gpu_cc_pll1, regmap, &gpu_cc_pll1_config); in gpu_cc_sm4450_probe()
H A Dgpucc-sm8450.c107 static struct clk_alpha_pll gpu_cc_pll1 = { variable
147 { .hw = &gpu_cc_pll1.clkr.hw },
161 { .hw = &gpu_cc_pll1.clkr.hw },
723 [GPU_CC_PLL1] = &gpu_cc_pll1.clkr,
784 gpu_cc_pll1.regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_LUCID_OLE]; in gpu_cc_sm8450_probe()
787 clk_lucid_ole_pll_configure(&gpu_cc_pll1, regmap, &sm8475_gpu_cc_pll1_config); in gpu_cc_sm8450_probe()
790 clk_lucid_evo_pll_configure(&gpu_cc_pll1, regmap, &gpu_cc_pll1_config); in gpu_cc_sm8450_probe()
H A Dgpucc-x1p42100.c91 static struct clk_alpha_pll gpu_cc_pll1 = { variable
131 { .hw = &gpu_cc_pll1.clkr.hw },
145 { .hw = &gpu_cc_pll1.clkr.hw },
496 [GPU_CC_PLL1] = &gpu_cc_pll1.clkr,
561 clk_lucid_ole_pll_configure(&gpu_cc_pll1, regmap, &gpu_cc_pll1_config); in gpu_cc_x1p42100_probe()
H A Dgpucc-nord.c90 static struct clk_alpha_pll gpu_cc_pll1 = { variable
131 { .hw = &gpu_cc_pll1.clkr.hw },
145 { .hw = &gpu_cc_pll1.clkr.hw },
515 [GPU_CC_PLL1] = &gpu_cc_pll1.clkr,
536 &gpu_cc_pll1,
H A Dgpucc-sm8550.c85 static struct clk_alpha_pll gpu_cc_pll1 = { variable
125 { .hw = &gpu_cc_pll1.clkr.hw },
139 { .hw = &gpu_cc_pll1.clkr.hw },
520 [GPU_CC_PLL1] = &gpu_cc_pll1.clkr,
575 clk_lucid_ole_pll_configure(&gpu_cc_pll1, regmap, &gpu_cc_pll1_config); in gpu_cc_sm8550_probe()
H A Dgpucc-sm8350.c87 static struct clk_alpha_pll gpu_cc_pll1 = { variable
113 { .hw = &gpu_cc_pll1.clkr.hw },
127 { .hw = &gpu_cc_pll1.clkr.hw },
556 [GPU_CC_PLL1] = &gpu_cc_pll1.clkr,
605 clk_lucid_pll_configure(&gpu_cc_pll1, regmap, &gpu_cc_pll1_config); in gpu_cc_sm8350_probe()
H A Dgpucc-x1e80100.c87 static struct clk_alpha_pll gpu_cc_pll1 = { variable
127 { .hw = &gpu_cc_pll1.clkr.hw },
141 { .hw = &gpu_cc_pll1.clkr.hw },
581 [GPU_CC_PLL1] = &gpu_cc_pll1.clkr,
637 clk_lucid_evo_pll_configure(&gpu_cc_pll1, regmap, &gpu_cc_pll1_config); in gpu_cc_x1e80100_probe()
H A Dgpucc-sm8650.c88 static struct clk_alpha_pll gpu_cc_pll1 = { variable
128 { .hw = &gpu_cc_pll1.clkr.hw },
142 { .hw = &gpu_cc_pll1.clkr.hw },
593 [GPU_CC_PLL1] = &gpu_cc_pll1.clkr,
647 clk_lucid_ole_pll_configure(&gpu_cc_pll1, regmap, &gpu_cc_pll1_config); in gpu_cc_sm8650_probe()
H A Dgpucc-sa8775p.c83 static struct clk_alpha_pll gpu_cc_pll1 = { variable
121 { .hw = &gpu_cc_pll1.clkr.hw },
135 { .hw = &gpu_cc_pll1.clkr.hw },
556 [GPU_CC_PLL1] = &gpu_cc_pll1.clkr,
646 clk_lucid_evo_pll_configure(&gpu_cc_pll1, regmap, &gpu_cc_pll1_config); in gpu_cc_sa8775p_probe()