Searched refs:gfx_table (Results 1 – 15 of 15) sorted by relevance
357 dpm_table = &dpm_context->dpm_tables.gfx_table; in aldebaran_get_dpm_ultimate_freq()419 dpm_table = &dpm_context->dpm_tables.gfx_table; in aldebaran_set_default_dpm_table()587 struct smu_dpm_table *gfx_table = &dpm_context->dpm_tables.gfx_table; in aldebaran_populate_umd_state_clk() local593 pstate_table->gfxclk_pstate.min = SMU_DPM_TABLE_MIN(gfx_table); in aldebaran_populate_umd_state_clk()594 pstate_table->gfxclk_pstate.peak = SMU_DPM_TABLE_MAX(gfx_table); in aldebaran_populate_umd_state_clk()595 pstate_table->gfxclk_pstate.curr.min = SMU_DPM_TABLE_MIN(gfx_table); in aldebaran_populate_umd_state_clk()596 pstate_table->gfxclk_pstate.curr.max = SMU_DPM_TABLE_MAX(gfx_table); in aldebaran_populate_umd_state_clk()608 if (gfx_table->count > ALDEBARAN_UMD_PSTATE_GFXCLK_LEVEL && in aldebaran_populate_umd_state_clk()612 gfx_table->dpm_levels[ALDEBARAN_UMD_PSTATE_GFXCLK_LEVEL].value; in aldebaran_populate_umd_state_clk()823 single_dpm_table = &(dpm_context->dpm_tables.gfx_table); in aldebaran_emit_clk_levels()[all …]
1006 dpm_table = &dpm_context->dpm_tables.gfx_table; in smu_v13_0_6_get_dpm_ultimate_freq()1130 dpm_table = &dpm_context->dpm_tables.gfx_table; in smu_v13_0_6_set_default_dpm_table()1204 struct smu_dpm_table *gfx_table = &dpm_context->dpm_tables.gfx_table; in smu_v13_0_6_populate_umd_state_clk() local1210 pstate_table->gfxclk_pstate.min = SMU_DPM_TABLE_MIN(gfx_table); in smu_v13_0_6_populate_umd_state_clk()1211 pstate_table->gfxclk_pstate.peak = SMU_DPM_TABLE_MAX(gfx_table); in smu_v13_0_6_populate_umd_state_clk()1212 pstate_table->gfxclk_pstate.curr.min = SMU_DPM_TABLE_MIN(gfx_table); in smu_v13_0_6_populate_umd_state_clk()1213 pstate_table->gfxclk_pstate.curr.max = SMU_DPM_TABLE_MAX(gfx_table); in smu_v13_0_6_populate_umd_state_clk()1231 if (gfx_table->count > SMU_13_0_6_UMD_PSTATE_GFXCLK_LEVEL && in smu_v13_0_6_populate_umd_state_clk()1235 gfx_table->dpm_levels[SMU_13_0_6_UMD_PSTATE_GFXCLK_LEVEL].value; in smu_v13_0_6_populate_umd_state_clk()1427 single_dpm_table = &(dpm_context->dpm_tables.gfx_table); in smu_v13_0_6_emit_clk_levels()[all …]
61 struct aldebaran_single_dpm_table gfx_table; member
614 dpm_table = &dpm_context->dpm_tables.gfx_table; in smu_v13_0_7_set_default_dpm_table()886 dpm_table = &dpm_context->dpm_tables.gfx_table; in smu_v13_0_7_get_dpm_ultimate_freq()1232 single_dpm_table = &(dpm_context->dpm_tables.gfx_table); in smu_v13_0_7_emit_clk_levels()1968 single_dpm_table = &(dpm_context->dpm_tables.gfx_table); in smu_v13_0_7_force_clk_levels()2272 struct smu_dpm_table *gfx_table = &dpm_context->dpm_tables.gfx_table; in smu_v13_0_7_populate_umd_state_clk() local2285 pstate_table->gfxclk_pstate.min = SMU_DPM_TABLE_MIN(gfx_table); in smu_v13_0_7_populate_umd_state_clk()2287 (driver_clocks.GameClockAc < SMU_DPM_TABLE_MAX(gfx_table))) in smu_v13_0_7_populate_umd_state_clk()2290 pstate_table->gfxclk_pstate.peak = SMU_DPM_TABLE_MAX(gfx_table); in smu_v13_0_7_populate_umd_state_clk()2308 driver_clocks.BaseClockAc < SMU_DPM_TABLE_MAX(gfx_table)) in smu_v13_0_7_populate_umd_state_clk()2312 SMU_DPM_TABLE_MAX(gfx_table); in smu_v13_0_7_populate_umd_state_clk()
586 dpm_table = &dpm_context->dpm_tables.gfx_table; in smu_v13_0_0_set_default_dpm_table()876 dpm_table = &dpm_context->dpm_tables.gfx_table; in smu_v13_0_0_get_dpm_ultimate_freq()1222 single_dpm_table = &(dpm_context->dpm_tables.gfx_table); in smu_v13_0_0_emit_clk_levels()1958 single_dpm_table = &(dpm_context->dpm_tables.gfx_table); in smu_v13_0_0_force_clk_levels()2270 struct smu_dpm_table *gfx_table = &dpm_context->dpm_tables.gfx_table; in smu_v13_0_0_populate_umd_state_clk() local2283 pstate_table->gfxclk_pstate.min = SMU_DPM_TABLE_MIN(gfx_table); in smu_v13_0_0_populate_umd_state_clk()2285 (driver_clocks.GameClockAc < SMU_DPM_TABLE_MAX(gfx_table))) in smu_v13_0_0_populate_umd_state_clk()2288 pstate_table->gfxclk_pstate.peak = SMU_DPM_TABLE_MAX(gfx_table); in smu_v13_0_0_populate_umd_state_clk()2306 driver_clocks.BaseClockAc < SMU_DPM_TABLE_MAX(gfx_table)) in smu_v13_0_0_populate_umd_state_clk()2310 SMU_DPM_TABLE_MAX(gfx_table); in smu_v13_0_0_populate_umd_state_clk()
600 dpm_table = &(data->dpm_table.gfx_table); in vega20_setup_gfxclk_dpm_table()666 dpm_table = &(data->dpm_table.gfx_table); in vega20_setup_default_dpm_tables()1481 &(data->dpm_table.gfx_table); in vega20_get_sclk_od()1483 &(data->golden_dpm_table.gfx_table); in vega20_get_sclk_od()1500 &(data->golden_dpm_table.gfx_table); in vega20_set_sclk_od()1571 struct vega20_single_dpm_table *gfx_table = &(data->dpm_table.gfx_table); in vega20_populate_umdpstate_clocks() local1574 if (gfx_table->count > VEGA20_UMD_PSTATE_GFXCLK_LEVEL && in vega20_populate_umdpstate_clocks()1576 hwmgr->pstate_sclk = gfx_table->dpm_levels[VEGA20_UMD_PSTATE_GFXCLK_LEVEL].value; in vega20_populate_umdpstate_clocks()1579 hwmgr->pstate_sclk = gfx_table->dpm_levels[0].value; in vega20_populate_umdpstate_clocks()1583 hwmgr->pstate_sclk_peak = gfx_table->dpm_levels[gfx_table->count - 1].value; in vega20_populate_umdpstate_clocks()[all …]
667 dpm_table = &(data->dpm_table.gfx_table); in vega12_setup_default_dpm_tables()788 struct vega12_single_dpm_table *dpm_table = &(data->dpm_table.gfx_table);1041 struct vega12_single_dpm_table *gfx_dpm_table = &(data->dpm_table.gfx_table); in vega12_populate_umdpstate_clocks()1166 min_freq = data->dpm_table.gfx_table.dpm_state.soft_min_level; in vega12_upload_dpm_min_level()1257 max_freq = data->dpm_table.gfx_table.dpm_state.soft_max_level; in vega12_upload_dpm_max_level()1661 soft_level = vega12_find_highest_dpm_level(&(data->dpm_table.gfx_table)); in vega12_force_dpm_highest()1663 data->dpm_table.gfx_table.dpm_state.soft_min_level = in vega12_force_dpm_highest()1664 data->dpm_table.gfx_table.dpm_state.soft_max_level = in vega12_force_dpm_highest()1665 data->dpm_table.gfx_table.dpm_levels[soft_level].value; in vega12_force_dpm_highest()1690 soft_level = vega12_find_lowest_dpm_level(&(data->dpm_table.gfx_table)); in vega12_force_dpm_lowest()[all …]
1360 dpm_table = &(data->dpm_table.gfx_table); in vega10_setup_default_dpm_tables()1732 struct vega10_single_dpm_table *dpm_table = &(data->dpm_table.gfx_table); in vega10_populate_all_graphic_levels()3438 struct vega10_single_dpm_table *sclk_table = &(data->dpm_table.gfx_table); in vega10_find_dpm_states_clocks_in_dpm_table()3494 for (count = 0; count < dpm_table->gfx_table.count; count++) in vega10_populate_and_upload_sclk_mclk_dpm_levels()3495 dpm_table->gfx_table.dpm_levels[count].value = odn_clk_table->entries[count].clk; in vega10_populate_and_upload_sclk_mclk_dpm_levels()3578 &(data->dpm_table.gfx_table), in vega10_trim_dpm_states()3648 data->dpm_table.gfx_table.dpm_state.soft_min_level) { in vega10_upload_dpm_bootup_level()3654 data->dpm_table.gfx_table.dpm_state.soft_min_level = in vega10_upload_dpm_bootup_level()3706 data->dpm_table.gfx_table.dpm_state.soft_max_level) { in vega10_upload_dpm_max_level()3711 data->dpm_table.gfx_table.dpm_state.soft_max_level = in vega10_upload_dpm_max_level()[all …]
126 struct vega12_single_dpm_table gfx_table; member
148 struct vega10_single_dpm_table gfx_table; member
179 struct vega20_single_dpm_table gfx_table; member
61 struct arcturus_single_dpm_table gfx_table; member
1786 struct smu_dpm_table *gfx_table = &dpm_context->dpm_tables.gfx_table; in smu_v11_0_set_performance_level() local1800 sclk_min = sclk_max = SMU_DPM_TABLE_MAX(gfx_table); in smu_v11_0_set_performance_level()1805 sclk_min = sclk_max = SMU_DPM_TABLE_MIN(gfx_table); in smu_v11_0_set_performance_level()1810 sclk_min = SMU_DPM_TABLE_MIN(gfx_table); in smu_v11_0_set_performance_level()1811 sclk_max = SMU_DPM_TABLE_MAX(gfx_table); in smu_v11_0_set_performance_level()
486 dpm_table = &dpm_context->dpm_tables.gfx_table; in smu_v14_0_2_set_default_dpm_table()764 dpm_table = &dpm_context->dpm_tables.gfx_table; in smu_v14_0_2_get_dpm_ultimate_freq()1053 single_dpm_table = &(dpm_context->dpm_tables.gfx_table); in smu_v14_0_2_emit_clk_levels()1322 single_dpm_table = &(dpm_context->dpm_tables.gfx_table); in smu_v14_0_2_force_clk_levels()1510 struct smu_dpm_table *gfx_table = &dpm_context->dpm_tables.gfx_table; in smu_v14_0_2_populate_umd_state_clk() local1523 pstate_table->gfxclk_pstate.min = SMU_DPM_TABLE_MIN(gfx_table); in smu_v14_0_2_populate_umd_state_clk()1525 (driver_clocks.GameClockAc < SMU_DPM_TABLE_MAX(gfx_table))) in smu_v14_0_2_populate_umd_state_clk()1528 pstate_table->gfxclk_pstate.peak = SMU_DPM_TABLE_MAX(gfx_table); in smu_v14_0_2_populate_umd_state_clk()1546 driver_clocks.BaseClockAc < SMU_DPM_TABLE_MAX(gfx_table)) in smu_v14_0_2_populate_umd_state_clk()1550 SMU_DPM_TABLE_MAX(gfx_table); in smu_v14_0_2_populate_umd_state_clk()
1188 struct smu_dpm_table *gfx_table = &dpm_context->dpm_tables.gfx_table; in smu_v14_0_set_performance_level() local1208 sclk_min = sclk_max = SMU_DPM_TABLE_MAX(gfx_table); in smu_v14_0_set_performance_level()1216 sclk_min = sclk_max = SMU_DPM_TABLE_MIN(gfx_table); in smu_v14_0_set_performance_level()1224 sclk_min = SMU_DPM_TABLE_MIN(gfx_table); in smu_v14_0_set_performance_level()1225 sclk_max = SMU_DPM_TABLE_MAX(gfx_table); in smu_v14_0_set_performance_level()