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Searched refs:gfx_table (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dvega20_hwmgr.c600 dpm_table = &(data->dpm_table.gfx_table); in vega20_setup_gfxclk_dpm_table()
666 dpm_table = &(data->dpm_table.gfx_table); in vega20_setup_default_dpm_tables()
1481 &(data->dpm_table.gfx_table); in vega20_get_sclk_od()
1483 &(data->golden_dpm_table.gfx_table); in vega20_get_sclk_od()
1500 &(data->golden_dpm_table.gfx_table); in vega20_set_sclk_od()
1571 struct vega20_single_dpm_table *gfx_table = &(data->dpm_table.gfx_table); in vega20_populate_umdpstate_clocks() local
1574 if (gfx_table->count > VEGA20_UMD_PSTATE_GFXCLK_LEVEL && in vega20_populate_umdpstate_clocks()
1576 hwmgr->pstate_sclk = gfx_table->dpm_levels[VEGA20_UMD_PSTATE_GFXCLK_LEVEL].value; in vega20_populate_umdpstate_clocks()
1579 hwmgr->pstate_sclk = gfx_table->dpm_levels[0].value; in vega20_populate_umdpstate_clocks()
1583 hwmgr->pstate_sclk_peak = gfx_table->dpm_levels[gfx_table->count - 1].value; in vega20_populate_umdpstate_clocks()
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H A Dvega12_hwmgr.c667 dpm_table = &(data->dpm_table.gfx_table); in vega12_setup_default_dpm_tables()
788 struct vega12_single_dpm_table *dpm_table = &(data->dpm_table.gfx_table);
1041 struct vega12_single_dpm_table *gfx_dpm_table = &(data->dpm_table.gfx_table); in vega12_populate_umdpstate_clocks()
1166 min_freq = data->dpm_table.gfx_table.dpm_state.soft_min_level; in vega12_upload_dpm_min_level()
1257 max_freq = data->dpm_table.gfx_table.dpm_state.soft_max_level; in vega12_upload_dpm_max_level()
1661 soft_level = vega12_find_highest_dpm_level(&(data->dpm_table.gfx_table)); in vega12_force_dpm_highest()
1663 data->dpm_table.gfx_table.dpm_state.soft_min_level = in vega12_force_dpm_highest()
1664 data->dpm_table.gfx_table.dpm_state.soft_max_level = in vega12_force_dpm_highest()
1665 data->dpm_table.gfx_table.dpm_levels[soft_level].value; in vega12_force_dpm_highest()
1690 soft_level = vega12_find_lowest_dpm_level(&(data->dpm_table.gfx_table)); in vega12_force_dpm_lowest()
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H A Dvega10_hwmgr.c1361 dpm_table = &(data->dpm_table.gfx_table); in vega10_setup_default_dpm_tables()
1733 struct vega10_single_dpm_table *dpm_table = &(data->dpm_table.gfx_table); in vega10_populate_all_graphic_levels()
3439 struct vega10_single_dpm_table *sclk_table = &(data->dpm_table.gfx_table); in vega10_find_dpm_states_clocks_in_dpm_table()
3495 for (count = 0; count < dpm_table->gfx_table.count; count++) in vega10_populate_and_upload_sclk_mclk_dpm_levels()
3496 dpm_table->gfx_table.dpm_levels[count].value = odn_clk_table->entries[count].clk; in vega10_populate_and_upload_sclk_mclk_dpm_levels()
3579 &(data->dpm_table.gfx_table), in vega10_trim_dpm_states()
3649 data->dpm_table.gfx_table.dpm_state.soft_min_level) { in vega10_upload_dpm_bootup_level()
3655 data->dpm_table.gfx_table.dpm_state.soft_min_level = in vega10_upload_dpm_bootup_level()
3707 data->dpm_table.gfx_table.dpm_state.soft_max_level) { in vega10_upload_dpm_max_level()
3712 data->dpm_table.gfx_table.dpm_state.soft_max_level = in vega10_upload_dpm_max_level()
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H A Dvega12_hwmgr.h126 struct vega12_single_dpm_table gfx_table; member
H A Dvega10_hwmgr.h148 struct vega10_single_dpm_table gfx_table; member
H A Dvega20_hwmgr.h179 struct vega20_single_dpm_table gfx_table; member
/linux/drivers/gpu/drm/amd/pm/swsmu/smu13/
H A Daldebaran_ppt.h61 struct aldebaran_single_dpm_table gfx_table; member
/linux/drivers/gpu/drm/amd/pm/swsmu/smu11/
H A Darcturus_ppt.h61 struct arcturus_single_dpm_table gfx_table; member
/linux/drivers/gpu/drm/amd/pm/swsmu/smu14/
H A Dsmu_v14_0_2_ppt.c525 dpm_table = &dpm_context->dpm_tables.gfx_table; in smu_v14_0_2_set_default_dpm_table()
826 dpm_table = &dpm_context->dpm_tables.gfx_table; in smu_v14_0_2_get_dpm_ultimate_freq()
1080 single_dpm_table = &(dpm_context->dpm_tables.gfx_table); in smu_v14_0_2_print_clk_levels()
1398 single_dpm_table = &(dpm_context->dpm_tables.gfx_table); in smu_v14_0_2_force_clk_levels()
1555 struct smu_14_0_dpm_table *gfx_table = in smu_v14_0_2_populate_umd_state_clk() local
1556 &dpm_context->dpm_tables.gfx_table; in smu_v14_0_2_populate_umd_state_clk()
1574 pstate_table->gfxclk_pstate.min = gfx_table->min; in smu_v14_0_2_populate_umd_state_clk()
1576 (driver_clocks.GameClockAc < gfx_table->max)) in smu_v14_0_2_populate_umd_state_clk()
1579 pstate_table->gfxclk_pstate.peak = gfx_table->max; in smu_v14_0_2_populate_umd_state_clk()
1597 driver_clocks.BaseClockAc < gfx_table->max) in smu_v14_0_2_populate_umd_state_clk()
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