Home
last modified time | relevance | path

Searched refs:enablement (Results 1 – 25 of 28) sorted by relevance

12

/linux/Documentation/arch/riscv/
H A Dvector.rst13 Two new prctl() calls are added to allow programs to manage the enablement
26 Sets the Vector enablement status of the calling thread, where the control
27 argument consists of two 2-bit enablement statuses and a bit for inheritance
34 enablement status on execve(). The system-wide default setting can be
49 enablement status of current thread, and the setting at bit[3:2] takes place
54 Vector enablement status for the calling thread. The calling thread is
57 but the current enablement status is not off. Setting
59 the original enablement status.
62 Vector enablement setting for the calling thread at the next execve()
64 then the enablement status will be decided by the system-wide
[all …]
/linux/drivers/gpu/drm/amd/pm/swsmu/smu15/
H A Dsmu_v15_0.c1505 bool enablement) in smu_v15_0_gpo_control() argument
1511 enablement ? 1 : 0, in smu_v15_0_gpo_control()
1514 dev_err(smu->adev->dev, "SetGpoAllow %d failed!\n", enablement); in smu_v15_0_gpo_control()
1520 bool enablement) in smu_v15_0_deep_sleep_control() argument
1526 ret = smu_cmn_feature_set_enabled(smu, SMU_FEATURE_DS_GFXCLK_BIT, enablement); in smu_v15_0_deep_sleep_control()
1528 dev_err(adev->dev, "Failed to %s GFXCLK DS!\n", enablement ? "enable" : "disable"); in smu_v15_0_deep_sleep_control()
1534 ret = smu_cmn_feature_set_enabled(smu, SMU_FEATURE_DS_UCLK_BIT, enablement); in smu_v15_0_deep_sleep_control()
1536 dev_err(adev->dev, "Failed to %s UCLK DS!\n", enablement ? "enable" : "disable"); in smu_v15_0_deep_sleep_control()
1542 ret = smu_cmn_feature_set_enabled(smu, SMU_FEATURE_DS_FCLK_BIT, enablement); in smu_v15_0_deep_sleep_control()
1544 dev_err(adev->dev, "Failed to %s FCLK DS!\n", enablement ? "enable" : "disable"); in smu_v15_0_deep_sleep_control()
[all …]
/linux/drivers/gpu/drm/amd/pm/swsmu/smu14/
H A Dsmu_v14_0.c1631 bool enablement) in smu_v14_0_gpo_control() argument
1637 enablement ? 1 : 0, in smu_v14_0_gpo_control()
1640 dev_err(smu->adev->dev, "SetGpoAllow %d failed!\n", enablement); in smu_v14_0_gpo_control()
1646 bool enablement) in smu_v14_0_deep_sleep_control() argument
1652 ret = smu_cmn_feature_set_enabled(smu, SMU_FEATURE_DS_GFXCLK_BIT, enablement); in smu_v14_0_deep_sleep_control()
1654 dev_err(adev->dev, "Failed to %s GFXCLK DS!\n", enablement ? "enable" : "disable"); in smu_v14_0_deep_sleep_control()
1660 ret = smu_cmn_feature_set_enabled(smu, SMU_FEATURE_DS_UCLK_BIT, enablement); in smu_v14_0_deep_sleep_control()
1662 dev_err(adev->dev, "Failed to %s UCLK DS!\n", enablement ? "enable" : "disable"); in smu_v14_0_deep_sleep_control()
1668 ret = smu_cmn_feature_set_enabled(smu, SMU_FEATURE_DS_FCLK_BIT, enablement); in smu_v14_0_deep_sleep_control()
1670 dev_err(adev->dev, "Failed to %s FCLK DS!\n", enablement ? "enable" : "disable"); in smu_v14_0_deep_sleep_control()
[all …]
/linux/drivers/gpu/drm/amd/pm/swsmu/smu13/
H A Dsmu_v13_0.c2025 bool enablement) in smu_v13_0_gpo_control() argument
2031 enablement ? 1 : 0, in smu_v13_0_gpo_control()
2034 dev_err(smu->adev->dev, "SetGpoAllow %d failed!\n", enablement); in smu_v13_0_gpo_control()
2040 bool enablement) in smu_v13_0_deep_sleep_control() argument
2046 ret = smu_cmn_feature_set_enabled(smu, SMU_FEATURE_DS_GFXCLK_BIT, enablement); in smu_v13_0_deep_sleep_control()
2048 dev_err(adev->dev, "Failed to %s GFXCLK DS!\n", enablement ? "enable" : "disable"); in smu_v13_0_deep_sleep_control()
2054 ret = smu_cmn_feature_set_enabled(smu, SMU_FEATURE_DS_UCLK_BIT, enablement); in smu_v13_0_deep_sleep_control()
2056 dev_err(adev->dev, "Failed to %s UCLK DS!\n", enablement ? "enable" : "disable"); in smu_v13_0_deep_sleep_control()
2062 ret = smu_cmn_feature_set_enabled(smu, SMU_FEATURE_DS_FCLK_BIT, enablement); in smu_v13_0_deep_sleep_control()
2064 dev_err(adev->dev, "Failed to %s FCLK DS!\n", enablement ? "enable" : "disable"); in smu_v13_0_deep_sleep_control()
[all …]
/linux/drivers/gpu/drm/amd/pm/swsmu/inc/
H A Dsmu_v15_0.h205 bool enablement);
222 bool enablement);
225 bool enablement);
H A Damdgpu_smu.h1487 int (*gfx_ulv_control)(struct smu_context *smu, bool enablement);
1492 int (*deep_sleep_control)(struct smu_context *smu, bool enablement);
1514 int (*gpo_control)(struct smu_context *smu, bool enablement);
/linux/drivers/gpu/drm/amd/pm/swsmu/smu11/
H A Dsmu_v11_0.c2100 bool enablement) in smu_v11_0_gfx_ulv_control() argument
2105 ret = smu_cmn_feature_set_enabled(smu, SMU_FEATURE_GFX_ULV_BIT, enablement); in smu_v11_0_gfx_ulv_control()
2111 bool enablement) in smu_v11_0_deep_sleep_control() argument
2117 ret = smu_cmn_feature_set_enabled(smu, SMU_FEATURE_DS_GFXCLK_BIT, enablement); in smu_v11_0_deep_sleep_control()
2119 dev_err(adev->dev, "Failed to %s GFXCLK DS!\n", enablement ? "enable" : "disable"); in smu_v11_0_deep_sleep_control()
2125 ret = smu_cmn_feature_set_enabled(smu, SMU_FEATURE_DS_UCLK_BIT, enablement); in smu_v11_0_deep_sleep_control()
2127 dev_err(adev->dev, "Failed to %s UCLK DS!\n", enablement ? "enable" : "disable"); in smu_v11_0_deep_sleep_control()
2133 ret = smu_cmn_feature_set_enabled(smu, SMU_FEATURE_DS_FCLK_BIT, enablement); in smu_v11_0_deep_sleep_control()
2135 dev_err(adev->dev, "Failed to %s FCLK DS!\n", enablement ? "enable" : "disable"); in smu_v11_0_deep_sleep_control()
2141 ret = smu_cmn_feature_set_enabled(smu, SMU_FEATURE_DS_SOCCLK_BIT, enablement); in smu_v11_0_deep_sleep_control()
[all …]
H A Dsienna_cichlid_ppt.c2860 bool enablement) in sienna_cichlid_gpo_control() argument
2867 if (enablement) { in sienna_cichlid_gpo_control()
/linux/Documentation/ABI/stable/
H A Dsysfs-kernel-time-aux-clocks5 Controls the enablement of auxiliary clock timekeepers.
/linux/kernel/configs/
H A Dnopm.config10 # Triggers enablement via hibernate callbacks
/linux/Documentation/gpu/
H A Dpanfrost.rst49 Where `N` is either `0` or `1`, depending on the desired enablement status.
/linux/Documentation/gpu/amdgpu/
H A Dras.rst53 This test checks the RAS availability and enablement status for each supported IP block as well as
/linux/tools/testing/selftests/rcutorture/doc/
H A DTREE_RCU-kconfig.txt11 CONFIG_NO_HZ_FULL -- Do two, one with partial CPU enablement.
/linux/tools/testing/selftests/user_events/
H A Dabi_test.c234 TEST_F(user, enablement) { in TEST_F() argument
/linux/Documentation/PCI/
H A Dpci-iov-howto.rst37 Multiple methods are available for SR-IOV enablement.
/linux/Documentation/admin-guide/cifs/
H A Dtodo.rst116 2) Improve xfstest's cifs/smb3 enablement and adapt xfstests where needed to test
/linux/Documentation/arch/x86/x86_64/
H A Dfsgs.rst90 FSGSBASE instructions enablement
/linux/Documentation/devicetree/bindings/powerpc/
H A Dibm,powerpc-cpu-features.txt13 enablement, privilege, and compatibility metadata.
/linux/drivers/char/tpm/
H A DKconfig18 userspace enablement piece of the specification, can be
/linux/mm/
H A DKconfig.debug18 Depending on runtime enablement, this results in a small or large
/linux/Documentation/networking/
H A Dsfp-phylink.rst218 (speed, duplex and flow control/pause enablement settings) which
/linux/Documentation/admin-guide/
H A Ddynamic-debug-howto.rst249 On an x86 system for example ACPI enablement is a subsys_initcall and::
/linux/arch/arm/boot/dts/st/
H A Dste-ux500-samsung-gavini.dts380 * GPIO-controlled voltage enablement: this drives
/linux/Documentation/RCU/Design/Memory-Ordering/
H A DTree-RCU-Memory-Ordering.rst213 12 /* Handle nohz enablement switches conservatively. */
/linux/Documentation/ABI/testing/
H A Dsysfs-bus-pci319 determine and control the enablement or disablement of Virtual

12