xref: /linux/drivers/gpu/drm/xe/Kconfig.profile (revision 67f8bc848ee31831336bd478e57d2f993551902e)
1474c4dd2SFrancois Dugast# SPDX-License-Identifier: GPL-2.0-only
2d2776564STejas Upadhyayconfig DRM_XE_JOB_TIMEOUT_MAX
3*5e34374dSRodrigo Vivi	int "Hard upper limit for job timeout (ms)"
4d2776564STejas Upadhyay	default 10000 # milliseconds
5d2776564STejas Upadhyay	help
6*5e34374dSRodrigo Vivi	  Absolute upper bound (in milliseconds) for the per-engine-class job
7*5e34374dSRodrigo Vivi	  timeout. This is the maximum value that can be written to the sysfs
8*5e34374dSRodrigo Vivi	  job_timeout_ms knob, regardless of privileges. To raise this ceiling,
9*5e34374dSRodrigo Vivi	  increase this value and rebuild the kernel.
10d2776564STejas Upadhyayconfig DRM_XE_JOB_TIMEOUT_MIN
11*5e34374dSRodrigo Vivi	int "Hard lower limit for job timeout (ms)"
12d2776564STejas Upadhyay	default 1 # milliseconds
13d2776564STejas Upadhyay	help
14*5e34374dSRodrigo Vivi	  Absolute lower bound (in milliseconds) for the per-engine-class job
15*5e34374dSRodrigo Vivi	  timeout. This is the minimum value that can be written to the sysfs
16*5e34374dSRodrigo Vivi	  job_timeout_ms knob, regardless of privileges.
17*5e34374dSRodrigo Vivi
18*5e34374dSRodrigo Vivi	  Note: the job timeout default (5000 ms) is hardcoded in the driver
19*5e34374dSRodrigo Vivi	  and is not configurable here. Use the sysfs job_timeout_ms knob at
20*5e34374dSRodrigo Vivi	  runtime to change the engine-class default.
21d2776564STejas Upadhyayconfig DRM_XE_TIMESLICE_MAX
22*5e34374dSRodrigo Vivi	int "Hard upper limit for timeslice duration (us)"
23d2776564STejas Upadhyay	default 10000000 # microseconds
24d2776564STejas Upadhyay	help
25*5e34374dSRodrigo Vivi	  Absolute upper bound (in microseconds) for the timeslice duration.
26*5e34374dSRodrigo Vivi	  This caps both the sysfs timeslice_duration_us knob and the value
27*5e34374dSRodrigo Vivi	  accepted via the DRM_XE_EXEC_QUEUE_SET_PROPERTY_TIMESLICE UAPI for
28*5e34374dSRodrigo Vivi	  processes with CAP_SYS_NICE when DRM_XE_ENABLE_SCHEDTIMEOUT_LIMIT
29*5e34374dSRodrigo Vivi	  is enabled.
30d2776564STejas Upadhyayconfig DRM_XE_TIMESLICE_MIN
31*5e34374dSRodrigo Vivi	int "Hard lower limit for timeslice duration (us)"
32d2776564STejas Upadhyay	default 1 # microseconds
33d2776564STejas Upadhyay	help
34*5e34374dSRodrigo Vivi	  Absolute lower bound (in microseconds) for the timeslice duration.
35*5e34374dSRodrigo Vivi	  This caps both the sysfs timeslice_duration_us knob and the value
36*5e34374dSRodrigo Vivi	  accepted via the DRM_XE_EXEC_QUEUE_SET_PROPERTY_TIMESLICE UAPI for
37*5e34374dSRodrigo Vivi	  processes with CAP_SYS_NICE when DRM_XE_ENABLE_SCHEDTIMEOUT_LIMIT
38*5e34374dSRodrigo Vivi	  is enabled.
39a863b416SNiranjana Vishwanathapuraconfig DRM_XE_PREEMPT_TIMEOUT
40*5e34374dSRodrigo Vivi	int "Default preempt timeout (us, jiffy granularity)"
41a863b416SNiranjana Vishwanathapura	default 640000 # microseconds
42a863b416SNiranjana Vishwanathapura	help
43*5e34374dSRodrigo Vivi	  Initial per-engine-class preemption timeout (in microseconds). This
44*5e34374dSRodrigo Vivi	  is the value the driver programs at boot; it can be changed at
45*5e34374dSRodrigo Vivi	  runtime via the sysfs preempt_timeout_us knob.
46*5e34374dSRodrigo Vivi
47*5e34374dSRodrigo Vivi	  This is how long the driver waits for the current context to reach
48*5e34374dSRodrigo Vivi	  an arbitration point and yield the GPU voluntarily when a
49*5e34374dSRodrigo Vivi	  higher-priority context becomes runnable. If the context does not
50*5e34374dSRodrigo Vivi	  yield before the timer expires, the HW is reset to allow the
51*5e34374dSRodrigo Vivi	  higher-priority context to execute.
52*5e34374dSRodrigo Vivi
53*5e34374dSRodrigo Vivi	  The range userspace may write via sysfs is bounded by
54*5e34374dSRodrigo Vivi	  DRM_XE_PREEMPT_TIMEOUT_MIN and DRM_XE_PREEMPT_TIMEOUT_MAX.
55d2776564STejas Upadhyayconfig DRM_XE_PREEMPT_TIMEOUT_MAX
56*5e34374dSRodrigo Vivi	int "Hard upper limit for preempt timeout (us)"
57d2776564STejas Upadhyay	default 10000000 # microseconds
58d2776564STejas Upadhyay	help
59*5e34374dSRodrigo Vivi	  Absolute upper bound (in microseconds) for the per-engine-class
60*5e34374dSRodrigo Vivi	  preemption timeout. This is the maximum value that can be written to
61*5e34374dSRodrigo Vivi	  the sysfs preempt_timeout_us knob, regardless of privileges.
62d2776564STejas Upadhyayconfig DRM_XE_PREEMPT_TIMEOUT_MIN
63*5e34374dSRodrigo Vivi	int "Hard lower limit for preempt timeout (us)"
64d2776564STejas Upadhyay	default 1 # microseconds
65d2776564STejas Upadhyay	help
66*5e34374dSRodrigo Vivi	  Absolute lower bound (in microseconds) for the per-engine-class
67*5e34374dSRodrigo Vivi	  preemption timeout. This is the minimum value that can be written to
68*5e34374dSRodrigo Vivi	  the sysfs preempt_timeout_us knob, regardless of privileges.
69d2776564STejas Upadhyayconfig DRM_XE_ENABLE_SCHEDTIMEOUT_LIMIT
70d2776564STejas Upadhyay	bool "Default configuration of limitation on scheduler timeout"
71d2776564STejas Upadhyay	default y
72d2776564STejas Upadhyay	help
73d2776564STejas Upadhyay	  Configures the enablement of limitation on scheduler timeout
74d2776564STejas Upadhyay	  to apply to applicable user. For elevated user, all above MIN
75d2776564STejas Upadhyay	  and MAX values will apply when this configuration is enable to
76d2776564STejas Upadhyay	  apply limitation. By default limitation is applied.
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