1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. 4 */ 5 6 #include <linux/module.h> 7 #include <linux/of.h> 8 #include <linux/platform_device.h> 9 10 #include "pinctrl-msm.h" 11 12 #define REG_SIZE 0x1000 13 #define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9, f10, f11) \ 14 { \ 15 .grp = PINCTRL_PINGROUP("gpio" #id, \ 16 gpio##id##_pins, \ 17 ARRAY_SIZE(gpio##id##_pins)), \ 18 .funcs = (int[]){ \ 19 msm_mux_gpio, /* gpio mode */ \ 20 msm_mux_##f1, \ 21 msm_mux_##f2, \ 22 msm_mux_##f3, \ 23 msm_mux_##f4, \ 24 msm_mux_##f5, \ 25 msm_mux_##f6, \ 26 msm_mux_##f7, \ 27 msm_mux_##f8, \ 28 msm_mux_##f9, \ 29 msm_mux_##f10, \ 30 msm_mux_##f11 /* egpio mode */ \ 31 }, \ 32 .nfuncs = 12, \ 33 .ctl_reg = REG_SIZE * id, \ 34 .io_reg = 0x4 + REG_SIZE * id, \ 35 .intr_cfg_reg = 0x8 + REG_SIZE * id, \ 36 .intr_status_reg = 0xc + REG_SIZE * id, \ 37 .mux_bit = 2, \ 38 .pull_bit = 0, \ 39 .drv_bit = 6, \ 40 .egpio_enable = 12, \ 41 .egpio_present = 11, \ 42 .oe_bit = 9, \ 43 .in_bit = 0, \ 44 .out_bit = 1, \ 45 .intr_enable_bit = 0, \ 46 .intr_status_bit = 0, \ 47 .intr_wakeup_present_bit = 6, \ 48 .intr_wakeup_enable_bit = 7, \ 49 .intr_target_bit = 8, \ 50 .intr_target_kpss_val = 3, \ 51 .intr_raw_status_bit = 4, \ 52 .intr_polarity_bit = 1, \ 53 .intr_detection_bit = 2, \ 54 .intr_detection_width = 2, \ 55 } 56 57 #define UFS_RESET(pg_name, ctl, io) \ 58 { \ 59 .grp = PINCTRL_PINGROUP(#pg_name, \ 60 pg_name##_pins, \ 61 ARRAY_SIZE(pg_name##_pins)), \ 62 .ctl_reg = ctl, \ 63 .io_reg = io, \ 64 .intr_cfg_reg = 0, \ 65 .intr_status_reg = 0, \ 66 .mux_bit = -1, \ 67 .pull_bit = 3, \ 68 .drv_bit = 0, \ 69 .oe_bit = -1, \ 70 .in_bit = -1, \ 71 .out_bit = 0, \ 72 .intr_enable_bit = -1, \ 73 .intr_status_bit = -1, \ 74 .intr_target_bit = -1, \ 75 .intr_raw_status_bit = -1, \ 76 .intr_polarity_bit = -1, \ 77 .intr_detection_bit = -1, \ 78 .intr_detection_width = -1, \ 79 } 80 81 static const struct pinctrl_pin_desc eliza_pins[] = { 82 PINCTRL_PIN(0, "GPIO_0"), 83 PINCTRL_PIN(1, "GPIO_1"), 84 PINCTRL_PIN(2, "GPIO_2"), 85 PINCTRL_PIN(3, "GPIO_3"), 86 PINCTRL_PIN(4, "GPIO_4"), 87 PINCTRL_PIN(5, "GPIO_5"), 88 PINCTRL_PIN(6, "GPIO_6"), 89 PINCTRL_PIN(7, "GPIO_7"), 90 PINCTRL_PIN(8, "GPIO_8"), 91 PINCTRL_PIN(9, "GPIO_9"), 92 PINCTRL_PIN(10, "GPIO_10"), 93 PINCTRL_PIN(11, "GPIO_11"), 94 PINCTRL_PIN(12, "GPIO_12"), 95 PINCTRL_PIN(13, "GPIO_13"), 96 PINCTRL_PIN(14, "GPIO_14"), 97 PINCTRL_PIN(15, "GPIO_15"), 98 PINCTRL_PIN(16, "GPIO_16"), 99 PINCTRL_PIN(17, "GPIO_17"), 100 PINCTRL_PIN(18, "GPIO_18"), 101 PINCTRL_PIN(19, "GPIO_19"), 102 PINCTRL_PIN(20, "GPIO_20"), 103 PINCTRL_PIN(21, "GPIO_21"), 104 PINCTRL_PIN(22, "GPIO_22"), 105 PINCTRL_PIN(23, "GPIO_23"), 106 PINCTRL_PIN(24, "GPIO_24"), 107 PINCTRL_PIN(25, "GPIO_25"), 108 PINCTRL_PIN(26, "GPIO_26"), 109 PINCTRL_PIN(27, "GPIO_27"), 110 PINCTRL_PIN(28, "GPIO_28"), 111 PINCTRL_PIN(29, "GPIO_29"), 112 PINCTRL_PIN(30, "GPIO_30"), 113 PINCTRL_PIN(31, "GPIO_31"), 114 PINCTRL_PIN(32, "GPIO_32"), 115 PINCTRL_PIN(33, "GPIO_33"), 116 PINCTRL_PIN(34, "GPIO_34"), 117 PINCTRL_PIN(35, "GPIO_35"), 118 PINCTRL_PIN(36, "GPIO_36"), 119 PINCTRL_PIN(37, "GPIO_37"), 120 PINCTRL_PIN(38, "GPIO_38"), 121 PINCTRL_PIN(39, "GPIO_39"), 122 PINCTRL_PIN(40, "GPIO_40"), 123 PINCTRL_PIN(41, "GPIO_41"), 124 PINCTRL_PIN(42, "GPIO_42"), 125 PINCTRL_PIN(43, "GPIO_43"), 126 PINCTRL_PIN(44, "GPIO_44"), 127 PINCTRL_PIN(45, "GPIO_45"), 128 PINCTRL_PIN(46, "GPIO_46"), 129 PINCTRL_PIN(47, "GPIO_47"), 130 PINCTRL_PIN(48, "GPIO_48"), 131 PINCTRL_PIN(49, "GPIO_49"), 132 PINCTRL_PIN(50, "GPIO_50"), 133 PINCTRL_PIN(51, "GPIO_51"), 134 PINCTRL_PIN(52, "GPIO_52"), 135 PINCTRL_PIN(53, "GPIO_53"), 136 PINCTRL_PIN(54, "GPIO_54"), 137 PINCTRL_PIN(55, "GPIO_55"), 138 PINCTRL_PIN(56, "GPIO_56"), 139 PINCTRL_PIN(57, "GPIO_57"), 140 PINCTRL_PIN(58, "GPIO_58"), 141 PINCTRL_PIN(59, "GPIO_59"), 142 PINCTRL_PIN(60, "GPIO_60"), 143 PINCTRL_PIN(61, "GPIO_61"), 144 PINCTRL_PIN(62, "GPIO_62"), 145 PINCTRL_PIN(63, "GPIO_63"), 146 PINCTRL_PIN(64, "GPIO_64"), 147 PINCTRL_PIN(65, "GPIO_65"), 148 PINCTRL_PIN(66, "GPIO_66"), 149 PINCTRL_PIN(67, "GPIO_67"), 150 PINCTRL_PIN(68, "GPIO_68"), 151 PINCTRL_PIN(69, "GPIO_69"), 152 PINCTRL_PIN(70, "GPIO_70"), 153 PINCTRL_PIN(71, "GPIO_71"), 154 PINCTRL_PIN(72, "GPIO_72"), 155 PINCTRL_PIN(73, "GPIO_73"), 156 PINCTRL_PIN(74, "GPIO_74"), 157 PINCTRL_PIN(75, "GPIO_75"), 158 PINCTRL_PIN(76, "GPIO_76"), 159 PINCTRL_PIN(77, "GPIO_77"), 160 PINCTRL_PIN(78, "GPIO_78"), 161 PINCTRL_PIN(79, "GPIO_79"), 162 PINCTRL_PIN(80, "GPIO_80"), 163 PINCTRL_PIN(81, "GPIO_81"), 164 PINCTRL_PIN(82, "GPIO_82"), 165 PINCTRL_PIN(83, "GPIO_83"), 166 PINCTRL_PIN(84, "GPIO_84"), 167 PINCTRL_PIN(85, "GPIO_85"), 168 PINCTRL_PIN(86, "GPIO_86"), 169 PINCTRL_PIN(87, "GPIO_87"), 170 PINCTRL_PIN(88, "GPIO_88"), 171 PINCTRL_PIN(89, "GPIO_89"), 172 PINCTRL_PIN(90, "GPIO_90"), 173 PINCTRL_PIN(91, "GPIO_91"), 174 PINCTRL_PIN(92, "GPIO_92"), 175 PINCTRL_PIN(93, "GPIO_93"), 176 PINCTRL_PIN(94, "GPIO_94"), 177 PINCTRL_PIN(95, "GPIO_95"), 178 PINCTRL_PIN(96, "GPIO_96"), 179 PINCTRL_PIN(97, "GPIO_97"), 180 PINCTRL_PIN(98, "GPIO_98"), 181 PINCTRL_PIN(99, "GPIO_99"), 182 PINCTRL_PIN(100, "GPIO_100"), 183 PINCTRL_PIN(101, "GPIO_101"), 184 PINCTRL_PIN(102, "GPIO_102"), 185 PINCTRL_PIN(103, "GPIO_103"), 186 PINCTRL_PIN(104, "GPIO_104"), 187 PINCTRL_PIN(105, "GPIO_105"), 188 PINCTRL_PIN(106, "GPIO_106"), 189 PINCTRL_PIN(107, "GPIO_107"), 190 PINCTRL_PIN(108, "GPIO_108"), 191 PINCTRL_PIN(109, "GPIO_109"), 192 PINCTRL_PIN(110, "GPIO_110"), 193 PINCTRL_PIN(111, "GPIO_111"), 194 PINCTRL_PIN(112, "GPIO_112"), 195 PINCTRL_PIN(113, "GPIO_113"), 196 PINCTRL_PIN(114, "GPIO_114"), 197 PINCTRL_PIN(115, "GPIO_115"), 198 PINCTRL_PIN(116, "GPIO_116"), 199 PINCTRL_PIN(117, "GPIO_117"), 200 PINCTRL_PIN(118, "GPIO_118"), 201 PINCTRL_PIN(119, "GPIO_119"), 202 PINCTRL_PIN(120, "GPIO_120"), 203 PINCTRL_PIN(121, "GPIO_121"), 204 PINCTRL_PIN(122, "GPIO_122"), 205 PINCTRL_PIN(123, "GPIO_123"), 206 PINCTRL_PIN(124, "GPIO_124"), 207 PINCTRL_PIN(125, "GPIO_125"), 208 PINCTRL_PIN(126, "GPIO_126"), 209 PINCTRL_PIN(127, "GPIO_127"), 210 PINCTRL_PIN(128, "GPIO_128"), 211 PINCTRL_PIN(129, "GPIO_129"), 212 PINCTRL_PIN(130, "GPIO_130"), 213 PINCTRL_PIN(131, "GPIO_131"), 214 PINCTRL_PIN(132, "GPIO_132"), 215 PINCTRL_PIN(133, "GPIO_133"), 216 PINCTRL_PIN(134, "GPIO_134"), 217 PINCTRL_PIN(135, "GPIO_135"), 218 PINCTRL_PIN(136, "GPIO_136"), 219 PINCTRL_PIN(137, "GPIO_137"), 220 PINCTRL_PIN(138, "GPIO_138"), 221 PINCTRL_PIN(139, "GPIO_139"), 222 PINCTRL_PIN(140, "GPIO_140"), 223 PINCTRL_PIN(141, "GPIO_141"), 224 PINCTRL_PIN(142, "GPIO_142"), 225 PINCTRL_PIN(143, "GPIO_143"), 226 PINCTRL_PIN(144, "GPIO_144"), 227 PINCTRL_PIN(145, "GPIO_145"), 228 PINCTRL_PIN(146, "GPIO_146"), 229 PINCTRL_PIN(147, "GPIO_147"), 230 PINCTRL_PIN(148, "GPIO_148"), 231 PINCTRL_PIN(149, "GPIO_149"), 232 PINCTRL_PIN(150, "GPIO_150"), 233 PINCTRL_PIN(151, "GPIO_151"), 234 PINCTRL_PIN(152, "GPIO_152"), 235 PINCTRL_PIN(153, "GPIO_153"), 236 PINCTRL_PIN(154, "GPIO_154"), 237 PINCTRL_PIN(155, "GPIO_155"), 238 PINCTRL_PIN(156, "GPIO_156"), 239 PINCTRL_PIN(157, "GPIO_157"), 240 PINCTRL_PIN(158, "GPIO_158"), 241 PINCTRL_PIN(159, "GPIO_159"), 242 PINCTRL_PIN(160, "GPIO_160"), 243 PINCTRL_PIN(161, "GPIO_161"), 244 PINCTRL_PIN(162, "GPIO_162"), 245 PINCTRL_PIN(163, "GPIO_163"), 246 PINCTRL_PIN(164, "GPIO_164"), 247 PINCTRL_PIN(165, "GPIO_165"), 248 PINCTRL_PIN(166, "GPIO_166"), 249 PINCTRL_PIN(167, "GPIO_167"), 250 PINCTRL_PIN(168, "GPIO_168"), 251 PINCTRL_PIN(169, "GPIO_169"), 252 PINCTRL_PIN(170, "GPIO_170"), 253 PINCTRL_PIN(171, "GPIO_171"), 254 PINCTRL_PIN(172, "GPIO_172"), 255 PINCTRL_PIN(173, "GPIO_173"), 256 PINCTRL_PIN(174, "GPIO_174"), 257 PINCTRL_PIN(175, "GPIO_175"), 258 PINCTRL_PIN(176, "GPIO_176"), 259 PINCTRL_PIN(177, "GPIO_177"), 260 PINCTRL_PIN(178, "GPIO_178"), 261 PINCTRL_PIN(179, "GPIO_179"), 262 PINCTRL_PIN(180, "GPIO_180"), 263 PINCTRL_PIN(181, "GPIO_181"), 264 PINCTRL_PIN(182, "GPIO_182"), 265 PINCTRL_PIN(183, "GPIO_183"), 266 PINCTRL_PIN(184, "GPIO_184"), 267 PINCTRL_PIN(185, "UFS_RESET"), 268 }; 269 270 #define DECLARE_MSM_GPIO_PINS(pin) \ 271 static const unsigned int gpio##pin##_pins[] = { pin } 272 DECLARE_MSM_GPIO_PINS(0); 273 DECLARE_MSM_GPIO_PINS(1); 274 DECLARE_MSM_GPIO_PINS(2); 275 DECLARE_MSM_GPIO_PINS(3); 276 DECLARE_MSM_GPIO_PINS(4); 277 DECLARE_MSM_GPIO_PINS(5); 278 DECLARE_MSM_GPIO_PINS(6); 279 DECLARE_MSM_GPIO_PINS(7); 280 DECLARE_MSM_GPIO_PINS(8); 281 DECLARE_MSM_GPIO_PINS(9); 282 DECLARE_MSM_GPIO_PINS(10); 283 DECLARE_MSM_GPIO_PINS(11); 284 DECLARE_MSM_GPIO_PINS(12); 285 DECLARE_MSM_GPIO_PINS(13); 286 DECLARE_MSM_GPIO_PINS(14); 287 DECLARE_MSM_GPIO_PINS(15); 288 DECLARE_MSM_GPIO_PINS(16); 289 DECLARE_MSM_GPIO_PINS(17); 290 DECLARE_MSM_GPIO_PINS(18); 291 DECLARE_MSM_GPIO_PINS(19); 292 DECLARE_MSM_GPIO_PINS(20); 293 DECLARE_MSM_GPIO_PINS(21); 294 DECLARE_MSM_GPIO_PINS(22); 295 DECLARE_MSM_GPIO_PINS(23); 296 DECLARE_MSM_GPIO_PINS(24); 297 DECLARE_MSM_GPIO_PINS(25); 298 DECLARE_MSM_GPIO_PINS(26); 299 DECLARE_MSM_GPIO_PINS(27); 300 DECLARE_MSM_GPIO_PINS(28); 301 DECLARE_MSM_GPIO_PINS(29); 302 DECLARE_MSM_GPIO_PINS(30); 303 DECLARE_MSM_GPIO_PINS(31); 304 DECLARE_MSM_GPIO_PINS(32); 305 DECLARE_MSM_GPIO_PINS(33); 306 DECLARE_MSM_GPIO_PINS(34); 307 DECLARE_MSM_GPIO_PINS(35); 308 DECLARE_MSM_GPIO_PINS(36); 309 DECLARE_MSM_GPIO_PINS(37); 310 DECLARE_MSM_GPIO_PINS(38); 311 DECLARE_MSM_GPIO_PINS(39); 312 DECLARE_MSM_GPIO_PINS(40); 313 DECLARE_MSM_GPIO_PINS(41); 314 DECLARE_MSM_GPIO_PINS(42); 315 DECLARE_MSM_GPIO_PINS(43); 316 DECLARE_MSM_GPIO_PINS(44); 317 DECLARE_MSM_GPIO_PINS(45); 318 DECLARE_MSM_GPIO_PINS(46); 319 DECLARE_MSM_GPIO_PINS(47); 320 DECLARE_MSM_GPIO_PINS(48); 321 DECLARE_MSM_GPIO_PINS(49); 322 DECLARE_MSM_GPIO_PINS(50); 323 DECLARE_MSM_GPIO_PINS(51); 324 DECLARE_MSM_GPIO_PINS(52); 325 DECLARE_MSM_GPIO_PINS(53); 326 DECLARE_MSM_GPIO_PINS(54); 327 DECLARE_MSM_GPIO_PINS(55); 328 DECLARE_MSM_GPIO_PINS(56); 329 DECLARE_MSM_GPIO_PINS(57); 330 DECLARE_MSM_GPIO_PINS(58); 331 DECLARE_MSM_GPIO_PINS(59); 332 DECLARE_MSM_GPIO_PINS(60); 333 DECLARE_MSM_GPIO_PINS(61); 334 DECLARE_MSM_GPIO_PINS(62); 335 DECLARE_MSM_GPIO_PINS(63); 336 DECLARE_MSM_GPIO_PINS(64); 337 DECLARE_MSM_GPIO_PINS(65); 338 DECLARE_MSM_GPIO_PINS(66); 339 DECLARE_MSM_GPIO_PINS(67); 340 DECLARE_MSM_GPIO_PINS(68); 341 DECLARE_MSM_GPIO_PINS(69); 342 DECLARE_MSM_GPIO_PINS(70); 343 DECLARE_MSM_GPIO_PINS(71); 344 DECLARE_MSM_GPIO_PINS(72); 345 DECLARE_MSM_GPIO_PINS(73); 346 DECLARE_MSM_GPIO_PINS(74); 347 DECLARE_MSM_GPIO_PINS(75); 348 DECLARE_MSM_GPIO_PINS(76); 349 DECLARE_MSM_GPIO_PINS(77); 350 DECLARE_MSM_GPIO_PINS(78); 351 DECLARE_MSM_GPIO_PINS(79); 352 DECLARE_MSM_GPIO_PINS(80); 353 DECLARE_MSM_GPIO_PINS(81); 354 DECLARE_MSM_GPIO_PINS(82); 355 DECLARE_MSM_GPIO_PINS(83); 356 DECLARE_MSM_GPIO_PINS(84); 357 DECLARE_MSM_GPIO_PINS(85); 358 DECLARE_MSM_GPIO_PINS(86); 359 DECLARE_MSM_GPIO_PINS(87); 360 DECLARE_MSM_GPIO_PINS(88); 361 DECLARE_MSM_GPIO_PINS(89); 362 DECLARE_MSM_GPIO_PINS(90); 363 DECLARE_MSM_GPIO_PINS(91); 364 DECLARE_MSM_GPIO_PINS(92); 365 DECLARE_MSM_GPIO_PINS(93); 366 DECLARE_MSM_GPIO_PINS(94); 367 DECLARE_MSM_GPIO_PINS(95); 368 DECLARE_MSM_GPIO_PINS(96); 369 DECLARE_MSM_GPIO_PINS(97); 370 DECLARE_MSM_GPIO_PINS(98); 371 DECLARE_MSM_GPIO_PINS(99); 372 DECLARE_MSM_GPIO_PINS(100); 373 DECLARE_MSM_GPIO_PINS(101); 374 DECLARE_MSM_GPIO_PINS(102); 375 DECLARE_MSM_GPIO_PINS(103); 376 DECLARE_MSM_GPIO_PINS(104); 377 DECLARE_MSM_GPIO_PINS(105); 378 DECLARE_MSM_GPIO_PINS(106); 379 DECLARE_MSM_GPIO_PINS(107); 380 DECLARE_MSM_GPIO_PINS(108); 381 DECLARE_MSM_GPIO_PINS(109); 382 DECLARE_MSM_GPIO_PINS(110); 383 DECLARE_MSM_GPIO_PINS(111); 384 DECLARE_MSM_GPIO_PINS(112); 385 DECLARE_MSM_GPIO_PINS(113); 386 DECLARE_MSM_GPIO_PINS(114); 387 DECLARE_MSM_GPIO_PINS(115); 388 DECLARE_MSM_GPIO_PINS(116); 389 DECLARE_MSM_GPIO_PINS(117); 390 DECLARE_MSM_GPIO_PINS(118); 391 DECLARE_MSM_GPIO_PINS(119); 392 DECLARE_MSM_GPIO_PINS(120); 393 DECLARE_MSM_GPIO_PINS(121); 394 DECLARE_MSM_GPIO_PINS(122); 395 DECLARE_MSM_GPIO_PINS(123); 396 DECLARE_MSM_GPIO_PINS(124); 397 DECLARE_MSM_GPIO_PINS(125); 398 DECLARE_MSM_GPIO_PINS(126); 399 DECLARE_MSM_GPIO_PINS(127); 400 DECLARE_MSM_GPIO_PINS(128); 401 DECLARE_MSM_GPIO_PINS(129); 402 DECLARE_MSM_GPIO_PINS(130); 403 DECLARE_MSM_GPIO_PINS(131); 404 DECLARE_MSM_GPIO_PINS(132); 405 DECLARE_MSM_GPIO_PINS(133); 406 DECLARE_MSM_GPIO_PINS(134); 407 DECLARE_MSM_GPIO_PINS(135); 408 DECLARE_MSM_GPIO_PINS(136); 409 DECLARE_MSM_GPIO_PINS(137); 410 DECLARE_MSM_GPIO_PINS(138); 411 DECLARE_MSM_GPIO_PINS(139); 412 DECLARE_MSM_GPIO_PINS(140); 413 DECLARE_MSM_GPIO_PINS(141); 414 DECLARE_MSM_GPIO_PINS(142); 415 DECLARE_MSM_GPIO_PINS(143); 416 DECLARE_MSM_GPIO_PINS(144); 417 DECLARE_MSM_GPIO_PINS(145); 418 DECLARE_MSM_GPIO_PINS(146); 419 DECLARE_MSM_GPIO_PINS(147); 420 DECLARE_MSM_GPIO_PINS(148); 421 DECLARE_MSM_GPIO_PINS(149); 422 DECLARE_MSM_GPIO_PINS(150); 423 DECLARE_MSM_GPIO_PINS(151); 424 DECLARE_MSM_GPIO_PINS(152); 425 DECLARE_MSM_GPIO_PINS(153); 426 DECLARE_MSM_GPIO_PINS(154); 427 DECLARE_MSM_GPIO_PINS(155); 428 DECLARE_MSM_GPIO_PINS(156); 429 DECLARE_MSM_GPIO_PINS(157); 430 DECLARE_MSM_GPIO_PINS(158); 431 DECLARE_MSM_GPIO_PINS(159); 432 DECLARE_MSM_GPIO_PINS(160); 433 DECLARE_MSM_GPIO_PINS(161); 434 DECLARE_MSM_GPIO_PINS(162); 435 DECLARE_MSM_GPIO_PINS(163); 436 DECLARE_MSM_GPIO_PINS(164); 437 DECLARE_MSM_GPIO_PINS(165); 438 DECLARE_MSM_GPIO_PINS(166); 439 DECLARE_MSM_GPIO_PINS(167); 440 DECLARE_MSM_GPIO_PINS(168); 441 DECLARE_MSM_GPIO_PINS(169); 442 DECLARE_MSM_GPIO_PINS(170); 443 DECLARE_MSM_GPIO_PINS(171); 444 DECLARE_MSM_GPIO_PINS(172); 445 DECLARE_MSM_GPIO_PINS(173); 446 DECLARE_MSM_GPIO_PINS(174); 447 DECLARE_MSM_GPIO_PINS(175); 448 DECLARE_MSM_GPIO_PINS(176); 449 DECLARE_MSM_GPIO_PINS(177); 450 DECLARE_MSM_GPIO_PINS(178); 451 DECLARE_MSM_GPIO_PINS(179); 452 DECLARE_MSM_GPIO_PINS(180); 453 DECLARE_MSM_GPIO_PINS(181); 454 DECLARE_MSM_GPIO_PINS(182); 455 DECLARE_MSM_GPIO_PINS(183); 456 DECLARE_MSM_GPIO_PINS(184); 457 458 static const unsigned int ufs_reset_pins[] = { 185 }; 459 460 enum eliza_functions { 461 msm_mux_gpio, 462 msm_mux_aoss_cti, 463 msm_mux_atest_char, 464 msm_mux_atest_usb, 465 msm_mux_audio_ext_mclk0, 466 msm_mux_audio_ref_clk, 467 msm_mux_cam_mclk, 468 msm_mux_cci_async_in, 469 msm_mux_cci_i2c_scl, 470 msm_mux_cci_i2c_sda, 471 msm_mux_cci_timer, 472 msm_mux_coex_uart1_rx, 473 msm_mux_coex_uart1_tx, 474 msm_mux_coex_uart2_rx, 475 msm_mux_coex_uart2_tx, 476 msm_mux_dbg_out_clk, 477 msm_mux_ddr_bist_complete, 478 msm_mux_ddr_bist_fail, 479 msm_mux_ddr_bist_start, 480 msm_mux_ddr_bist_stop, 481 msm_mux_ddr_pxi0, 482 msm_mux_ddr_pxi1, 483 msm_mux_dp0_hot, 484 msm_mux_egpio, 485 msm_mux_gcc_gp1, 486 msm_mux_gcc_gp2, 487 msm_mux_gcc_gp3, 488 msm_mux_gnss_adc0, 489 msm_mux_gnss_adc1, 490 msm_mux_hdmi_ddc_scl, 491 msm_mux_hdmi_ddc_sda, 492 msm_mux_hdmi_dtest0, 493 msm_mux_hdmi_dtest1, 494 msm_mux_hdmi_hot_plug, 495 msm_mux_hdmi_pixel_clk, 496 msm_mux_hdmi_rcv_det, 497 msm_mux_hdmi_tx_cec, 498 msm_mux_host2wlan_sol, 499 msm_mux_i2s0_data0, 500 msm_mux_i2s0_data1, 501 msm_mux_i2s0_sck, 502 msm_mux_i2s0_ws, 503 msm_mux_ibi_i3c, 504 msm_mux_jitter_bist, 505 msm_mux_mdp_esync0_out, 506 msm_mux_mdp_esync1_out, 507 msm_mux_mdp_vsync, 508 msm_mux_mdp_vsync0_out, 509 msm_mux_mdp_vsync11_out, 510 msm_mux_mdp_vsync1_out, 511 msm_mux_mdp_vsync2_out, 512 msm_mux_mdp_vsync3_out, 513 msm_mux_mdp_vsync_e, 514 msm_mux_nav_gpio0, 515 msm_mux_nav_gpio1, 516 msm_mux_nav_gpio2, 517 msm_mux_nav_gpio3, 518 msm_mux_pcie0_clk_req_n, 519 msm_mux_pcie1_clk_req_n, 520 msm_mux_phase_flag, 521 msm_mux_pll_bist_sync, 522 msm_mux_pll_clk_aux, 523 msm_mux_prng_rosc0, 524 msm_mux_prng_rosc1, 525 msm_mux_prng_rosc2, 526 msm_mux_prng_rosc3, 527 msm_mux_qdss_cti, 528 msm_mux_qdss_gpio_traceclk, 529 msm_mux_qdss_gpio_tracectl, 530 msm_mux_qdss_gpio_tracedata, 531 msm_mux_qlink_big_enable, 532 msm_mux_qlink_big_request, 533 msm_mux_qlink_little_enable, 534 msm_mux_qlink_little_request, 535 msm_mux_qlink_wmss, 536 msm_mux_qspi0, 537 msm_mux_qspi_clk, 538 msm_mux_qspi_cs, 539 msm_mux_qup1_se0, 540 msm_mux_qup1_se1, 541 msm_mux_qup1_se2, 542 msm_mux_qup1_se2_l2_mira, 543 msm_mux_qup1_se2_l2_mirb, 544 msm_mux_qup1_se2_l3_mira, 545 msm_mux_qup1_se2_l3_mirb, 546 msm_mux_qup1_se3, 547 msm_mux_qup1_se4_01, 548 msm_mux_qup1_se4_23, 549 msm_mux_qup1_se5, 550 msm_mux_qup1_se6, 551 msm_mux_qup1_se6_l1_mira, 552 msm_mux_qup1_se6_l1_mirb, 553 msm_mux_qup1_se6_l3_mira, 554 msm_mux_qup1_se6_l3_mirb, 555 msm_mux_qup1_se7, 556 msm_mux_qup1_se7_l0_mira, 557 msm_mux_qup1_se7_l0_mirb, 558 msm_mux_qup1_se7_l1_mira, 559 msm_mux_qup1_se7_l1_mirb, 560 msm_mux_qup2_se0, 561 msm_mux_qup2_se1, 562 msm_mux_qup2_se2, 563 msm_mux_qup2_se3, 564 msm_mux_qup2_se3_l0_mira, 565 msm_mux_qup2_se3_l0_mirb, 566 msm_mux_qup2_se3_l1_mira, 567 msm_mux_qup2_se3_l1_mirb, 568 msm_mux_qup2_se4, 569 msm_mux_qup2_se5, 570 msm_mux_qup2_se6, 571 msm_mux_qup2_se7, 572 msm_mux_resout_gpio, 573 msm_mux_sd_write_protect, 574 msm_mux_sdc1, 575 msm_mux_sdc2, 576 msm_mux_sdc2_fb_clk, 577 msm_mux_tb_trig_sdc1, 578 msm_mux_tb_trig_sdc2, 579 msm_mux_tmess_prng0, 580 msm_mux_tmess_prng1, 581 msm_mux_tmess_prng2, 582 msm_mux_tmess_prng3, 583 msm_mux_tsense_pwm1, 584 msm_mux_tsense_pwm2, 585 msm_mux_tsense_pwm3, 586 msm_mux_tsense_pwm4, 587 msm_mux_uim0_clk, 588 msm_mux_uim0_data, 589 msm_mux_uim0_present, 590 msm_mux_uim0_reset, 591 msm_mux_uim1_clk, 592 msm_mux_uim1_data, 593 msm_mux_uim1_present, 594 msm_mux_uim1_reset, 595 msm_mux_usb0_hs, 596 msm_mux_usb_phy, 597 msm_mux_vfr_0, 598 msm_mux_vfr_1, 599 msm_mux_vsense_trigger_mirnat, 600 msm_mux_wcn_sw_ctrl, 601 msm_mux__, 602 }; 603 604 static const char *const gpio_groups[] = { 605 "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", 606 "gpio6", "gpio7", "gpio8", "gpio9", "gpio10", "gpio11", 607 "gpio12", "gpio13", "gpio16", "gpio17", "gpio18", "gpio19", 608 "gpio20", "gpio21", "gpio22", "gpio23", "gpio26", "gpio27", 609 "gpio28", "gpio29", "gpio30", "gpio31", "gpio32", "gpio33", 610 "gpio34", "gpio35", "gpio36", "gpio37", "gpio38", "gpio39", 611 "gpio40", "gpio42", "gpio44", "gpio45", "gpio46", "gpio47", 612 "gpio48", "gpio49", "gpio50", "gpio51", "gpio52", "gpio53", 613 "gpio54", "gpio55", "gpio56", "gpio57", "gpio58", "gpio59", 614 "gpio60", "gpio61", "gpio62", "gpio63", "gpio64", "gpio65", 615 "gpio66", "gpio67", "gpio68", "gpio69", "gpio70", "gpio71", 616 "gpio72", "gpio73", "gpio74", "gpio75", "gpio76", "gpio77", 617 "gpio78", "gpio79", "gpio80", "gpio81", "gpio82", "gpio84", 618 "gpio85", "gpio86", "gpio87", "gpio88", "gpio89", "gpio90", 619 "gpio91", "gpio92", "gpio93", "gpio94", "gpio95", "gpio96", 620 "gpio97", "gpio98", "gpio99", "gpio100", "gpio101", "gpio102", 621 "gpio103", "gpio104", "gpio105", "gpio106", "gpio107", "gpio108", 622 "gpio109", "gpio110", "gpio111", "gpio112", "gpio113", "gpio114", 623 "gpio115", "gpio116", "gpio117", "gpio118", "gpio119", "gpio120", 624 "gpio121", "gpio122", "gpio123", "gpio124", "gpio125", "gpio126", 625 "gpio127", "gpio128", "gpio129", "gpio130", "gpio131", "gpio132", 626 "gpio133", "gpio134", "gpio135", "gpio138", "gpio139", "gpio140", 627 "gpio141", "gpio142", "gpio143", "gpio144", "gpio145", "gpio146", 628 "gpio147", "gpio148", "gpio149", "gpio150", "gpio151", "gpio152", 629 "gpio153", "gpio154", "gpio155", "gpio156", "gpio157", "gpio158", 630 "gpio159", "gpio160", "gpio161", "gpio162", "gpio163", "gpio164", 631 "gpio165", "gpio166", "gpio167", "gpio168", "gpio169", "gpio170", 632 "gpio171", "gpio172", "gpio173", "gpio174", "gpio175", "gpio176", 633 "gpio177", "gpio178", "gpio179", "gpio180", "gpio181", "gpio182", 634 "gpio184", 635 }; 636 637 static const char *const aoss_cti_groups[] = { 638 "gpio0", "gpio1", "gpio26", "gpio27", 639 }; 640 641 static const char *const atest_char_groups[] = { 642 "gpio71", "gpio70", "gpio72", "gpio74", "gpio73", 643 }; 644 645 static const char *const atest_usb_groups[] = { 646 "gpio55", "gpio54", 647 }; 648 649 static const char *const audio_ext_mclk0_groups[] = { 650 "gpio69", 651 }; 652 653 static const char *const audio_ref_clk_groups[] = { 654 "gpio32", 655 }; 656 657 static const char *const cam_mclk_groups[] = { 658 "gpio65", "gpio66", "gpio67", "gpio68", "gpio69", 659 }; 660 661 static const char *const cci_async_in_groups[] = { 662 "gpio115", "gpio31", "gpio30", 663 }; 664 665 static const char *const cci_i2c_scl_groups[] = { 666 "gpio71", "gpio73", "gpio75", "gpio77", 667 }; 668 669 static const char *const cci_i2c_sda_groups[] = { 670 "gpio70", "gpio72", "gpio74", "gpio76", 671 }; 672 673 static const char *const cci_timer_groups[] = { 674 "gpio76", "gpio63", "gpio125", "gpio126", "gpio127", 675 }; 676 677 static const char *const coex_uart1_rx_groups[] = { 678 "gpio112", 679 }; 680 681 static const char *const coex_uart1_tx_groups[] = { 682 "gpio111", 683 }; 684 685 static const char *const coex_uart2_rx_groups[] = { 686 "gpio116", 687 }; 688 689 static const char *const coex_uart2_tx_groups[] = { 690 "gpio100", 691 }; 692 693 static const char *const dbg_out_clk_groups[] = { 694 "gpio81", 695 }; 696 697 static const char *const ddr_bist_complete_groups[] = { 698 "gpio52", 699 }; 700 701 static const char *const ddr_bist_fail_groups[] = { 702 "gpio147", 703 }; 704 705 static const char *const ddr_bist_start_groups[] = { 706 "gpio34", 707 }; 708 709 static const char *const ddr_bist_stop_groups[] = { 710 "gpio53", 711 }; 712 713 static const char *const ddr_pxi0_groups[] = { 714 "gpio54", "gpio55", 715 }; 716 717 static const char *const ddr_pxi1_groups[] = { 718 "gpio40", "gpio42", 719 }; 720 721 static const char *const dp0_hot_groups[] = { 722 "gpio55", 723 }; 724 725 static const char *const egpio_groups[] = { 726 "gpio28", "gpio29", "gpio30", "gpio31", "gpio138", "gpio139", 727 "gpio140", "gpio141", "gpio142", "gpio143", "gpio144", "gpio145", 728 "gpio146", "gpio147", "gpio148", "gpio149", "gpio150", "gpio151", 729 "gpio152", "gpio153", "gpio154", "gpio155", "gpio156", "gpio157", 730 "gpio158", "gpio159", "gpio160", "gpio161", "gpio162", "gpio163", 731 "gpio164", "gpio165", "gpio166", "gpio167", "gpio168", "gpio169", 732 "gpio170", "gpio171", "gpio172", "gpio173", "gpio174", "gpio175", 733 "gpio176", "gpio177", "gpio178", "gpio179", "gpio180", "gpio181", 734 "gpio182", "gpio184", 735 }; 736 737 static const char *const gcc_gp1_groups[] = { 738 "gpio27", "gpio53", 739 }; 740 741 static const char *const gcc_gp2_groups[] = { 742 "gpio32", "gpio35", 743 }; 744 745 static const char *const gcc_gp3_groups[] = { 746 "gpio30", "gpio33", 747 }; 748 749 static const char *const gnss_adc0_groups[] = { 750 "gpio42", "gpio55", 751 }; 752 753 static const char *const gnss_adc1_groups[] = { 754 "gpio40", "gpio54", 755 }; 756 757 static const char *const hdmi_ddc_scl_groups[] = { 758 "gpio6", 759 }; 760 761 static const char *const hdmi_ddc_sda_groups[] = { 762 "gpio7", 763 }; 764 765 static const char *const hdmi_dtest0_groups[] = { 766 "gpio132", 767 }; 768 769 static const char *const hdmi_dtest1_groups[] = { 770 "gpio133", 771 }; 772 773 static const char *const hdmi_hot_plug_groups[] = { 774 "gpio47", 775 }; 776 777 static const char *const hdmi_pixel_clk_groups[] = { 778 "gpio18", 779 }; 780 781 static const char *const hdmi_rcv_det_groups[] = { 782 "gpio19", 783 }; 784 785 static const char *const hdmi_tx_cec_groups[] = { 786 "gpio46", 787 }; 788 789 static const char *const host2wlan_sol_groups[] = { 790 "gpio33", 791 }; 792 793 static const char *const i2s0_data0_groups[] = { 794 "gpio64", 795 }; 796 797 static const char *const i2s0_data1_groups[] = { 798 "gpio63", 799 }; 800 801 static const char *const i2s0_sck_groups[] = { 802 "gpio60", 803 }; 804 805 static const char *const i2s0_ws_groups[] = { 806 "gpio61", 807 }; 808 809 static const char *const ibi_i3c_groups[] = { 810 "gpio0", "gpio1", "gpio4", "gpio5", "gpio12", "gpio13", 811 "gpio28", "gpio29", "gpio32", "gpio33", "gpio36", "gpio37", 812 }; 813 814 static const char *const jitter_bist_groups[] = { 815 "gpio77", 816 }; 817 818 static const char *const mdp_esync0_out_groups[] = { 819 "gpio13", 820 }; 821 822 static const char *const mdp_esync1_out_groups[] = { 823 "gpio12", 824 }; 825 826 static const char *const mdp_vsync_groups[] = { 827 "gpio16", "gpio17", "gpio79", "gpio100", "gpio120", "gpio121", 828 }; 829 830 static const char *const mdp_vsync0_out_groups[] = { 831 "gpio17", 832 }; 833 834 static const char *const mdp_vsync11_out_groups[] = { 835 "gpio27", 836 }; 837 838 static const char *const mdp_vsync1_out_groups[] = { 839 "gpio17", 840 }; 841 842 static const char *const mdp_vsync2_out_groups[] = { 843 "gpio16", 844 }; 845 846 static const char *const mdp_vsync3_out_groups[] = { 847 "gpio16", 848 }; 849 850 static const char *const mdp_vsync_e_groups[] = { 851 "gpio13", 852 }; 853 854 static const char *const nav_gpio0_groups[] = { 855 "gpio119", 856 }; 857 858 static const char *const nav_gpio1_groups[] = { 859 "gpio117", 860 }; 861 862 static const char *const nav_gpio2_groups[] = { 863 "gpio118", 864 }; 865 866 static const char *const nav_gpio3_groups[] = { 867 "gpio113", 868 }; 869 870 static const char *const pcie0_clk_req_n_groups[] = { 871 "gpio80", 872 }; 873 874 static const char *const pcie1_clk_req_n_groups[] = { 875 "gpio52", 876 }; 877 878 static const char *const phase_flag_groups[] = { 879 "gpio71", "gpio70", "gpio174", "gpio175", "gpio172", "gpio171", 880 "gpio170", "gpio169", "gpio168", "gpio167", "gpio166", "gpio165", 881 "gpio182", "gpio164", "gpio163", "gpio162", "gpio161", "gpio160", 882 "gpio159", "gpio158", "gpio157", "gpio80", "gpio78", "gpio181", 883 "gpio76", "gpio75", "gpio180", "gpio179", "gpio178", "gpio177", 884 "gpio176", "gpio173", 885 }; 886 887 static const char *const pll_bist_sync_groups[] = { 888 "gpio184", 889 }; 890 891 static const char *const pll_clk_aux_groups[] = { 892 "gpio135", 893 }; 894 895 static const char *const prng_rosc0_groups[] = { 896 "gpio67", 897 }; 898 899 static const char *const prng_rosc1_groups[] = { 900 "gpio69", 901 }; 902 903 static const char *const prng_rosc2_groups[] = { 904 "gpio76", 905 }; 906 907 static const char *const prng_rosc3_groups[] = { 908 "gpio74", 909 }; 910 911 static const char *const qdss_cti_groups[] = { 912 "gpio18", "gpio19", "gpio32", "gpio73", 913 "gpio74", "gpio154", "gpio176", "gpio184", 914 }; 915 916 static const char *const qdss_gpio_traceclk_groups[] = { 917 "gpio54", "gpio147", 918 }; 919 920 static const char *const qdss_gpio_tracectl_groups[] = { 921 "gpio72", "gpio144", 922 }; 923 924 static const char *const qdss_gpio_tracedata_groups[] = { 925 "gpio30", "gpio31", "gpio34", "gpio35", "gpio40", "gpio42", 926 "gpio52", "gpio53", "gpio65", "gpio66", "gpio67", "gpio114", 927 "gpio132", "gpio133", "gpio134", "gpio135", "gpio145", "gpio146", 928 "gpio155", "gpio156", "gpio163", "gpio164", "gpio167", "gpio168", 929 "gpio169", "gpio170", "gpio178", "gpio179", "gpio180", "gpio181", 930 "gpio182", 931 }; 932 933 static const char *const qlink_big_enable_groups[] = { 934 "gpio96", 935 }; 936 937 static const char *const qlink_big_request_groups[] = { 938 "gpio95", 939 }; 940 941 static const char *const qlink_little_enable_groups[] = { 942 "gpio93", 943 }; 944 945 static const char *const qlink_little_request_groups[] = { 946 "gpio92", 947 }; 948 949 static const char *const qlink_wmss_groups[] = { 950 "gpio94", 951 }; 952 953 static const char *const qspi0_groups[] = { 954 "gpio79", "gpio116", "gpio115", "gpio97", "gpio98", 955 }; 956 957 static const char *const qspi_clk_groups[] = { 958 "gpio99", 959 }; 960 961 static const char *const qspi_cs_groups[] = { 962 "gpio100", 963 }; 964 965 static const char *const qup1_se0_groups[] = { 966 "gpio28", "gpio29", "gpio30", "gpio31", 967 }; 968 969 static const char *const qup1_se1_groups[] = { 970 "gpio32", "gpio33", "gpio34", "gpio35", 971 }; 972 973 static const char *const qup1_se2_groups[] = { 974 "gpio52", "gpio53", "gpio40", "gpio42", "gpio30", 975 }; 976 977 static const char *const qup1_se2_l2_mira_groups[] = { 978 "gpio54", 979 }; 980 981 static const char *const qup1_se2_l2_mirb_groups[] = { 982 "gpio52", 983 }; 984 985 static const char *const qup1_se2_l3_mira_groups[] = { 986 "gpio55", 987 }; 988 989 static const char *const qup1_se2_l3_mirb_groups[] = { 990 "gpio53", 991 }; 992 993 static const char *const qup1_se3_groups[] = { 994 "gpio44", "gpio45", "gpio46", "gpio47", 995 }; 996 997 static const char *const qup1_se4_01_groups[] = { 998 "gpio36", "gpio37", 999 }; 1000 1001 static const char *const qup1_se4_23_groups[] = { 1002 "gpio36", "gpio37", 1003 }; 1004 1005 static const char *const qup1_se5_groups[] = { 1006 "gpio132", "gpio133", "gpio134", "gpio135", "gpio34", "gpio35", 1007 }; 1008 1009 static const char *const qup1_se6_groups[] = { 1010 "gpio40", "gpio42", 1011 }; 1012 1013 static const char *const qup1_se6_l1_mira_groups[] = { 1014 "gpio42", 1015 }; 1016 1017 static const char *const qup1_se6_l1_mirb_groups[] = { 1018 "gpio54", 1019 }; 1020 1021 static const char *const qup1_se6_l3_mira_groups[] = { 1022 "gpio40", 1023 }; 1024 1025 static const char *const qup1_se6_l3_mirb_groups[] = { 1026 "gpio55", 1027 }; 1028 1029 static const char *const qup1_se7_groups[] = { 1030 "gpio78", "gpio114", 1031 }; 1032 1033 static const char *const qup1_se7_l0_mira_groups[] = { 1034 "gpio81", 1035 }; 1036 1037 static const char *const qup1_se7_l0_mirb_groups[] = { 1038 "gpio78", 1039 }; 1040 1041 static const char *const qup1_se7_l1_mira_groups[] = { 1042 "gpio80", 1043 }; 1044 1045 static const char *const qup1_se7_l1_mirb_groups[] = { 1046 "gpio114", 1047 }; 1048 1049 static const char *const qup2_se0_groups[] = { 1050 "gpio0", "gpio1", "gpio2", "gpio3", 1051 }; 1052 1053 static const char *const qup2_se1_groups[] = { 1054 "gpio4", "gpio5", "gpio6", "gpio7", 1055 }; 1056 1057 static const char *const qup2_se2_groups[] = { 1058 "gpio8", "gpio9", "gpio10", "gpio11", "gpio16", "gpio17", "gpio18", 1059 }; 1060 1061 static const char *const qup2_se3_groups[] = { 1062 "gpio100", "gpio116", 1063 }; 1064 1065 static const char *const qup2_se3_l0_mira_groups[] = { 1066 "gpio79", 1067 }; 1068 1069 static const char *const qup2_se3_l0_mirb_groups[] = { 1070 "gpio116", 1071 }; 1072 1073 static const char *const qup2_se3_l1_mira_groups[] = { 1074 "gpio97", 1075 }; 1076 1077 static const char *const qup2_se3_l1_mirb_groups[] = { 1078 "gpio100", 1079 }; 1080 1081 static const char *const qup2_se4_groups[] = { 1082 "gpio12", "gpio13", "gpio26", "gpio27", 1083 }; 1084 1085 static const char *const qup2_se5_groups[] = { 1086 "gpio16", "gpio17", "gpio18", "gpio19", 1087 }; 1088 1089 static const char *const qup2_se6_groups[] = { 1090 "gpio20", "gpio21", "gpio22", "gpio23", 1091 }; 1092 1093 static const char *const qup2_se7_groups[] = { 1094 "gpio27", "gpio26", "gpio13", "gpio12", 1095 }; 1096 1097 static const char *const resout_gpio_groups[] = { 1098 "gpio63", 1099 "gpio69", 1100 "gpio175", 1101 }; 1102 1103 static const char *const sd_write_protect_groups[] = { 1104 "gpio57", 1105 }; 1106 1107 static const char *const sdc1_groups[] = { 1108 "gpio121", "gpio123", "gpio124", "gpio125", 1109 "gpio126", "gpio127", "gpio128", "gpio129", 1110 "gpio130", "gpio131", "gpio120", 1111 }; 1112 1113 static const char *const sdc2_groups[] = { 1114 "gpio38", "gpio39", "gpio48", "gpio49", 1115 "gpio51", "gpio62", 1116 }; 1117 1118 static const char *const sdc2_fb_clk_groups[] = { 1119 "gpio50", 1120 }; 1121 1122 static const char *const tb_trig_sdc1_groups[] = { 1123 "gpio34", 1124 }; 1125 1126 static const char *const tb_trig_sdc2_groups[] = { 1127 "gpio35", 1128 }; 1129 1130 static const char *const tmess_prng0_groups[] = { 1131 "gpio73", 1132 }; 1133 1134 static const char *const tmess_prng1_groups[] = { 1135 "gpio72", 1136 }; 1137 1138 static const char *const tmess_prng2_groups[] = { 1139 "gpio70", 1140 }; 1141 1142 static const char *const tmess_prng3_groups[] = { 1143 "gpio71", 1144 }; 1145 1146 static const char *const tsense_pwm1_groups[] = { 1147 "gpio56", 1148 }; 1149 1150 static const char *const tsense_pwm2_groups[] = { 1151 "gpio56", 1152 }; 1153 1154 static const char *const tsense_pwm3_groups[] = { 1155 "gpio56", 1156 }; 1157 1158 static const char *const tsense_pwm4_groups[] = { 1159 "gpio56", 1160 }; 1161 1162 static const char *const uim0_clk_groups[] = { 1163 "gpio85", 1164 }; 1165 1166 static const char *const uim0_data_groups[] = { 1167 "gpio84", 1168 }; 1169 1170 static const char *const uim0_present_groups[] = { 1171 "gpio87", 1172 }; 1173 1174 static const char *const uim0_reset_groups[] = { 1175 "gpio86", 1176 }; 1177 1178 static const char *const uim1_clk_groups[] = { 1179 "gpio98", "gpio89", 1180 }; 1181 1182 static const char *const uim1_data_groups[] = { 1183 "gpio97", "gpio88", 1184 }; 1185 1186 static const char *const uim1_present_groups[] = { 1187 "gpio100", "gpio91", 1188 }; 1189 1190 static const char *const uim1_reset_groups[] = { 1191 "gpio99", "gpio90", 1192 }; 1193 1194 static const char *const usb0_hs_groups[] = { 1195 "gpio56", 1196 }; 1197 1198 static const char *const usb_phy_groups[] = { 1199 "gpio122", 1200 }; 1201 1202 static const char *const vfr_0_groups[] = { 1203 "gpio63", 1204 }; 1205 1206 static const char *const vfr_1_groups[] = { 1207 "gpio117", 1208 }; 1209 1210 static const char *const vsense_trigger_mirnat_groups[] = { 1211 "gpio52", 1212 }; 1213 1214 static const char *const wcn_sw_ctrl_groups[] = { 1215 "gpio81", 1216 }; 1217 1218 static const struct pinfunction eliza_functions[] = { 1219 MSM_GPIO_PIN_FUNCTION(gpio), 1220 MSM_PIN_FUNCTION(aoss_cti), 1221 MSM_PIN_FUNCTION(atest_char), 1222 MSM_PIN_FUNCTION(atest_usb), 1223 MSM_PIN_FUNCTION(audio_ext_mclk0), 1224 MSM_PIN_FUNCTION(audio_ref_clk), 1225 MSM_PIN_FUNCTION(cam_mclk), 1226 MSM_PIN_FUNCTION(cci_async_in), 1227 MSM_PIN_FUNCTION(cci_i2c_scl), 1228 MSM_PIN_FUNCTION(cci_i2c_sda), 1229 MSM_PIN_FUNCTION(cci_timer), 1230 MSM_PIN_FUNCTION(coex_uart1_rx), 1231 MSM_PIN_FUNCTION(coex_uart1_tx), 1232 MSM_PIN_FUNCTION(coex_uart2_rx), 1233 MSM_PIN_FUNCTION(coex_uart2_tx), 1234 MSM_PIN_FUNCTION(dbg_out_clk), 1235 MSM_PIN_FUNCTION(ddr_bist_complete), 1236 MSM_PIN_FUNCTION(ddr_bist_fail), 1237 MSM_PIN_FUNCTION(ddr_bist_start), 1238 MSM_PIN_FUNCTION(ddr_bist_stop), 1239 MSM_PIN_FUNCTION(ddr_pxi0), 1240 MSM_PIN_FUNCTION(ddr_pxi1), 1241 MSM_PIN_FUNCTION(dp0_hot), 1242 MSM_PIN_FUNCTION(egpio), 1243 MSM_PIN_FUNCTION(gcc_gp1), 1244 MSM_PIN_FUNCTION(gcc_gp2), 1245 MSM_PIN_FUNCTION(gcc_gp3), 1246 MSM_PIN_FUNCTION(gnss_adc0), 1247 MSM_PIN_FUNCTION(gnss_adc1), 1248 MSM_PIN_FUNCTION(hdmi_ddc_scl), 1249 MSM_PIN_FUNCTION(hdmi_ddc_sda), 1250 MSM_PIN_FUNCTION(hdmi_dtest0), 1251 MSM_PIN_FUNCTION(hdmi_dtest1), 1252 MSM_PIN_FUNCTION(hdmi_hot_plug), 1253 MSM_PIN_FUNCTION(hdmi_pixel_clk), 1254 MSM_PIN_FUNCTION(hdmi_rcv_det), 1255 MSM_PIN_FUNCTION(hdmi_tx_cec), 1256 MSM_PIN_FUNCTION(host2wlan_sol), 1257 MSM_PIN_FUNCTION(i2s0_data0), 1258 MSM_PIN_FUNCTION(i2s0_data1), 1259 MSM_PIN_FUNCTION(i2s0_sck), 1260 MSM_PIN_FUNCTION(i2s0_ws), 1261 MSM_PIN_FUNCTION(ibi_i3c), 1262 MSM_PIN_FUNCTION(jitter_bist), 1263 MSM_PIN_FUNCTION(mdp_esync0_out), 1264 MSM_PIN_FUNCTION(mdp_esync1_out), 1265 MSM_PIN_FUNCTION(mdp_vsync), 1266 MSM_PIN_FUNCTION(mdp_vsync0_out), 1267 MSM_PIN_FUNCTION(mdp_vsync11_out), 1268 MSM_PIN_FUNCTION(mdp_vsync1_out), 1269 MSM_PIN_FUNCTION(mdp_vsync2_out), 1270 MSM_PIN_FUNCTION(mdp_vsync3_out), 1271 MSM_PIN_FUNCTION(mdp_vsync_e), 1272 MSM_PIN_FUNCTION(nav_gpio0), 1273 MSM_PIN_FUNCTION(nav_gpio1), 1274 MSM_PIN_FUNCTION(nav_gpio2), 1275 MSM_PIN_FUNCTION(nav_gpio3), 1276 MSM_PIN_FUNCTION(pcie0_clk_req_n), 1277 MSM_PIN_FUNCTION(pcie1_clk_req_n), 1278 MSM_PIN_FUNCTION(phase_flag), 1279 MSM_PIN_FUNCTION(pll_bist_sync), 1280 MSM_PIN_FUNCTION(pll_clk_aux), 1281 MSM_PIN_FUNCTION(prng_rosc0), 1282 MSM_PIN_FUNCTION(prng_rosc1), 1283 MSM_PIN_FUNCTION(prng_rosc2), 1284 MSM_PIN_FUNCTION(prng_rosc3), 1285 MSM_PIN_FUNCTION(qdss_cti), 1286 MSM_PIN_FUNCTION(qdss_gpio_traceclk), 1287 MSM_PIN_FUNCTION(qdss_gpio_tracectl), 1288 MSM_PIN_FUNCTION(qdss_gpio_tracedata), 1289 MSM_PIN_FUNCTION(qlink_big_enable), 1290 MSM_PIN_FUNCTION(qlink_big_request), 1291 MSM_PIN_FUNCTION(qlink_little_enable), 1292 MSM_PIN_FUNCTION(qlink_little_request), 1293 MSM_PIN_FUNCTION(qlink_wmss), 1294 MSM_PIN_FUNCTION(qspi0), 1295 MSM_PIN_FUNCTION(qspi_clk), 1296 MSM_PIN_FUNCTION(qspi_cs), 1297 MSM_PIN_FUNCTION(qup1_se0), 1298 MSM_PIN_FUNCTION(qup1_se1), 1299 MSM_PIN_FUNCTION(qup1_se2), 1300 MSM_PIN_FUNCTION(qup1_se2_l2_mira), 1301 MSM_PIN_FUNCTION(qup1_se2_l2_mirb), 1302 MSM_PIN_FUNCTION(qup1_se2_l3_mira), 1303 MSM_PIN_FUNCTION(qup1_se2_l3_mirb), 1304 MSM_PIN_FUNCTION(qup1_se3), 1305 MSM_PIN_FUNCTION(qup1_se4_01), 1306 MSM_PIN_FUNCTION(qup1_se4_23), 1307 MSM_PIN_FUNCTION(qup1_se5), 1308 MSM_PIN_FUNCTION(qup1_se6), 1309 MSM_PIN_FUNCTION(qup1_se6_l1_mira), 1310 MSM_PIN_FUNCTION(qup1_se6_l1_mirb), 1311 MSM_PIN_FUNCTION(qup1_se6_l3_mira), 1312 MSM_PIN_FUNCTION(qup1_se6_l3_mirb), 1313 MSM_PIN_FUNCTION(qup1_se7), 1314 MSM_PIN_FUNCTION(qup1_se7_l0_mira), 1315 MSM_PIN_FUNCTION(qup1_se7_l0_mirb), 1316 MSM_PIN_FUNCTION(qup1_se7_l1_mira), 1317 MSM_PIN_FUNCTION(qup1_se7_l1_mirb), 1318 MSM_PIN_FUNCTION(qup2_se0), 1319 MSM_PIN_FUNCTION(qup2_se1), 1320 MSM_PIN_FUNCTION(qup2_se2), 1321 MSM_PIN_FUNCTION(qup2_se3), 1322 MSM_PIN_FUNCTION(qup2_se3_l0_mira), 1323 MSM_PIN_FUNCTION(qup2_se3_l0_mirb), 1324 MSM_PIN_FUNCTION(qup2_se3_l1_mira), 1325 MSM_PIN_FUNCTION(qup2_se3_l1_mirb), 1326 MSM_PIN_FUNCTION(qup2_se4), 1327 MSM_PIN_FUNCTION(qup2_se5), 1328 MSM_PIN_FUNCTION(qup2_se6), 1329 MSM_PIN_FUNCTION(qup2_se7), 1330 MSM_PIN_FUNCTION(resout_gpio), 1331 MSM_PIN_FUNCTION(sd_write_protect), 1332 MSM_PIN_FUNCTION(sdc1), 1333 MSM_PIN_FUNCTION(sdc2), 1334 MSM_PIN_FUNCTION(sdc2_fb_clk), 1335 MSM_PIN_FUNCTION(tb_trig_sdc1), 1336 MSM_PIN_FUNCTION(tb_trig_sdc2), 1337 MSM_PIN_FUNCTION(tmess_prng0), 1338 MSM_PIN_FUNCTION(tmess_prng1), 1339 MSM_PIN_FUNCTION(tmess_prng2), 1340 MSM_PIN_FUNCTION(tmess_prng3), 1341 MSM_PIN_FUNCTION(tsense_pwm1), 1342 MSM_PIN_FUNCTION(tsense_pwm2), 1343 MSM_PIN_FUNCTION(tsense_pwm3), 1344 MSM_PIN_FUNCTION(tsense_pwm4), 1345 MSM_PIN_FUNCTION(uim0_clk), 1346 MSM_PIN_FUNCTION(uim0_data), 1347 MSM_PIN_FUNCTION(uim0_present), 1348 MSM_PIN_FUNCTION(uim0_reset), 1349 MSM_PIN_FUNCTION(uim1_clk), 1350 MSM_PIN_FUNCTION(uim1_data), 1351 MSM_PIN_FUNCTION(uim1_present), 1352 MSM_PIN_FUNCTION(uim1_reset), 1353 MSM_PIN_FUNCTION(usb0_hs), 1354 MSM_PIN_FUNCTION(usb_phy), 1355 MSM_PIN_FUNCTION(vfr_0), 1356 MSM_PIN_FUNCTION(vfr_1), 1357 MSM_PIN_FUNCTION(vsense_trigger_mirnat), 1358 MSM_PIN_FUNCTION(wcn_sw_ctrl), 1359 }; 1360 1361 /* Every pin is maintained as a single group, and missing or non-existing pin 1362 * would be maintained as dummy group to synchronize pin group index with 1363 * pin descriptor registered with pinctrl core. 1364 * Clients would not be able to request these dummy pin groups. 1365 */ 1366 static const struct msm_pingroup eliza_groups[] = { 1367 [0] = PINGROUP(0, qup2_se0, ibi_i3c, aoss_cti, _, _, _, _, _, _, _, _), 1368 [1] = PINGROUP(1, qup2_se0, ibi_i3c, aoss_cti, _, _, _, _, _, _, _, _), 1369 [2] = PINGROUP(2, qup2_se0, _, _, _, _, _, _, _, _, _, _), 1370 [3] = PINGROUP(3, qup2_se0, _, _, _, _, _, _, _, _, _, _), 1371 [4] = PINGROUP(4, qup2_se1, ibi_i3c, _, _, _, _, _, _, _, _, _), 1372 [5] = PINGROUP(5, qup2_se1, ibi_i3c, _, _, _, _, _, _, _, _, _), 1373 [6] = PINGROUP(6, qup2_se1, hdmi_ddc_scl, _, _, _, _, _, _, _, _, _), 1374 [7] = PINGROUP(7, qup2_se1, hdmi_ddc_sda, _, _, _, _, _, _, _, _, _), 1375 [8] = PINGROUP(8, qup2_se2, _, _, _, _, _, _, _, _, _, _), 1376 [9] = PINGROUP(9, qup2_se2, _, _, _, _, _, _, _, _, _, _), 1377 [10] = PINGROUP(10, qup2_se2, _, _, _, _, _, _, _, _, _, _), 1378 [11] = PINGROUP(11, qup2_se2, _, _, _, _, _, _, _, _, _, _), 1379 [12] = PINGROUP(12, qup2_se4, ibi_i3c, mdp_esync1_out, qup2_se7, _, _, _, _, _, _, _), 1380 [13] = PINGROUP(13, qup2_se4, ibi_i3c, mdp_vsync_e, mdp_esync0_out, qup2_se7, _, _, _, _, _, _), 1381 [14] = PINGROUP(14, _, _, _, _, _, _, _, _, _, _, _), 1382 [15] = PINGROUP(15, _, _, _, _, _, _, _, _, _, _, _), 1383 [16] = PINGROUP(16, qup2_se5, qup2_se2, mdp_vsync, mdp_vsync2_out, mdp_vsync3_out, _, _, _, _, _, _), 1384 [17] = PINGROUP(17, qup2_se5, qup2_se2, mdp_vsync, mdp_vsync0_out, mdp_vsync1_out, _, _, _, _, _, _), 1385 [18] = PINGROUP(18, qup2_se5, qup2_se2, hdmi_pixel_clk, _, qdss_cti, _, _, _, _, _, _), 1386 [19] = PINGROUP(19, qup2_se5, hdmi_rcv_det, _, qdss_cti, _, _, _, _, _, _, _), 1387 [20] = PINGROUP(20, qup2_se6, _, _, _, _, _, _, _, _, _, _), 1388 [21] = PINGROUP(21, qup2_se6, _, _, _, _, _, _, _, _, _, _), 1389 [22] = PINGROUP(22, qup2_se6, _, _, _, _, _, _, _, _, _, _), 1390 [23] = PINGROUP(23, qup2_se6, _, _, _, _, _, _, _, _, _, _), 1391 [24] = PINGROUP(24, _, _, _, _, _, _, _, _, _, _, _), 1392 [25] = PINGROUP(25, _, _, _, _, _, _, _, _, _, _, _), 1393 [26] = PINGROUP(26, qup2_se4, aoss_cti, qup2_se7, _, _, _, _, _, _, _, _), 1394 [27] = PINGROUP(27, qup2_se4, aoss_cti, mdp_vsync11_out, qup2_se7, gcc_gp1, _, _, _, _, _, _), 1395 [28] = PINGROUP(28, qup1_se0, ibi_i3c, _, _, _, _, _, _, _, _, egpio), 1396 [29] = PINGROUP(29, qup1_se0, ibi_i3c, _, _, _, _, _, _, _, _, egpio), 1397 [30] = PINGROUP(30, qup1_se0, qup1_se2, cci_async_in, gcc_gp3, qdss_gpio_tracedata, _, _, _, _, _, egpio), 1398 [31] = PINGROUP(31, qup1_se0, cci_async_in, qdss_gpio_tracedata, _, _, _, _, _, _, _, egpio), 1399 [32] = PINGROUP(32, qup1_se1, ibi_i3c, audio_ref_clk, gcc_gp2, qdss_cti, _, _, _, _, _, _), 1400 [33] = PINGROUP(33, qup1_se1, ibi_i3c, host2wlan_sol, gcc_gp3, _, _, _, _, _, _, _), 1401 [34] = PINGROUP(34, qup1_se1, qup1_se5, tb_trig_sdc1, ddr_bist_start, qdss_gpio_tracedata, _, _, _, _, _, _), 1402 [35] = PINGROUP(35, qup1_se1, qup1_se5, tb_trig_sdc2, gcc_gp2, qdss_gpio_tracedata, _, _, _, _, _, _), 1403 [36] = PINGROUP(36, qup1_se4_01, qup1_se4_23, ibi_i3c, _, _, _, _, _, _, _, _), 1404 [37] = PINGROUP(37, qup1_se4_01, qup1_se4_23, ibi_i3c, _, _, _, _, _, _, _, _), 1405 [38] = PINGROUP(38, sdc2, _, _, _, _, _, _, _, _, _, _), 1406 [39] = PINGROUP(39, sdc2, _, _, _, _, _, _, _, _, _, _), 1407 [40] = PINGROUP(40, qup1_se6, qup1_se2, qup1_se6_l3_mira, _, qdss_gpio_tracedata, gnss_adc1, ddr_pxi1, _, _, _, _), 1408 [41] = PINGROUP(41, _, _, _, _, _, _, _, _, _, _, _), 1409 [42] = PINGROUP(42, qup1_se6, qup1_se2, qup1_se6_l1_mira, qdss_gpio_tracedata, gnss_adc0, ddr_pxi1, _, _, _, _, _), 1410 [43] = PINGROUP(43, _, _, _, _, _, _, _, _, _, _, _), 1411 [44] = PINGROUP(44, qup1_se3, _, _, _, _, _, _, _, _, _, _), 1412 [45] = PINGROUP(45, qup1_se3, _, _, _, _, _, _, _, _, _, _), 1413 [46] = PINGROUP(46, qup1_se3, hdmi_tx_cec, _, _, _, _, _, _, _, _, _), 1414 [47] = PINGROUP(47, qup1_se3, hdmi_hot_plug, _, _, _, _, _, _, _, _, _), 1415 [48] = PINGROUP(48, sdc2, _, _, _, _, _, _, _, _, _, _), 1416 [49] = PINGROUP(49, sdc2, _, _, _, _, _, _, _, _, _, _), 1417 [50] = PINGROUP(50, sdc2_fb_clk, _, _, _, _, _, _, _, _, _, _), 1418 [51] = PINGROUP(51, sdc2, _, _, _, _, _, _, _, _, _, _), 1419 [52] = PINGROUP(52, qup1_se2, pcie1_clk_req_n, qup1_se2_l2_mirb, ddr_bist_complete, qdss_gpio_tracedata, _, vsense_trigger_mirnat, _, _, _, _), 1420 [53] = PINGROUP(53, qup1_se2, qup1_se2_l3_mirb, gcc_gp1, ddr_bist_stop, _, qdss_gpio_tracedata, _, _, _, _, _), 1421 [54] = PINGROUP(54, qup1_se2_l2_mira, qup1_se6_l1_mirb, qdss_gpio_traceclk, gnss_adc1, atest_usb, ddr_pxi0, _, _, _, _, _), 1422 [55] = PINGROUP(55, qup1_se2_l3_mira, dp0_hot, qup1_se6_l3_mirb, _, gnss_adc0, atest_usb, ddr_pxi0, _, _, _, _), 1423 [56] = PINGROUP(56, usb0_hs, tsense_pwm1, tsense_pwm2, tsense_pwm3, tsense_pwm4, _, _, _, _, _, _), 1424 [57] = PINGROUP(57, sd_write_protect, _, _, _, _, _, _, _, _, _, _), 1425 [58] = PINGROUP(58, _, _, _, _, _, _, _, _, _, _, _), 1426 [59] = PINGROUP(59, _, _, _, _, _, _, _, _, _, _, _), 1427 [60] = PINGROUP(60, i2s0_sck, _, _, _, _, _, _, _, _, _, _), 1428 [61] = PINGROUP(61, i2s0_ws, _, _, _, _, _, _, _, _, _, _), 1429 [62] = PINGROUP(62, sdc2, _, _, _, _, _, _, _, _, _, _), 1430 [63] = PINGROUP(63, resout_gpio, i2s0_data1, cci_timer, vfr_0, _, _, _, _, _, _, _), 1431 [64] = PINGROUP(64, i2s0_data0, _, _, _, _, _, _, _, _, _, _), 1432 [65] = PINGROUP(65, cam_mclk, _, qdss_gpio_tracedata, _, _, _, _, _, _, _, _), 1433 [66] = PINGROUP(66, cam_mclk, _, qdss_gpio_tracedata, _, _, _, _, _, _, _, _), 1434 [67] = PINGROUP(67, cam_mclk, prng_rosc0, _, qdss_gpio_tracedata, _, _, _, _, _, _, _), 1435 [68] = PINGROUP(68, cam_mclk, _, _, _, _, _, _, _, _, _, _), 1436 [69] = PINGROUP(69, cam_mclk, audio_ext_mclk0, resout_gpio, prng_rosc1, _, _, _, _, _, _, _), 1437 [70] = PINGROUP(70, cci_i2c_sda, tmess_prng2, _, phase_flag, atest_char, _, _, _, _, _, _), 1438 [71] = PINGROUP(71, cci_i2c_scl, tmess_prng3, _, phase_flag, atest_char, _, _, _, _, _, _), 1439 [72] = PINGROUP(72, cci_i2c_sda, tmess_prng1, qdss_gpio_tracectl, atest_char, _, _, _, _, _, _, _), 1440 [73] = PINGROUP(73, cci_i2c_scl, tmess_prng0, qdss_cti, atest_char, _, _, _, _, _, _, _), 1441 [74] = PINGROUP(74, cci_i2c_sda, prng_rosc3, qdss_cti, atest_char, _, _, _, _, _, _, _), 1442 [75] = PINGROUP(75, cci_i2c_scl, _, phase_flag, _, _, _, _, _, _, _, _), 1443 [76] = PINGROUP(76, cci_i2c_sda, cci_timer, prng_rosc2, _, phase_flag, _, _, _, _, _, _), 1444 [77] = PINGROUP(77, cci_i2c_scl, jitter_bist, _, _, _, _, _, _, _, _, _), 1445 [78] = PINGROUP(78, qup1_se7, qup1_se7_l0_mirb, _, phase_flag, _, _, _, _, _, _, _), 1446 [79] = PINGROUP(79, qspi0, mdp_vsync, qup2_se3_l0_mira, _, _, _, _, _, _, _, _), 1447 [80] = PINGROUP(80, pcie0_clk_req_n, qup1_se7_l1_mira, _, phase_flag, _, _, _, _, _, _, _), 1448 [81] = PINGROUP(81, wcn_sw_ctrl, qup1_se7_l0_mira, dbg_out_clk, _, _, _, _, _, _, _, _), 1449 [82] = PINGROUP(82, _, _, _, _, _, _, _, _, _, _, _), 1450 [83] = PINGROUP(83, _, _, _, _, _, _, _, _, _, _, _), 1451 [84] = PINGROUP(84, uim0_data, _, _, _, _, _, _, _, _, _, _), 1452 [85] = PINGROUP(85, uim0_clk, _, _, _, _, _, _, _, _, _, _), 1453 [86] = PINGROUP(86, uim0_reset, _, _, _, _, _, _, _, _, _, _), 1454 [87] = PINGROUP(87, uim0_present, _, _, _, _, _, _, _, _, _, _), 1455 [88] = PINGROUP(88, uim1_data, _, _, _, _, _, _, _, _, _, _), 1456 [89] = PINGROUP(89, uim1_clk, _, _, _, _, _, _, _, _, _, _), 1457 [90] = PINGROUP(90, uim1_reset, _, _, _, _, _, _, _, _, _, _), 1458 [91] = PINGROUP(91, uim1_present, _, _, _, _, _, _, _, _, _, _), 1459 [92] = PINGROUP(92, qlink_little_request, _, _, _, _, _, _, _, _, _, _), 1460 [93] = PINGROUP(93, qlink_little_enable, _, _, _, _, _, _, _, _, _, _), 1461 [94] = PINGROUP(94, qlink_wmss, _, _, _, _, _, _, _, _, _, _), 1462 [95] = PINGROUP(95, qlink_big_request, _, _, _, _, _, _, _, _, _, _), 1463 [96] = PINGROUP(96, qlink_big_enable, _, _, _, _, _, _, _, _, _, _), 1464 [97] = PINGROUP(97, uim1_data, qspi0, qup2_se3_l1_mira, _, _, _, _, _, _, _, _), 1465 [98] = PINGROUP(98, uim1_clk, qspi0, _, _, _, _, _, _, _, _, _), 1466 [99] = PINGROUP(99, uim1_reset, qspi0, _, _, _, _, _, _, _, _, _), 1467 [100] = PINGROUP(100, uim1_present, qspi0, qup2_se3, coex_uart2_tx, qup2_se3_l1_mirb, mdp_vsync, _, _, _, _, _), 1468 [101] = PINGROUP(101, _, _, _, _, _, _, _, _, _, _, _), 1469 [102] = PINGROUP(102, _, _, _, _, _, _, _, _, _, _, _), 1470 [103] = PINGROUP(103, _, _, _, _, _, _, _, _, _, _, _), 1471 [104] = PINGROUP(104, _, _, _, _, _, _, _, _, _, _, _), 1472 [105] = PINGROUP(105, _, _, _, _, _, _, _, _, _, _, _), 1473 [106] = PINGROUP(106, _, _, _, _, _, _, _, _, _, _, _), 1474 [107] = PINGROUP(107, _, _, _, _, _, _, _, _, _, _, _), 1475 [108] = PINGROUP(108, _, _, _, _, _, _, _, _, _, _, _), 1476 [109] = PINGROUP(109, _, _, _, _, _, _, _, _, _, _, _), 1477 [110] = PINGROUP(110, _, _, _, _, _, _, _, _, _, _, _), 1478 [111] = PINGROUP(111, coex_uart1_tx, _, _, _, _, _, _, _, _, _, _), 1479 [112] = PINGROUP(112, coex_uart1_rx, _, _, _, _, _, _, _, _, _, _), 1480 [113] = PINGROUP(113, _, nav_gpio3, _, _, _, _, _, _, _, _, _), 1481 [114] = PINGROUP(114, qup1_se7, qup1_se7_l1_mirb, _, qdss_gpio_tracedata, _, _, _, _, _, _, _), 1482 [115] = PINGROUP(115, _, qspi0, cci_async_in, _, _, _, _, _, _, _, _), 1483 [116] = PINGROUP(116, qspi0, coex_uart2_rx, qup2_se3, qup2_se3_l0_mirb, _, _, _, _, _, _, _), 1484 [117] = PINGROUP(117, nav_gpio1, _, vfr_1, _, _, _, _, _, _, _, _), 1485 [118] = PINGROUP(118, nav_gpio2, _, _, _, _, _, _, _, _, _, _), 1486 [119] = PINGROUP(119, nav_gpio0, _, _, _, _, _, _, _, _, _, _), 1487 [120] = PINGROUP(120, sdc1, mdp_vsync, _, _, _, _, _, _, _, _, _), 1488 [121] = PINGROUP(121, sdc1, mdp_vsync, _, _, _, _, _, _, _, _, _), 1489 [122] = PINGROUP(122, usb_phy, _, _, _, _, _, _, _, _, _, _), 1490 [123] = PINGROUP(123, sdc1, _, _, _, _, _, _, _, _, _, _), 1491 [124] = PINGROUP(124, sdc1, _, _, _, _, _, _, _, _, _, _), 1492 [125] = PINGROUP(125, sdc1, cci_timer, _, _, _, _, _, _, _, _, _), 1493 [126] = PINGROUP(126, sdc1, cci_timer, _, _, _, _, _, _, _, _, _), 1494 [127] = PINGROUP(127, sdc1, cci_timer, _, _, _, _, _, _, _, _, _), 1495 [128] = PINGROUP(128, sdc1, _, _, _, _, _, _, _, _, _, _), 1496 [129] = PINGROUP(129, sdc1, _, _, _, _, _, _, _, _, _, _), 1497 [130] = PINGROUP(130, sdc1, _, _, _, _, _, _, _, _, _, _), 1498 [131] = PINGROUP(131, sdc1, _, _, _, _, _, _, _, _, _, _), 1499 [132] = PINGROUP(132, qup1_se5, _, qdss_gpio_tracedata, hdmi_dtest0, _, _, _, _, _, _, _), 1500 [133] = PINGROUP(133, qup1_se5, _, qdss_gpio_tracedata, hdmi_dtest1, _, _, _, _, _, _, _), 1501 [134] = PINGROUP(134, qup1_se5, qdss_gpio_tracedata, _, _, _, _, _, _, _, _, _), 1502 [135] = PINGROUP(135, qup1_se5, _, pll_clk_aux, qdss_gpio_tracedata, _, _, _, _, _, _, _), 1503 [136] = PINGROUP(136, _, _, _, _, _, _, _, _, _, _, _), 1504 [137] = PINGROUP(137, _, _, _, _, _, _, _, _, _, _, _), 1505 [138] = PINGROUP(138, _, _, _, _, _, _, _, _, _, _, egpio), 1506 [139] = PINGROUP(139, _, _, _, _, _, _, _, _, _, _, egpio), 1507 [140] = PINGROUP(140, _, _, _, _, _, _, _, _, _, _, egpio), 1508 [141] = PINGROUP(141, _, _, _, _, _, _, _, _, _, _, egpio), 1509 [142] = PINGROUP(142, _, _, _, _, _, _, _, _, _, _, egpio), 1510 [143] = PINGROUP(143, _, _, _, _, _, _, _, _, _, _, egpio), 1511 [144] = PINGROUP(144, _, qdss_gpio_tracectl, _, _, _, _, _, _, _, _, egpio), 1512 [145] = PINGROUP(145, qdss_gpio_tracedata, _, _, _, _, _, _, _, _, _, egpio), 1513 [146] = PINGROUP(146, _, qdss_gpio_tracedata, _, _, _, _, _, _, _, _, egpio), 1514 [147] = PINGROUP(147, ddr_bist_fail, _, qdss_gpio_traceclk, _, _, _, _, _, _, _, egpio), 1515 [148] = PINGROUP(148, _, _, _, _, _, _, _, _, _, _, egpio), 1516 [149] = PINGROUP(149, _, _, _, _, _, _, _, _, _, _, egpio), 1517 [150] = PINGROUP(150, _, _, _, _, _, _, _, _, _, _, egpio), 1518 [151] = PINGROUP(151, _, _, _, _, _, _, _, _, _, _, egpio), 1519 [152] = PINGROUP(152, _, _, _, _, _, _, _, _, _, _, egpio), 1520 [153] = PINGROUP(153, _, _, _, _, _, _, _, _, _, _, egpio), 1521 [154] = PINGROUP(154, qdss_cti, _, _, _, _, _, _, _, _, _, egpio), 1522 [155] = PINGROUP(155, _, qdss_gpio_tracedata, _, _, _, _, _, _, _, _, egpio), 1523 [156] = PINGROUP(156, _, qdss_gpio_tracedata, _, _, _, _, _, _, _, _, egpio), 1524 [157] = PINGROUP(157, _, phase_flag, _, _, _, _, _, _, _, _, egpio), 1525 [158] = PINGROUP(158, _, phase_flag, _, _, _, _, _, _, _, _, egpio), 1526 [159] = PINGROUP(159, _, phase_flag, _, _, _, _, _, _, _, _, egpio), 1527 [160] = PINGROUP(160, _, phase_flag, _, _, _, _, _, _, _, _, egpio), 1528 [161] = PINGROUP(161, _, phase_flag, _, _, _, _, _, _, _, _, egpio), 1529 [162] = PINGROUP(162, _, phase_flag, _, _, _, _, _, _, _, _, egpio), 1530 [163] = PINGROUP(163, _, phase_flag, qdss_gpio_tracedata, _, _, _, _, _, _, _, egpio), 1531 [164] = PINGROUP(164, _, phase_flag, qdss_gpio_tracedata, _, _, _, _, _, _, _, egpio), 1532 [165] = PINGROUP(165, _, phase_flag, _, _, _, _, _, _, _, _, egpio), 1533 [166] = PINGROUP(166, _, phase_flag, _, _, _, _, _, _, _, _, egpio), 1534 [167] = PINGROUP(167, _, phase_flag, qdss_gpio_tracedata, _, _, _, _, _, _, _, egpio), 1535 [168] = PINGROUP(168, _, phase_flag, qdss_gpio_tracedata, _, _, _, _, _, _, _, egpio), 1536 [169] = PINGROUP(169, _, phase_flag, qdss_gpio_tracedata, _, _, _, _, _, _, _, egpio), 1537 [170] = PINGROUP(170, _, phase_flag, qdss_gpio_tracedata, _, _, _, _, _, _, _, egpio), 1538 [171] = PINGROUP(171, _, phase_flag, _, _, _, _, _, _, _, _, egpio), 1539 [172] = PINGROUP(172, _, phase_flag, _, _, _, _, _, _, _, _, egpio), 1540 [173] = PINGROUP(173, _, phase_flag, _, _, _, _, _, _, _, _, egpio), 1541 [174] = PINGROUP(174, _, phase_flag, _, _, _, _, _, _, _, _, egpio), 1542 [175] = PINGROUP(175, resout_gpio, _, phase_flag, _, _, _, _, _, _, _, egpio), 1543 [176] = PINGROUP(176, _, phase_flag, qdss_cti, _, _, _, _, _, _, _, egpio), 1544 [177] = PINGROUP(177, _, phase_flag, qdss_gpio_tracedata, _, _, _, _, _, _, _, egpio), 1545 [178] = PINGROUP(178, _, phase_flag, qdss_gpio_tracedata, _, _, _, _, _, _, _, egpio), 1546 [179] = PINGROUP(179, _, phase_flag, qdss_gpio_tracedata, _, _, _, _, _, _, _, egpio), 1547 [180] = PINGROUP(180, _, phase_flag, qdss_gpio_tracedata, _, _, _, _, _, _, _, egpio), 1548 [181] = PINGROUP(181, _, phase_flag, qdss_gpio_tracedata, _, _, _, _, _, _, _, egpio), 1549 [182] = PINGROUP(182, _, phase_flag, qdss_gpio_tracedata, _, _, _, _, _, _, _, egpio), 1550 [183] = PINGROUP(183, _, _, _, _, _, _, _, _, _, _, _), 1551 [184] = PINGROUP(184, pll_bist_sync, qdss_cti, _, _, _, _, _, _, _, _, egpio), 1552 [185] = UFS_RESET(ufs_reset, 0xc9004, 0xca000), 1553 }; 1554 1555 static const struct msm_gpio_wakeirq_map eliza_pdc_map[] = { 1556 { 0, 82 }, { 3, 87 }, { 4, 90 }, { 6, 68 }, { 7, 153 }, 1557 { 11, 85 }, { 12, 107 }, { 13, 106 }, { 16, 88 }, { 17, 70 }, 1558 { 18, 134 }, { 19, 79 }, { 23, 80 }, { 26, 91 }, { 27, 74 }, 1559 { 28, 137 }, { 29, 138 }, { 30, 139 }, { 31, 140 }, { 32, 117 }, 1560 { 34, 100 }, { 35, 98 }, { 36, 141 }, { 39, 89 }, { 40, 142 }, 1561 { 42, 143 }, { 44, 101 }, { 45, 144 }, { 46, 145 }, { 47, 146 }, 1562 { 49, 75 }, { 51, 147 }, { 52, 148 }, { 53, 149 }, { 54, 150 }, 1563 { 55, 151 }, { 56, 152 }, { 58, 71 }, { 59, 155 }, { 63, 99 }, 1564 { 78, 156 }, { 79, 76 }, { 80, 157 }, { 81, 69 }, { 87, 158 }, 1565 { 91, 67 }, { 92, 159 }, { 95, 160 }, { 98, 161 }, { 99, 162 }, 1566 { 100, 83 }, { 108, 154 }, { 109, 84 }, { 112, 86 }, { 113, 92 }, 1567 { 114, 93 }, { 115, 110 }, { 116, 94 }, { 117, 77 }, { 118, 108 }, 1568 { 119, 95 }, { 120, 81 }, { 121, 96 }, { 122, 97 }, { 123, 102 }, 1569 { 125, 103 }, { 127, 104 }, { 128, 105 }, { 129, 78 }, { 130, 112 }, 1570 { 131, 113 }, { 133, 114 }, { 135, 115 }, { 139, 116 }, { 142, 118 }, 1571 { 145, 109 }, { 147, 72 }, { 149, 111 }, { 154, 122 }, { 157, 119 }, 1572 { 159, 120 }, { 161, 121 }, { 164, 123 }, { 165, 124 }, { 167, 125 }, 1573 { 170, 126 }, { 171, 73 }, { 172, 127 }, { 173, 128 }, { 174, 129 }, 1574 { 175, 130 }, { 176, 131 }, { 177, 132 }, { 179, 133 }, { 182, 135 }, 1575 { 184, 136 }, 1576 }; 1577 1578 static const struct msm_pinctrl_soc_data eliza_tlmm = { 1579 .pins = eliza_pins, 1580 .npins = ARRAY_SIZE(eliza_pins), 1581 .functions = eliza_functions, 1582 .nfunctions = ARRAY_SIZE(eliza_functions), 1583 .groups = eliza_groups, 1584 .ngroups = ARRAY_SIZE(eliza_groups), 1585 .ngpios = 186, 1586 .wakeirq_map = eliza_pdc_map, 1587 .nwakeirq_map = ARRAY_SIZE(eliza_pdc_map), 1588 .egpio_func = 11, 1589 }; 1590 1591 static int eliza_tlmm_probe(struct platform_device *pdev) 1592 { 1593 return msm_pinctrl_probe(pdev, &eliza_tlmm); 1594 } 1595 1596 static const struct of_device_id eliza_tlmm_of_match[] = { 1597 { .compatible = "qcom,eliza-tlmm", }, 1598 {}, 1599 }; 1600 MODULE_DEVICE_TABLE(of, eliza_tlmm_of_match); 1601 1602 static struct platform_driver eliza_tlmm_driver = { 1603 .driver = { 1604 .name = "eliza-tlmm", 1605 .of_match_table = eliza_tlmm_of_match, 1606 }, 1607 .probe = eliza_tlmm_probe, 1608 }; 1609 1610 static int __init eliza_tlmm_init(void) 1611 { 1612 return platform_driver_register(&eliza_tlmm_driver); 1613 } 1614 arch_initcall(eliza_tlmm_init); 1615 1616 static void __exit eliza_tlmm_exit(void) 1617 { 1618 platform_driver_unregister(&eliza_tlmm_driver); 1619 } 1620 module_exit(eliza_tlmm_exit); 1621 1622 MODULE_DESCRIPTION("QTI Eliza TLMM driver"); 1623 MODULE_LICENSE("GPL"); 1624