| /linux/drivers/gpu/drm/amd/display/dc/dwb/dcn30/ |
| H A D | dcn30_dwb_cm.c | 37 dwbc30->dwbc_regs->reg
40 dwbc30->base.ctx
44 dwbc30->dwbc_shift->field_name, dwbc30->dwbc_mask->field_name
49 static void dwb3_get_reg_field_ogam(struct dcn30_dwbc *dwbc30, in dwb3_get_reg_field_ogam() argument
52 reg->shifts.field_region_start_base = dwbc30->dwbc_shift->DWB_OGAM_RAMA_EXP_REGION_START_BASE_B; in dwb3_get_reg_field_ogam()
53 reg->masks.field_region_start_base = dwbc30->dwbc_mask->DWB_OGAM_RAMA_EXP_REGION_START_BASE_B; in dwb3_get_reg_field_ogam()
54 reg->shifts.field_offset = dwbc30->dwbc_shift->DWB_OGAM_RAMA_OFFSET_B; in dwb3_get_reg_field_ogam()
55 reg->masks.field_offset = dwbc30->dwbc_mask->DWB_OGAM_RAMA_OFFSET_B; in dwb3_get_reg_field_ogam()
57 reg->shifts.exp_region0_lut_offset = dwbc30->dwbc_shift->DWB_OGAM_RAMA_EXP_REGION0_LUT_OFFSET; in dwb3_get_reg_field_ogam()
58 reg->masks.exp_region0_lut_offset = dwbc30->dwbc_mask->DWB_OGAM_RAMA_EXP_REGION0_LUT_OFFSET; in dwb3_get_reg_field_ogam()
[all …]
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| H A D | dcn30_dwb.h | 877 void dcn30_dwbc_construct(struct dcn30_dwbc *dwbc30,
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| /linux/drivers/gpu/drm/amd/display/dc/dwb/dcn35/ |
| H A D | dcn35_dwb.c | 28 dwbc30->dwbc_regs->reg
31 dwbc30->base.ctx
35 ((const struct dcn35_dwbc_shift *)(dwbc30->dwbc_shift))->field_name, \
36 ((const struct dcn35_dwbc_mask *)(dwbc30->dwbc_mask)) \
40 dwbc30->base.ctx->logger
42 void dcn35_dwbc_construct(struct dcn30_dwbc *dwbc30, in dcn35_dwbc_construct() argument
49 dcn30_dwbc_construct(dwbc30, ctx, dwbc_regs, in dcn35_dwbc_construct()
54 void dcn35_dwbc_set_fgcg(struct dcn30_dwbc *dwbc30, bool enable) in dcn35_dwbc_set_fgcg() argument
|
| H A D | dcn35_dwb.h | 52 void dcn35_dwbc_construct(struct dcn30_dwbc *dwbc30,
59 void dcn35_dwbc_set_fgcg(struct dcn30_dwbc *dwbc30, bool enable);
|
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn351/ |
| H A D | dcn351_resource.c | 1727 static void dcn35_dwbc_init(struct dcn30_dwbc *dwbc30, struct dc_context *ctx) in dcn35_clock_source_create()
1730 dwbc30, ctx->dc->debug.enable_fine_grain_clock_gating.bits.dwb); in dcn35_clock_source_create()
1739 struct dcn30_dwbc *dwbc30 = kzalloc_obj(struct dcn30_dwbc);
1741 if (!dwbc30) {
1742 dm_error("DC: failed to create dwbc30!\n");
1750 dcn35_dwbc_construct(dwbc30, ctx, in dcn351_validate_bandwidth()
1756 pool->dwbc[i] = &dwbc30->base; in dcn351_validate_bandwidth()
1758 dcn35_dwbc_init(dwbc30, ctx); in dcn351_validate_bandwidth()
1609 dcn35_dwbc_init(struct dcn30_dwbc * dwbc30,struct dc_context * ctx) dcn35_dwbc_init() argument
1621 struct dcn30_dwbc *dwbc30 = kzalloc_obj(struct dcn30_dwbc); dcn35_dwbc_create() local
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn35/ |
| H A D | dcn35_resource.c | 1747 static void dcn35_dwbc_init(struct dcn30_dwbc *dwbc30, struct dc_context *ctx) in dcn35_clock_source_create()
1750 dwbc30, ctx->dc->debug.enable_fine_grain_clock_gating.bits.dwb); in dcn35_clock_source_create()
1759 struct dcn30_dwbc *dwbc30 = kzalloc_obj(struct dcn30_dwbc);
1761 if (!dwbc30) {
1762 dm_error("DC: failed to create dwbc30!\n");
1770 dcn35_dwbc_construct(dwbc30, ctx, in dcn35_validate_bandwidth()
1776 pool->dwbc[i] = &dwbc30->base; in dcn35_validate_bandwidth()
1778 dcn35_dwbc_init(dwbc30, ctx); in dcn35_validate_bandwidth()
1629 dcn35_dwbc_init(struct dcn30_dwbc * dwbc30,struct dc_context * ctx) dcn35_dwbc_init() argument
1641 struct dcn30_dwbc *dwbc30 = kzalloc_obj(struct dcn30_dwbc); dcn35_dwbc_create() local
|
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn36/ |
| H A D | dcn36_resource.c | 1734 static void dcn35_dwbc_init(struct dcn30_dwbc *dwbc30, struct dc_context *ctx) in dcn35_clock_source_create()
1737 dwbc30, ctx->dc->debug.enable_fine_grain_clock_gating.bits.dwb); in dcn35_clock_source_create()
1746 struct dcn30_dwbc *dwbc30 = kzalloc_obj(struct dcn30_dwbc);
1748 if (!dwbc30) {
1749 dm_error("DC: failed to create dwbc30!\n");
1757 dcn35_dwbc_construct(dwbc30, ctx, in dcn35_validate_bandwidth()
1763 pool->dwbc[i] = &dwbc30->base; in dcn35_validate_bandwidth()
1765 dcn35_dwbc_init(dwbc30, ctx); in dcn35_validate_bandwidth()
1616 dcn35_dwbc_init(struct dcn30_dwbc * dwbc30,struct dc_context * ctx) dcn35_dwbc_init() argument
1628 struct dcn30_dwbc *dwbc30 = kzalloc_obj(struct dcn30_dwbc); dcn35_dwbc_create() local
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn303/ |
| H A D | dcn303_resource.c | 794 struct dcn30_dwbc *dwbc30 = kzalloc_obj(struct dcn30_dwbc);
796 if (!dwbc30) {
797 dm_error("DC: failed to create dwbc30!\n");
801 dcn30_dwbc_construct(dwbc30, ctx, &dwbc30_regs[i], &dwbc30_shift, &dwbc30_mask, i);
803 pool->dwbc[i] = &dwbc30->base;
706 struct dcn30_dwbc *dwbc30 = kzalloc_obj(struct dcn30_dwbc); dcn303_dwbc_create() local
|
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn302/ |
| H A D | dcn302_resource.c | 833 struct dcn30_dwbc *dwbc30 = kzalloc_obj(struct dcn30_dwbc);
835 if (!dwbc30) {
836 dm_error("DC: failed to create dwbc30!\n");
840 dcn30_dwbc_construct(dwbc30, ctx, &dwbc30_regs[i], &dwbc30_shift, &dwbc30_mask, i);
842 pool->dwbc[i] = &dwbc30->base;
745 struct dcn30_dwbc *dwbc30 = kzalloc_obj(struct dcn30_dwbc); dcn302_dwbc_create() local
|
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn301/ |
| H A D | dcn301_resource.c | 1218 struct dcn30_dwbc *dwbc30 = kzalloc_obj(struct dcn30_dwbc); in dcn301_dwbc_create()
1220 if (!dwbc30) { in dcn301_dwbc_create()
1221 dm_error("DC: failed to create dwbc30!\n"); in dcn301_dwbc_create()
1225 dcn30_dwbc_construct(dwbc30, ctx, in dcn301_dwbc_create()
1231 pool->dwbc[i] = &dwbc30->base; in dcn301_dwbc_create()
1217 struct dcn30_dwbc *dwbc30 = kzalloc_obj(struct dcn30_dwbc); dcn301_dwbc_create() local
|
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn314/ |
| H A D | dcn314_resource.c | 1736 struct dcn30_dwbc *dwbc30 = kzalloc_obj(struct dcn30_dwbc); in dcn314_validate_bandwidth()
1738 if (!dwbc30) { in dcn314_validate_bandwidth()
1739 dm_error("DC: failed to create dwbc30!\n"); in dcn314_validate_bandwidth()
1743 dcn30_dwbc_construct(dwbc30, ctx, in dcn314_validate_bandwidth()
1749 pool->dwbc[i] = &dwbc30->base; in dcn314_validate_bandwidth()
1611 struct dcn30_dwbc *dwbc30 = kzalloc_obj(struct dcn30_dwbc); dcn31_dwbc_create() local
|
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn316/ |
| H A D | dcn316_resource.c | 1669 struct dcn30_dwbc *dwbc30 = kzalloc_obj(struct dcn30_dwbc); in dcn316_populate_dml_pipes_from_context()
1671 if (!dwbc30) { in dcn316_populate_dml_pipes_from_context()
1672 dm_error("DC: failed to create dwbc30!\n"); in dcn316_populate_dml_pipes_from_context()
1676 dcn30_dwbc_construct(dwbc30, ctx, in dcn316_populate_dml_pipes_from_context()
1682 pool->dwbc[i] = &dwbc30->base; in dcn316_populate_dml_pipes_from_context()
1546 struct dcn30_dwbc *dwbc30 = kzalloc_obj(struct dcn30_dwbc); dcn31_dwbc_create() local
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn31/ |
| H A D | dcn31_resource.c | 1677 struct dcn30_dwbc *dwbc30 = kzalloc_obj(struct dcn30_dwbc); in dcn31_populate_dml_pipes_from_context()
1679 if (!dwbc30) { in dcn31_populate_dml_pipes_from_context()
1680 dm_error("DC: failed to create dwbc30!\n"); in dcn31_populate_dml_pipes_from_context()
1684 dcn30_dwbc_construct(dwbc30, ctx, in dcn31_populate_dml_pipes_from_context()
1690 pool->dwbc[i] = &dwbc30->base; in dcn31_populate_dml_pipes_from_context()
1553 struct dcn30_dwbc *dwbc30 = kzalloc_obj(struct dcn30_dwbc); dcn31_dwbc_create() local
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn315/ |
| H A D | dcn315_resource.c | 1679 struct dcn30_dwbc *dwbc30 = kzalloc_obj(struct dcn30_dwbc); in allow_pixel_rate_crb()
1681 if (!dwbc30) { in allow_pixel_rate_crb()
1682 dm_error("DC: failed to create dwbc30!\n"); in allow_pixel_rate_crb()
1686 dcn30_dwbc_construct(dwbc30, ctx, in allow_pixel_rate_crb()
1692 pool->dwbc[i] = &dwbc30->base; in allow_pixel_rate_crb()
1554 struct dcn30_dwbc *dwbc30 = kzalloc_obj(struct dcn30_dwbc); dcn31_dwbc_create() local
|
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn321/ |
| H A D | dcn321_resource.c | 1653 struct dcn30_dwbc *dwbc30 = kzalloc_obj(struct dcn30_dwbc);
1655 if (!dwbc30) {
1656 dm_error("DC: failed to create dwbc30!\n");
1664 dcn30_dwbc_construct(dwbc30, ctx, in read_pipe_fuses()
1670 pool->dwbc[i] = &dwbc30->base; in dcn321_resource_construct()
1526 struct dcn30_dwbc *dwbc30 = kzalloc_obj(struct dcn30_dwbc); dcn321_dwbc_create() local
|
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn30/ |
| H A D | dcn30_resource.c | 1380 struct dcn30_dwbc *dwbc30 = kzalloc_obj(struct dcn30_dwbc); in dcn30_populate_dml_writeback_from_context()
1382 if (!dwbc30) { in dcn30_populate_dml_writeback_from_context()
1383 dm_error("DC: failed to create dwbc30!\n");
1387 dcn30_dwbc_construct(dwbc30, ctx, in dcn30_calc_max_scaled_time()
1393 pool->dwbc[i] = &dwbc30->base; in dcn30_calc_max_scaled_time()
1257 struct dcn30_dwbc *dwbc30 = kzalloc_obj(struct dcn30_dwbc); dcn30_dwbc_create() local
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn32/ |
| H A D | dcn32_resource.c | 1679 struct dcn30_dwbc *dwbc30 = kzalloc_obj(struct dcn30_dwbc); in dcn32_enable_phantom_plane()
1681 if (!dwbc30) { in dcn32_enable_phantom_plane()
1682 dm_error("DC: failed to create dwbc30!\n"); in dcn32_enable_phantom_plane()
1690 dcn30_dwbc_construct(dwbc30, ctx, in dcn32_enable_phantom_plane()
1696 pool->dwbc[i] = &dwbc30->base; in dcn32_enable_phantom_plane()
1551 struct dcn30_dwbc *dwbc30 = kzalloc_obj(struct dcn30_dwbc); dcn32_dwbc_create() local
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