| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/ |
| H A D | dcn30_clk_mgr.c | 254 if ((new_clocks->dramclk_khz <= dc->clk_mgr->bw_params->dc_mode_softmax_memclk * 1000) != in dcn3_update_clocks()
255 (clk_mgr_base->clks.dramclk_khz <= dc->clk_mgr->bw_params->dc_mode_softmax_memclk * 1000)) in dcn3_update_clocks()
266 new_clocks->dramclk_khz <= dc->clk_mgr->bw_params->dc_mode_softmax_memclk * 1000) in dcn3_update_clocks()
276 if (should_set_clock(safe_to_lower, new_clocks->dramclk_khz, clk_mgr_base->clks.dramclk_khz)) { in dcn3_update_clocks()
277 clk_mgr_base->clks.dramclk_khz = new_clocks->dramclk_khz; in dcn3_update_clocks()
284 …n30_smu_set_hard_min_by_freq(clk_mgr, PPCLK_UCLK, khz_to_mhz_ceil(clk_mgr_base->clks.dramclk_khz)); in dcn3_update_clocks()
366 khz_to_mhz_ceil(clk_mgr_base->clks.dramclk_khz)); in dcn3_set_hard_min_memclk()
447 else if (a->dramclk_khz != b->dramclk_khz) in dcn3_are_clock_states_equal()
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/ |
| H A D | dcn20_clk_mgr.c | 290 if (should_set_clock(safe_to_lower, new_clocks->dramclk_khz, clk_mgr_base->clks.dramclk_khz)) { in dcn2_update_clocks()
291 clk_mgr_base->clks.dramclk_khz = new_clocks->dramclk_khz; in dcn2_update_clocks()
293 …p_smu->set_hard_min_uclk_by_freq(&pp_smu->pp_smu, khz_to_mhz_ceil(clk_mgr_base->clks.dramclk_khz)); in dcn2_update_clocks()
370 if (should_set_clock(safe_to_lower, new_clocks->dramclk_khz, clk_mgr->clks.dramclk_khz)) { in dcn2_update_clocks_fpga()
371 clk_mgr->clks.dramclk_khz = new_clocks->dramclk_khz; in dcn2_update_clocks_fpga()
484 else if (a->dramclk_khz != b->dramclk_khz) in dcn2_are_clock_states_equal()
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn201/ |
| H A D | dcn201_clk_mgr.c | 140 if (should_set_clock(safe_to_lower, new_clocks->dramclk_khz, clk_mgr_base->clks.dramclk_khz)) in dcn201_update_clocks()
141 clk_mgr_base->clks.dramclk_khz = new_clocks->dramclk_khz; in dcn201_update_clocks()
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/ |
| H A D | dcn32_clk_mgr.c | 538 dramclk_khz_override = new_clocks->dramclk_khz; in dcn32_auto_dpm_test_log()
559 new_clocks->dramclk_khz > 0 && in dcn32_auto_dpm_test_log()
746 if (should_set_clock(safe_to_lower, new_clocks->dramclk_khz, clk_mgr_base->clks.dramclk_khz) && in dcn32_update_clocks()
748 clk_mgr_base->clks.dramclk_khz = new_clocks->dramclk_khz; in dcn32_update_clocks()
758 …)dc->clk_mgr->bw_params->dc_mode_softmax_memclk, khz_to_mhz_ceil(clk_mgr_base->clks.dramclk_khz))); in dcn32_update_clocks()
760 …n32_smu_set_hard_min_by_freq(clk_mgr, PPCLK_UCLK, khz_to_mhz_ceil(clk_mgr_base->clks.dramclk_khz)); in dcn32_update_clocks()
1004 khz_to_mhz_ceil(clk_mgr_base->clks.dramclk_khz)); in dcn32_set_hard_min_memclk()
1080 else if (a->dramclk_khz != b->dramclk_khz) in dcn32_are_clock_states_equal()
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/ |
| H A D | dcn401_clk_mgr.c | 440 dramclk_khz_override = new_clocks->dramclk_khz; in dcn401_auto_dpm_test_log()
461 new_clocks->dramclk_khz > 0 && in dcn401_auto_dpm_test_log()
788 int active_uclk_mhz = khz_to_mhz_ceil(clk_mgr_base->clks.dramclk_khz); in dcn401_build_update_bandwidth_clocks_sequence()
931 if (should_set_clock(safe_to_lower, new_clocks->dramclk_khz, clk_mgr_base->clks.dramclk_khz)) { in dcn401_build_update_bandwidth_clocks_sequence()
932 clk_mgr_base->clks.dramclk_khz = new_clocks->dramclk_khz; in dcn401_build_update_bandwidth_clocks_sequence()
936 active_uclk_mhz = khz_to_mhz_ceil(clk_mgr_base->clks.dramclk_khz); in dcn401_build_update_bandwidth_clocks_sequence()
1342 new_clocks.dramclk_khz = context->bw_ctx.bw.dcn.clk.dramclk_khz; in dcn401_set_hard_min_memclk()
1346 new_clocks.dramclk_khz = clk_mgr_base->bw_params->clk_table.entries[0].memclk_mhz * 1000; in dcn401_set_hard_min_memclk()
1347 new_clocks.idle_dramclk_khz = new_clocks.dramclk_khz; in dcn401_set_hard_min_memclk()
1364 return clk_mgr->base.ctx->dc->current_state->bw_ctx.bw.dcn.clk.dramclk_khz; in dcn401_get_hard_min_memclk()
[all …]
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/ |
| H A D | dcn35_clk_mgr.c | 1260 if (should_set_clock(safe_to_lower, new_clocks->dramclk_khz, clk_mgr->clks.dramclk_khz)) { in dcn35_update_clocks_fpga()
1261 clk_mgr->clks.dramclk_khz = new_clocks->dramclk_khz; in dcn35_update_clocks_fpga()
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| /linux/drivers/gpu/drm/amd/display/amdgpu_dm/ |
| H A D | amdgpu_dm_helpers.c | 1350 dc_state->bw_ctx.bw.dcn.clk.dramclk_khz = clk_mgr->dc_mode_softmax_enabled ? in dm_helpers_dp_handle_test_pattern_request()
1352 dc_state->bw_ctx.bw.dcn.clk.idle_dramclk_khz = dc_state->bw_ctx.bw.dcn.clk.dramclk_khz; in dm_helpers_dp_handle_test_pattern_request()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn32/ |
| H A D | dcn32_hwseq.c | 763 clocks->dramclk_khz = dc->clk_mgr->bw_params->clk_table.entries[0].memclk_mhz * 1000; in dcn32_initialize_min_clocks()
1809 if (dc->clk_mgr->clks.dramclk_khz <= dc->clk_mgr->bw_params->dc_mode_softmax_memclk * 1000 && in dcn32_prepare_bandwidth()
1810 context->bw_ctx.bw.dcn.clk.dramclk_khz > dc->clk_mgr->bw_params->dc_mode_softmax_memclk * 1000) in dcn32_prepare_bandwidth()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn30/ |
| H A D | dcn30_hwseq.c | 1199 if (dc->clk_mgr->clks.dramclk_khz <= dc->clk_mgr->bw_params->dc_mode_softmax_memclk * 1000 && in dcn30_prepare_bandwidth()
1200 context->bw_ctx.bw.dcn.clk.dramclk_khz > dc->clk_mgr->bw_params->dc_mode_softmax_memclk * 1000) in dcn30_prepare_bandwidth()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn401/ |
| H A D | dcn401_hwseq.c | 65 clocks->dramclk_khz = dc->clk_mgr->bw_params->clk_table.entries[0].memclk_mhz * 1000; in dcn401_initialize_min_clocks()
1395 if (dc->clk_mgr->clks.dramclk_khz <= dc->clk_mgr->bw_params->dc_mode_softmax_memclk * 1000 && in dcn401_prepare_bandwidth()
1396 context->bw_ctx.bw.dcn.clk.dramclk_khz > dc->clk_mgr->bw_params->dc_mode_softmax_memclk * 1000) in dcn401_prepare_bandwidth()
1464 if (dc->clk_mgr->clks.dramclk_khz > dc->clk_mgr->bw_params->dc_mode_softmax_memclk * 1000 && in dcn401_optimize_bandwidth()
1465 context->bw_ctx.bw.dcn.clk.dramclk_khz <= dc->clk_mgr->bw_params->dc_mode_softmax_memclk * 1000) in dcn401_optimize_bandwidth()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn31/ |
| H A D | dcn31_fpu.c | 569 context->bw_ctx.bw.dcn.clk.dramclk_khz = 0; in dcn31_calculate_wm_and_dlg_fp()
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| /linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/ |
| H A D | dml21_translation_helper.c | 809 …context->bw_ctx.bw.dcn.clk.dramclk_khz = in_ctx->v21.mode_programming.programming->min_clocks.dcn4… in dml21_copy_clocks_to_dc_state()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn20/ |
| H A D | dcn20_hwseq.c | 2437 if (dc->clk_mgr->clks.dramclk_khz > dc->clk_mgr->bw_params->dc_mode_softmax_memclk * 1000 && in dcn20_optimize_bandwidth()
2438 context->bw_ctx.bw.dcn.clk.dramclk_khz <= dc->clk_mgr->bw_params->dc_mode_softmax_memclk * 1000) in dcn20_optimize_bandwidth()
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| /linux/drivers/gpu/drm/amd/display/dc/ |
| H A D | dc.h | 691 int dramclk_khz; member
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn401/ |
| H A D | dcn401_resource.c | 1795 int uclk_mhz = context->bw_ctx.bw.dcn.clk.dramclk_khz / 1000; in dcn401_get_power_profile()
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| /linux/drivers/gpu/drm/amd/display/dc/core/ |
| H A D | dc.c | 5855 funcMin = (dc->clk_mgr->clks.dramclk_khz + 999) / 1000; in dc_enable_dcmode_clk_limit()
|