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Searched refs:dpm_level (Results 1 – 15 of 15) sorted by relevance

/linux/drivers/gpu/drm/amd/pm/swsmu/smu15/
H A Dsmu_v15_0_0_ppt.c796 uint32_t dpm_level, in smu_v15_0_0_get_dpm_freq_by_index() argument
806 if (dpm_level >= clk_table->NumSocClkLevelsEnabled) in smu_v15_0_0_get_dpm_freq_by_index()
808 *freq = clk_table->SocClocks[dpm_level]; in smu_v15_0_0_get_dpm_freq_by_index()
811 if (dpm_level >= clk_table->VcnClkLevelsEnabled) in smu_v15_0_0_get_dpm_freq_by_index()
813 *freq = clk_table->VClocks[dpm_level]; in smu_v15_0_0_get_dpm_freq_by_index()
816 if (dpm_level >= clk_table->VcnClkLevelsEnabled) in smu_v15_0_0_get_dpm_freq_by_index()
818 *freq = clk_table->DClocks[dpm_level]; in smu_v15_0_0_get_dpm_freq_by_index()
822 if (dpm_level >= clk_table->NumMemPstatesEnabled) in smu_v15_0_0_get_dpm_freq_by_index()
824 *freq = clk_table->MemPstateTable[dpm_level].MemClk; in smu_v15_0_0_get_dpm_freq_by_index()
827 if (dpm_level >= clk_table->NumFclkLevelsEnabled) in smu_v15_0_0_get_dpm_freq_by_index()
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H A Dsmu_v15_0_8_ppt.c2023 if (smu_dpm->dpm_level != AMD_DPM_FORCED_LEVEL_MANUAL) in smu_v15_0_8_set_soft_freq_limited_range()
2069 if (smu_dpm->dpm_level != AMD_DPM_FORCED_LEVEL_MANUAL) in smu_v15_0_8_od_edit_dpm_table()
/linux/drivers/gpu/drm/amd/pm/swsmu/smu13/
H A Dsmu_v13_0_5_ppt.c526 if (smu_dpm->dpm_level != AMD_DPM_FORCED_LEVEL_MANUAL) in smu_v13_0_5_od_edit_dpm_table()
662 uint32_t dpm_level, in smu_v13_0_5_get_dpm_freq_by_index() argument
672 if (dpm_level >= clk_table->NumSocClkLevelsEnabled) in smu_v13_0_5_get_dpm_freq_by_index()
674 *freq = clk_table->SocClocks[dpm_level]; in smu_v13_0_5_get_dpm_freq_by_index()
677 if (dpm_level >= clk_table->VcnClkLevelsEnabled) in smu_v13_0_5_get_dpm_freq_by_index()
679 *freq = clk_table->VClocks[dpm_level]; in smu_v13_0_5_get_dpm_freq_by_index()
682 if (dpm_level >= clk_table->VcnClkLevelsEnabled) in smu_v13_0_5_get_dpm_freq_by_index()
684 *freq = clk_table->DClocks[dpm_level]; in smu_v13_0_5_get_dpm_freq_by_index()
688 if (dpm_level >= clk_table->NumDfPstatesEnabled) in smu_v13_0_5_get_dpm_freq_by_index()
690 *freq = clk_table->DfPstateTable[dpm_level].MemClk; in smu_v13_0_5_get_dpm_freq_by_index()
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H A Dsmu_v13_0_4_ppt.c431 uint32_t dpm_level, in smu_v13_0_4_get_dpm_freq_by_index() argument
441 if (dpm_level >= clk_table->NumSocClkLevelsEnabled) in smu_v13_0_4_get_dpm_freq_by_index()
443 *freq = clk_table->SocClocks[dpm_level]; in smu_v13_0_4_get_dpm_freq_by_index()
446 if (dpm_level >= clk_table->VcnClkLevelsEnabled) in smu_v13_0_4_get_dpm_freq_by_index()
448 *freq = clk_table->VClocks[dpm_level]; in smu_v13_0_4_get_dpm_freq_by_index()
451 if (dpm_level >= clk_table->VcnClkLevelsEnabled) in smu_v13_0_4_get_dpm_freq_by_index()
453 *freq = clk_table->DClocks[dpm_level]; in smu_v13_0_4_get_dpm_freq_by_index()
457 if (dpm_level >= clk_table->NumDfPstatesEnabled) in smu_v13_0_4_get_dpm_freq_by_index()
459 *freq = clk_table->DfPstateTable[dpm_level].MemClk; in smu_v13_0_4_get_dpm_freq_by_index()
462 if (dpm_level >= clk_table->NumDfPstatesEnabled) in smu_v13_0_4_get_dpm_freq_by_index()
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H A Dyellow_carp_ppt.c657 if (smu_dpm->dpm_level != AMD_DPM_FORCED_LEVEL_MANUAL) in yellow_carp_od_edit_dpm_table()
796 uint32_t dpm_level, in yellow_carp_get_dpm_freq_by_index() argument
806 if (dpm_level >= clk_table->NumSocClkLevelsEnabled) in yellow_carp_get_dpm_freq_by_index()
808 *freq = clk_table->SocClocks[dpm_level]; in yellow_carp_get_dpm_freq_by_index()
811 if (dpm_level >= clk_table->VcnClkLevelsEnabled) in yellow_carp_get_dpm_freq_by_index()
813 *freq = clk_table->VClocks[dpm_level]; in yellow_carp_get_dpm_freq_by_index()
816 if (dpm_level >= clk_table->VcnClkLevelsEnabled) in yellow_carp_get_dpm_freq_by_index()
818 *freq = clk_table->DClocks[dpm_level]; in yellow_carp_get_dpm_freq_by_index()
822 if (dpm_level >= clk_table->NumDfPstatesEnabled) in yellow_carp_get_dpm_freq_by_index()
824 *freq = clk_table->DfPstateTable[dpm_level].MemClk; in yellow_carp_get_dpm_freq_by_index()
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/linux/drivers/accel/amdxdna/
H A Daie2_pci.h158 u32 dpm_level; member
181 int (*set_dpm)(struct amdxdna_dev_hdl *ndev, u32 dpm_level);
242 int aie2_pm_set_dpm(struct amdxdna_dev_hdl *ndev, u32 dpm_level);
H A Daie2_pci.c273 static int aie2_xrs_set_dft_dpm_level(struct drm_device *ddev, u32 dpm_level) in aie2_xrs_set_dft_dpm_level() argument
281 ndev->dft_dpm_level = dpm_level; in aie2_xrs_set_dft_dpm_level()
282 if (ndev->pw_mode != POWER_MODE_DEFAULT || ndev->dpm_level == dpm_level) in aie2_xrs_set_dft_dpm_level()
285 return aie2_pm_set_dpm(ndev, dpm_level); in aie2_xrs_set_dft_dpm_level()
/linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dpp_psm.c295 hwmgr->dpm_level = hwmgr->request_dpm_level; in psm_adjust_power_state_dynamic()
297 if (hwmgr->dpm_level != AMD_DPM_FORCED_LEVEL_MANUAL) { in psm_adjust_power_state_dynamic()
H A Dvega12_hwmgr.c2387 if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_MIN_SCLK) { in vega12_apply_clocks_adjust_rules()
2392 if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK) { in vega12_apply_clocks_adjust_rules()
2411 if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_MIN_MCLK) { in vega12_apply_clocks_adjust_rules()
2416 if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK) { in vega12_apply_clocks_adjust_rules()
2455 if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK) { in vega12_apply_clocks_adjust_rules()
2474 if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK) { in vega12_apply_clocks_adjust_rules()
2493 if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK) { in vega12_apply_clocks_adjust_rules()
2512 if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK) { in vega12_apply_clocks_adjust_rules()
H A Dvega20_hwmgr.c3804 if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_MIN_SCLK) { in vega20_apply_clocks_adjust_rules()
3809 if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK) { in vega20_apply_clocks_adjust_rules()
3828 if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_MIN_MCLK) { in vega20_apply_clocks_adjust_rules()
3833 if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK) { in vega20_apply_clocks_adjust_rules()
3888 if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK) { in vega20_apply_clocks_adjust_rules()
3907 if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK) { in vega20_apply_clocks_adjust_rules()
3926 if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK) { in vega20_apply_clocks_adjust_rules()
3945 if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK) { in vega20_apply_clocks_adjust_rules()
H A Dhwmgr.c87 hwmgr->dpm_level = AMD_DPM_FORCED_LEVEL_AUTO; in hwmgr_early_init()
H A Dsmu7_hwmgr.c3386 …if (level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK && hwmgr->dpm_level != AMD_DPM_FORCED_LEVEL_PROFILE… in smu7_force_dpm_level()
3388 …else if (level != AMD_DPM_FORCED_LEVEL_PROFILE_PEAK && hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PR… in smu7_force_dpm_level()
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn60/
H A Ddcn60_resource.c1901 int dpm_level = 0; in dcn60_get_power_profile() local
1908 dpm_level++; in dcn60_get_power_profile()
1911 return dpm_level; in dcn60_get_power_profile()
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn401/
H A Ddcn401_resource.c1944 int dpm_level = 0; in dcn401_get_power_profile() local
1951 dpm_level++; in dcn401_get_power_profile()
1954 return dpm_level; in dcn401_get_power_profile()
/linux/drivers/gpu/drm/amd/pm/powerplay/smumgr/
H A Dci_smumgr.c2892 if (hwmgr->dpm_level & profile_mode_mask || !PP_CAP(PHM_PlatformCaps_UVDDPM)) in ci_update_uvd_smc_table()
2924 if (hwmgr->dpm_level & profile_mode_mask || !PP_CAP(PHM_PlatformCaps_VCEDPM)) in ci_update_vce_smc_table()