| /linux/drivers/gpu/drm/amd/display/dc/ |
| H A D | dc_dmub_srv.c | 47 struct dmub_srv *dmub) in dc_dmub_srv_construct() argument
49 dc_srv->dmub = dmub; in dc_dmub_srv_construct()
60 struct dc_dmub_srv *dc_dmub_srv_create(struct dc *dc, struct dmub_srv *dmub) in dc_dmub_srv_create() argument
70 dc_dmub_srv_construct(dc_srv, dc, dmub); in dc_dmub_srv_create()
85 struct dmub_srv *dmub; in dc_dmub_srv_wait_for_pending() local
89 if (!dc_dmub_srv || !dc_dmub_srv->dmub) in dc_dmub_srv_wait_for_pending()
93 dmub = dc_dmub_srv->dmub; in dc_dmub_srv_wait_for_pending()
96 status = dmub_srv_wait_for_pending(dmub, MAX_WAIT_US); in dc_dmub_srv_wait_for_pending()
109 struct dmub_srv *dmub = dc_dmub_srv->dmub; in dc_dmub_srv_clear_inbox0_ack() local
113 status = dmub_srv_clear_inbox0_ack(dmub); in dc_dmub_srv_clear_inbox0_ack()
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| /linux/drivers/gpu/drm/amd/display/dc/dce/ |
| H A D | dmub_psr.h | 40 bool (*psr_copy_settings)(struct dmub_psr *dmub, struct dc_link *link,
42 void (*psr_enable)(struct dmub_psr *dmub, bool enable, bool wait,
44 void (*psr_get_state)(struct dmub_psr *dmub, enum dc_psr_state *dc_psr_state,
46 void (*psr_set_level)(struct dmub_psr *dmub, uint16_t psr_level,
48 void (*psr_force_static)(struct dmub_psr *dmub, uint8_t panel_inst);
49 void (*psr_get_residency)(struct dmub_psr *dmub, uint32_t *residency,
51 void (*psr_set_sink_vtotal_in_psr_active)(struct dmub_psr *dmub,
53 void (*psr_set_power_opt)(struct dmub_psr *dmub, unsigned int power_opt, uint8_t panel_inst);
57 void dmub_psr_destroy(struct dmub_psr **dmub);
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| H A D | dmub_psr.c | 108 static void dmub_psr_get_state(struct dmub_psr *dmub, enum dc_psr_state *state, uint8_t panel_inst) in dmub_psr_get_state() argument
115 if (dc_wake_and_execute_gpint(dmub->ctx, DMUB_GPINT__GET_PSR_STATE, panel_inst, &raw_state, in dmub_psr_get_state()
140 static bool dmub_psr_set_version(struct dmub_psr *dmub, struct dc_stream_state *stream, uint8_t pan… in dmub_psr_set_version() argument
143 struct dc_context *dc = dmub->ctx; in dmub_psr_set_version()
179 static void dmub_psr_enable(struct dmub_psr *dmub, bool enable, bool wait, uint8_t panel_inst) in dmub_psr_enable() argument
182 struct dc_context *dc = dmub->ctx; in dmub_psr_enable()
207 dmub_psr_get_state(dmub, &state, panel_inst); in dmub_psr_enable()
230 static void dmub_psr_set_level(struct dmub_psr *dmub, uint16_t psr_level, uint8_t panel_inst) in dmub_psr_set_level() argument
234 struct dc_context *dc = dmub->ctx; in dmub_psr_set_level()
236 dmub_psr_get_state(dmub, &state, panel_inst); in dmub_psr_set_level()
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| H A D | dmub_replay.c | 24 static void dmub_replay_get_state(struct dmub_replay *dmub, enum replay_state *state, uint8_t panel… in dmub_replay_get_state() argument
30 if (!dc_wake_and_execute_gpint(dmub->ctx, DMUB_GPINT__GET_REPLAY_STATE, panel_inst, in dmub_replay_get_state()
47 static void dmub_replay_enable(struct dmub_replay *dmub, bool enable, bool wait, uint8_t panel_inst) in dmub_replay_enable() argument
50 struct dc_context *dc = dmub->ctx; in dmub_replay_enable()
74 dmub_replay_get_state(dmub, &state, panel_inst); in dmub_replay_enable()
97 static void dmub_replay_set_power_opt(struct dmub_replay *dmub, unsigned int power_opt, uint8_t pan… in dmub_replay_set_power_opt() argument
100 struct dc_context *dc = dmub->ctx; in dmub_replay_set_power_opt()
115 static bool dmub_replay_copy_settings(struct dmub_replay *dmub, in dmub_replay_copy_settings() argument
121 struct dc_context *dc = dmub->ctx; in dmub_replay_copy_settings()
214 static void dmub_replay_set_coasting_vtotal(struct dmub_replay *dmub, in dmub_replay_set_coasting_vtotal() argument
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| /linux/drivers/gpu/drm/amd/display/dmub/src/ |
| H A D | dmub_dcn314.c | 41 #define CTX dmub
42 #define REGS dmub->regs_dcn31
64 bool dmub_dcn314_is_psrsu_supported(struct dmub_srv *dmub) in dmub_dcn314_is_psrsu_supported() argument
66 return dmub->fw_version >= DMUB_FW_VERSION(8, 0, 16); in dmub_dcn314_is_psrsu_supported()
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| H A D | dmub_dcn351.c | 12 #define CTX dmub
13 #define REGS dmub->regs_dcn35
16 void dmub_srv_dcn351_regs_init(struct dmub_srv *dmub, struct dc_context *ctx) in dmub_srv_dcn351_regs_init() argument
18 struct dmub_srv_dcn35_regs *regs = dmub->regs_dcn35; in dmub_srv_dcn351_regs_init()
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| H A D | dmub_dcn30.h | 37 void dmub_dcn30_backdoor_load(struct dmub_srv *dmub,
41 void dmub_dcn30_setup_windows(struct dmub_srv *dmub,
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| H A D | dmub_dcn301.c | 35 #define CTX dmub
36 #define REGS dmub->regs
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| H A D | dmub_dcn303.c | 36 #define CTX dmub
37 #define REGS dmub->regs
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| H A D | dmub_dcn21.c | 35 #define CTX dmub
36 #define REGS dmub->regs
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| H A D | dmub_dcn302.c | 35 #define CTX dmub
36 #define REGS dmub->regs
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| H A D | dmub_dcn316.c | 41 #define CTX dmub
42 #define REGS dmub->regs_dcn31
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| H A D | dmub_dcn315.c | 41 #define CTX dmub
42 #define REGS dmub->regs_dcn31
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| H A D | dmub_dcn314.h | 33 bool dmub_dcn314_is_psrsu_supported(struct dmub_srv *dmub);
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| H A D | dmub_dcn351.h | 11 void dmub_srv_dcn351_regs_init(struct dmub_srv *dmub, struct dc_context *ctx);
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| /linux/drivers/gpu/drm/amd/display/dmub/ |
| H A D | dmub_srv_stat.h | 38 enum dmub_status dmub_srv_stat_get_notification(struct dmub_srv *dmub,
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn32/ |
| H A D | dcn32_hwseq.c | 995 dc->caps.dmub_caps.psr = dc->ctx->dmub_srv->dmub->feature_caps.psr; in dcn32_init_hw()
996 dc->caps.dmub_caps.subvp_psr = dc->ctx->dmub_srv->dmub->feature_caps.subvp_psr_support; in dcn32_init_hw()
997 dc->caps.dmub_caps.gecc_enable = dc->ctx->dmub_srv->dmub->feature_caps.gecc_enable; in dcn32_init_hw()
998 dc->caps.dmub_caps.mclk_sw = dc->ctx->dmub_srv->dmub->feature_caps.fw_assisted_mclk_switch_ver; in dcn32_init_hw()
999 …dc->caps.dmub_caps.aux_backlight_support = dc->ctx->dmub_srv->dmub->feature_caps.abm_aux_backlight… in dcn32_init_hw()
1002 dc->caps.dmub_caps.fams_ver = dc->ctx->dmub_srv->dmub->feature_caps.fw_assisted_mclk_switch_ver; in dcn32_init_hw()
1006 } else if (dc->ctx->dmub_srv->dmub->fw_version < in dcn32_init_hw()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn35/ |
| H A D | dcn35_hwseq.c | 315 dc->caps.dmub_caps.psr = dc->ctx->dmub_srv->dmub->feature_caps.psr; in dcn35_init_hw()
316 dc->caps.dmub_caps.mclk_sw = dc->ctx->dmub_srv->dmub->feature_caps.fw_assisted_mclk_switch_ver; in dcn35_init_hw()
317 …dc->caps.dmub_caps.aux_backlight_support = dc->ctx->dmub_srv->dmub->feature_caps.abm_aux_backlight… in dcn35_init_hw()
1622 volatile struct dmub_cursor_offload_v1 *cs = dc->ctx->dmub_srv->dmub->cursor_offload_v1; in dcn35_begin_cursor_offload_update()
1645 volatile struct dmub_cursor_offload_v1 *cs = dc->ctx->dmub_srv->dmub->cursor_offload_v1; in dcn35_commit_cursor_offload_update()
1663 …shared_stream = &dc->ctx->dmub_srv->dmub->shared_state[DMUB_SHARED_STATE_FEATURE__CURSOR_OFFLOAD_V… in dcn35_commit_cursor_offload_update()
1674 volatile struct dmub_cursor_offload_v1 *cs = dc->ctx->dmub_srv->dmub->cursor_offload_v1; in dcn35_update_cursor_offload_pipe()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn31/ |
| H A D | dcn31_hwseq.c | 275 dc->caps.dmub_caps.psr = dc->ctx->dmub_srv->dmub->feature_caps.psr; in dcn31_init_hw()
276 dc->caps.dmub_caps.mclk_sw = dc->ctx->dmub_srv->dmub->feature_caps.fw_assisted_mclk_switch_ver; in dcn31_init_hw()
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| /linux/drivers/gpu/drm/amd/display/amdgpu_dm/ |
| H A D | amdgpu_dm_debugfs.c | 1034 if (dc->ctx->dmub_srv && dc->ctx->dmub_srv->dmub) in replay_capability_show()
1036 (bool)dc->ctx->dmub_srv->dmub->feature_caps.replay_supported; in replay_capability_show()
2693 if (dc_dmub_srv && dc_dmub_srv->dmub) { in ips_status_show()
2696 &dc_dmub_srv->dmub->shared_state[DMUB_SHARED_SHARE_FEATURE__IPS_FW].data.ips_fw; in ips_status_show()
3311 struct dmub_srv *srv = adev->dm.dc->ctx->dmub_srv->dmub; in dmub_trace_mask_set()
3355 struct dmub_srv *srv = adev->dm.dc->ctx->dmub_srv->dmub; in dmub_trace_mask_show()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn30/ |
| H A D | dcn30_hwseq.c | 829 dc->caps.dmub_caps.psr = dc->ctx->dmub_srv->dmub->feature_caps.psr; in dcn30_init_hw()
830 dc->caps.dmub_caps.mclk_sw = dc->ctx->dmub_srv->dmub->feature_caps.fw_assisted_mclk_switch_ver; in dcn30_init_hw()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn401/ |
| H A D | dcn401_hwseq.c | 360 dc->caps.dmub_caps.psr = dc->ctx->dmub_srv->dmub->feature_caps.psr; in dcn401_init_hw()
361 …dc->caps.dmub_caps.mclk_sw = dc->ctx->dmub_srv->dmub->feature_caps.fw_assisted_mclk_switch_ver > 0; in dcn401_init_hw()
362 dc->caps.dmub_caps.fams_ver = dc->ctx->dmub_srv->dmub->feature_caps.fw_assisted_mclk_switch_ver; in dcn401_init_hw()
2983 volatile struct dmub_cursor_offload_v1 *cs = dc->ctx->dmub_srv->dmub->cursor_offload_v1; in dcn401_update_cursor_offload_pipe()
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| /linux/drivers/gpu/drm/amd/display/dmub/inc/ |
| H A D | dmub_cmd.h | 7207 void *dmub; /**< Pointer to the DMUB interface */ member
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| /linux/drivers/gpu/drm/amd/display/dc/core/ |
| H A D | dc.c | 1303 memcpy(color, &dc->ctx->dmub_srv->dmub->visual_confirm_color, sizeof(struct tg_color)); in dc_get_visual_confirm_for_stream()
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