Searched refs:dml (Results 1 – 10 of 10) sorted by relevance
459 …context->bw_ctx.dml.soc.dram_clock_change_latency_us = dc->clk_mgr->bw_params->wm_table.entries[WM… in dcn31_update_soc_for_wm_a()460 …context->bw_ctx.dml.soc.sr_enter_plus_exit_time_us = dc->clk_mgr->bw_params->wm_table.entries[WM_A… in dcn31_update_soc_for_wm_a()461 …context->bw_ctx.dml.soc.sr_exit_time_us = dc->clk_mgr->bw_params->wm_table.entries[WM_A].sr_exit_t… in dcn31_update_soc_for_wm_a()471 …if (context->bw_ctx.dml.vba.DRAMClockChangeSupport[context->bw_ctx.dml.vba.VoltageLevel][context->… in dcn315_update_soc_for_wm_a()472 …context->bw_ctx.dml.soc.dram_clock_change_latency_us = context->bw_ctx.dml.soc.dummy_pstate_latenc… in dcn315_update_soc_for_wm_a()474 …context->bw_ctx.dml.soc.dram_clock_change_latency_us = dc->clk_mgr->bw_params->wm_table.entries[WM… in dcn315_update_soc_for_wm_a()475 context->bw_ctx.dml.soc.sr_enter_plus_exit_time_us = in dcn315_update_soc_for_wm_a()477 context->bw_ctx.dml.soc.sr_exit_time_us = in dcn315_update_soc_for_wm_a()489 double dcfclk = context->bw_ctx.dml.vba.DCFCLKState[vlevel][context->bw_ctx.dml.vba.maxMpcComb]; in dcn31_calculate_wm_and_dlg_fp()494 if (context->bw_ctx.dml.soc.min_dcfclk > dcfclk) in dcn31_calculate_wm_and_dlg_fp()[all …]
321 dc->dml.soc.dispclk_dppclk_vco_speed_mhz = max_dispclk_mhz * 2; in dcn35_update_bw_bounding_box_fpu()349 dml_init_instance(&dc->dml, &dcn3_5_soc, &dcn3_5_ip, in dcn35_update_bw_bounding_box_fpu()530 context->bw_ctx.dml.ip.det_buffer_size_kbytes = 384;/*per guide*/ in dcn35_populate_dml_pipes_from_context_fpu()544 context->bw_ctx.dml.ip.det_buffer_size_kbytes = 192; in dcn35_populate_dml_pipes_from_context_fpu()550 context->bw_ctx.dml.ip.det_buffer_size_kbytes = in dcn35_populate_dml_pipes_from_context_fpu()553 context->bw_ctx.dml.ip.det_buffer_size_kbytes = 192; in dcn35_populate_dml_pipes_from_context_fpu()568 context->bw_ctx.dml.vba.ODMCombinePolicy = in dcn35_populate_dml_pipes_from_context_fpu()601 bool allow_z8 = context->bw_ctx.dml.vba.StutterPeriod > (double)minmum_z8_residency; in dcn35_decide_zstate_support()604 bool allow_z10 = context->bw_ctx.dml.vba.StutterPeriod > (double)minmum_z10_residency; in dcn35_decide_zstate_support()617 (int)context->bw_ctx.dml.vba.StutterPeriod); in dcn35_decide_zstate_support()
133 struct display_mode_lib *dml = &dc->dml; in dcn10_resource_construct_fp() local135 dml->ip.max_num_dpp = 3; in dcn10_resource_construct_fp()
355 dc->dml.soc.dispclk_dppclk_vco_speed_mhz = max_dispclk_mhz * 2; in dcn351_update_bw_bounding_box_fpu()383 dml_init_instance(&dc->dml, &dcn3_51_soc, &dcn3_51_ip, in dcn351_update_bw_bounding_box_fpu()563 context->bw_ctx.dml.ip.det_buffer_size_kbytes = 384;/*per guide*/ in dcn351_populate_dml_pipes_from_context_fpu()577 context->bw_ctx.dml.ip.det_buffer_size_kbytes = 192; in dcn351_populate_dml_pipes_from_context_fpu()583 context->bw_ctx.dml.ip.det_buffer_size_kbytes = in dcn351_populate_dml_pipes_from_context_fpu()586 context->bw_ctx.dml.ip.det_buffer_size_kbytes = 192; in dcn351_populate_dml_pipes_from_context_fpu()601 context->bw_ctx.dml.vba.ODMCombinePolicy = in dcn351_populate_dml_pipes_from_context_fpu()632 bool allow_z8 = context->bw_ctx.dml.vba.StutterPeriod > (double)minmum_z8_residency; in dcn351_decide_zstate_support()
711 struct vba_vars_st *vba = &context->bw_ctx.dml.vba; in dcn32_subvp_vblank_admissable()
2416 if (context->bw_ctx.dml.ip.min_comp_buffer_size_kbytes) { in dcn20_prepare_bandwidth()2417 compbuf_size_kb = context->bw_ctx.dml.ip.min_comp_buffer_size_kbytes; in dcn20_prepare_bandwidth()2418 …dc->optimized_required |= (compbuf_size_kb != dc->current_state->bw_ctx.dml.ip.min_comp_buffer_siz… in dcn20_prepare_bandwidth()
1755 struct display_mode_lib dml; member
642 struct vba_vars_st *vba = &context->bw_ctx.dml.vba; in set_p_state_switch_method()
1032 dc->dml.logger = dc_ctx->logger; in dc_construct_ctx()
1095 F: drivers/gpu/drm/amd/display/dc/dml/