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Searched refs:div2 (Results 1 – 25 of 41) sorted by relevance

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/linux/drivers/clk/
H A Dclk-vt8500.c457 int div1, div2; in wm8750_find_pll_bits() local
464 for (div2 = 7; div2 >= 0; div2--) in wm8750_find_pll_bits()
466 tclk = parent_rate * (mul + 1) / ((div1 + 1) * (1 << div2)); in wm8750_find_pll_bits()
475 *divisor2 = div2; in wm8750_find_pll_bits()
483 *divisor2 = div2; in wm8750_find_pll_bits()
505 int div1, div2; in wm8850_find_pll_bits() local
512 for (div2 = 3; div2 >= 0; div2--) in wm8850_find_pll_bits()
515 ((div1 + 1) * (1 << div2)); in wm8850_find_pll_bits()
523 *divisor2 = div2; in wm8850_find_pll_bits()
531 *divisor2 = div2; in wm8850_find_pll_bits()
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/linux/drivers/clk/uniphier/
H A Dclk-uniphier.h114 #define UNIPHIER_CLK_DIV3(parent, div0, div1, div2) \ argument
116 UNIPHIER_CLK_DIV(parent, div2)
118 #define UNIPHIER_CLK_DIV4(parent, div0, div1, div2, div3) \ argument
120 UNIPHIER_CLK_DIV2(parent, div2, div3)
122 #define UNIPHIER_CLK_DIV5(parent, div0, div1, div2, div3, div4) \ argument
123 UNIPHIER_CLK_DIV4(parent, div0, div1, div2, div3), \
/linux/drivers/clk/tegra/
H A Dclk-tegra-super-cclk.c54 unsigned int div2; in cclk_super_recalc_rate() local
58 div2 = 1; in cclk_super_recalc_rate()
60 div2 = 0; in cclk_super_recalc_rate()
63 return parent_rate >> div2; in cclk_super_recalc_rate()
65 return tegra_clk_super_ops.recalc_rate(hw, parent_rate) >> div2; in cclk_super_recalc_rate()
/linux/drivers/clk/imx/
H A Dclk-composite-8m.c54 int div1, div2; in imx8m_clk_composite_compute_dividers() local
62 for (div2 = 1; div2 <= PCG_DIV_MAX; div2++) { in imx8m_clk_composite_compute_dividers()
63 int new_error = ((parent_rate / div1) / div2) - rate; in imx8m_clk_composite_compute_dividers()
67 *postdiv = div2; in imx8m_clk_composite_compute_dividers()
/linux/arch/microblaze/lib/
H A Ddivsi3.S38 blti r5, div2 /* this traps r5 == 0x80000000 */
43 div2: label
56 bri div2 /* div2 */
H A Dudivsi3.S52 blti r5, div2
57 div2: label
70 bri div2 /* div2 */
H A Dumodsi3.S54 blti r5, div2
59 div2: label
72 bri div2 /* div2 */
H A Dmodsi3.S43 div2: label
56 bri div2 /* div2 */
/linux/drivers/gpu/drm/nouveau/nvkm/engine/disp/
H A Dga102.c89 u32 div2 = 0; in ga102_sor_clock() local
93 div2 = 1; in ga102_sor_clock()
97 nvkm_wr32(device, 0x00ec04 + (sor->id * 0x10), div2); in ga102_sor_clock()
/linux/arch/sh/kernel/cpu/sh4a/
H A Dclock-sh7757.c48 static unsigned int div2[] = { 1, 1, 2, 1, 1, 4, 1, 6, variable
52 .divisors = div2,
53 .nr_divisors = ARRAY_SIZE(div2),
H A Dclock-shx3.c47 static unsigned int div2[] = { 1, 2, 4, 6, 8, 12, 16, 18, variable
51 .divisors = div2,
52 .nr_divisors = ARRAY_SIZE(div2),
H A Dclock-sh7785.c51 static unsigned int div2[] = { 1, 2, 4, 6, 8, 12, 16, 18, variable
55 .divisors = div2,
56 .nr_divisors = ARRAY_SIZE(div2),
H A Dclock-sh7786.c53 static unsigned int div2[] = { 1, 2, 4, 6, 8, 12, 16, 18, variable
57 .divisors = div2,
58 .nr_divisors = ARRAY_SIZE(div2),
/linux/arch/sh/kernel/cpu/sh2a/
H A Dclock-sh7264.c63 static int div2[] = { 1, 2, 3, 4, 6, 8, 12 }; variable
66 .divisors = div2,
67 .nr_divisors = ARRAY_SIZE(div2),
H A Dclock-sh7269.c91 static int div2[] = { 1, 2, 0, 4 }; variable
94 .divisors = div2,
95 .nr_divisors = ARRAY_SIZE(div2),
/linux/drivers/media/tuners/
H A Dmt2131.c89 u32 div1, num1, div2, num2; in mt2131_set_params() local
111 div2 = num2 / 8192; in mt2131_set_params()
140 b[6] = div2; in mt2131_set_params()
146 (int)div1, (int)num1, (int)div2, (int)num2); in mt2131_set_params()
H A Dmt2060.c196 u32 div1,num1,div2,num2; in mt2060_set_params() local
233 div2 = num2 / 8192; in mt2060_set_params()
252 b[5] = ((num2 >>12) & 1) | (div2 << 1); in mt2060_set_params()
256 dprintk("PLL div1=%d num1=%d div2=%d num2=%d",(int)div1,(int)num1,(int)div2,(int)num2); in mt2060_set_params()
/linux/drivers/spi/
H A Dspi-omap-uwire.c315 int div2; in uwire_setup_transfer() local
372 div2 = (rate / div1 + hz - 1) / hz; in uwire_setup_transfer()
373 if (div2 <= 8) in uwire_setup_transfer()
391 switch (div2) { in uwire_setup_transfer()
/linux/drivers/clk/sophgo/
H A Dclk-sg2044-pll.c173 unsigned int div1, div2; in sg2042_pll_compute_postdiv() local
177 for_each_pll_limit_range(div2, &limits[PLL_LIMIT_POSTDIV2]) { in sg2042_pll_compute_postdiv()
181 div1, div2); in sg2042_pll_compute_postdiv()
188 best_div2 = div2; in sg2042_pll_compute_postdiv()
/linux/arch/mips/alchemy/common/
H A Dclock.c383 long div1, div2; in alchemy_calc_div() local
394 div2 = (div1 / scale) - 1; /* value to write to register */ in alchemy_calc_div()
396 if (div2 > maxdiv) in alchemy_calc_div()
397 div2 = maxdiv; in alchemy_calc_div()
399 *rv = div2; in alchemy_calc_div()
401 div1 = ((div2 + 1) * scale); in alchemy_calc_div()
/linux/drivers/comedi/drivers/
H A Dadl_pci9118.c532 unsigned int *div1, unsigned int *div2, in pci9118_calc_divisors() argument
539 *div2 = *tim1 / pacer->osc_base; /* scan timer */ in pci9118_calc_divisors()
540 *div2 = *div2 / *div1; /* major timer is c1*c2 */ in pci9118_calc_divisors()
541 if (*div2 < chans) in pci9118_calc_divisors()
542 *div2 = chans; in pci9118_calc_divisors()
548 if (*div2 < (chans + 2)) in pci9118_calc_divisors()
549 *div2 = chans + 2; in pci9118_calc_divisors()
552 *tim1 = *div1 * *div2 * pacer->osc_base; in pci9118_calc_divisors()
/linux/drivers/video/fbdev/
H A Dcyber2000fb.c658 u_int div2, t_div1, best_div1, best_mult; in cyber2000fb_decode_clock() local
667 for (div2 = 0; div2 < 4; div2++) { in cyber2000fb_decode_clock()
670 new_pll = pll_ps / cfb->divisors[div2]; in cyber2000fb_decode_clock()
677 if (div2 == 4) in cyber2000fb_decode_clock()
733 hw->clock_div = div2 << 6 | (best_div1 - 1); in cyber2000fb_decode_clock()
/linux/drivers/clk/pxa/
H A Dclk-pxa.h140 unsigned int div2; member
H A Dclk-pxa.c186 if (freq->div2) { in pxa2xx_cpll_change()
/linux/drivers/media/dvb-frontends/
H A Dstb0899_algo.c1274 int div1, div2, rem1, rem2; in stb0899_dvbs2_get_srate() local
1277 div2 = config->btr_nco_bits - div1 - 1; in stb0899_dvbs2_get_srate()
1286 intval2 = bTrNomFreq / (1 << div2); in stb0899_dvbs2_get_srate()
1289 rem2 = bTrNomFreq % (1 << div2); in stb0899_dvbs2_get_srate()
1291 srate = (intval1 * intval2) + ((intval1 * rem2) / (1 << div2)) + ((intval2 * rem1) / (1 << div1)); in stb0899_dvbs2_get_srate()

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