1*add5ca2cSKuninori Morimoto // SPDX-License-Identifier: GPL-2.0
232351a28SPaul Mundt /*
332351a28SPaul Mundt * arch/sh/kernel/cpu/sh4a/clock-sh7785.c
432351a28SPaul Mundt *
532351a28SPaul Mundt * SH7785 support for the clock framework
632351a28SPaul Mundt *
7c55fbdd3SPaul Mundt * Copyright (C) 2007 - 2010 Paul Mundt
832351a28SPaul Mundt */
932351a28SPaul Mundt #include <linux/init.h>
1032351a28SPaul Mundt #include <linux/kernel.h>
11a77b5ac0SPaul Mundt #include <linux/clk.h>
12a77b5ac0SPaul Mundt #include <linux/io.h>
13cc96eaceSPaul Mundt #include <linux/cpufreq.h>
146d803ba7SJean-Christop PLAGNIOL-VILLARD #include <linux/clkdev.h>
1532351a28SPaul Mundt #include <asm/clock.h>
1632351a28SPaul Mundt #include <asm/freq.h>
171823f6d5SMagnus Damm #include <cpu/sh7785.h>
1832351a28SPaul Mundt
1943909a93SMagnus Damm /*
2043909a93SMagnus Damm * Default rate for the root input clock, reset this with clk_set_rate()
2143909a93SMagnus Damm * from the platform code.
2243909a93SMagnus Damm */
2343909a93SMagnus Damm static struct clk extal_clk = {
2443909a93SMagnus Damm .rate = 33333333,
2532351a28SPaul Mundt };
2632351a28SPaul Mundt
pll_recalc(struct clk * clk)27c9904dd1SMagnus Damm static unsigned long pll_recalc(struct clk *clk)
28c9904dd1SMagnus Damm {
291823f6d5SMagnus Damm int multiplier;
301823f6d5SMagnus Damm
310d4fdbb6SMagnus Damm multiplier = test_mode_pin(MODE_PIN4) ? 36 : 72;
321823f6d5SMagnus Damm
331823f6d5SMagnus Damm return clk->parent->rate * multiplier;
34c9904dd1SMagnus Damm }
35c9904dd1SMagnus Damm
3633cb61a4SMagnus Damm static struct sh_clk_ops pll_clk_ops = {
37c9904dd1SMagnus Damm .recalc = pll_recalc,
38c9904dd1SMagnus Damm };
39c9904dd1SMagnus Damm
40c9904dd1SMagnus Damm static struct clk pll_clk = {
41c9904dd1SMagnus Damm .ops = &pll_clk_ops,
42c9904dd1SMagnus Damm .parent = &extal_clk,
43c9904dd1SMagnus Damm .flags = CLK_ENABLE_ON_INIT,
44c9904dd1SMagnus Damm };
45c9904dd1SMagnus Damm
46a77b5ac0SPaul Mundt static struct clk *clks[] = {
47a77b5ac0SPaul Mundt &extal_clk,
48c9904dd1SMagnus Damm &pll_clk,
4943909a93SMagnus Damm };
5043909a93SMagnus Damm
5143909a93SMagnus Damm static unsigned int div2[] = { 1, 2, 4, 6, 8, 12, 16, 18,
5243909a93SMagnus Damm 24, 32, 36, 48 };
5343909a93SMagnus Damm
540a5f337eSMagnus Damm static struct clk_div_mult_table div4_div_mult_table = {
5543909a93SMagnus Damm .divisors = div2,
5643909a93SMagnus Damm .nr_divisors = ARRAY_SIZE(div2),
5743909a93SMagnus Damm };
5843909a93SMagnus Damm
590a5f337eSMagnus Damm static struct clk_div4_table div4_table = {
600a5f337eSMagnus Damm .div_mult_table = &div4_div_mult_table,
610a5f337eSMagnus Damm };
620a5f337eSMagnus Damm
6343909a93SMagnus Damm enum { DIV4_I, DIV4_U, DIV4_SH, DIV4_B, DIV4_DDR, DIV4_GA,
6443909a93SMagnus Damm DIV4_DU, DIV4_P, DIV4_NR };
6543909a93SMagnus Damm
66914ebf0bSMagnus Damm #define DIV4(_bit, _mask, _flags) \
67914ebf0bSMagnus Damm SH_CLK_DIV4(&pll_clk, FRQMR1, _bit, _mask, _flags)
6843909a93SMagnus Damm
6943909a93SMagnus Damm struct clk div4_clks[DIV4_NR] = {
70914ebf0bSMagnus Damm [DIV4_P] = DIV4(0, 0x0f80, 0),
71914ebf0bSMagnus Damm [DIV4_DU] = DIV4(4, 0x0ff0, 0),
72914ebf0bSMagnus Damm [DIV4_GA] = DIV4(8, 0x0030, 0),
73914ebf0bSMagnus Damm [DIV4_DDR] = DIV4(12, 0x000c, CLK_ENABLE_ON_INIT),
74914ebf0bSMagnus Damm [DIV4_B] = DIV4(16, 0x0fe0, CLK_ENABLE_ON_INIT),
75914ebf0bSMagnus Damm [DIV4_SH] = DIV4(20, 0x000c, CLK_ENABLE_ON_INIT),
76914ebf0bSMagnus Damm [DIV4_U] = DIV4(24, 0x000c, CLK_ENABLE_ON_INIT),
77914ebf0bSMagnus Damm [DIV4_I] = DIV4(28, 0x000e, CLK_ENABLE_ON_INIT),
7832351a28SPaul Mundt };
7932351a28SPaul Mundt
80549b5e35SPaul Mundt #define MSTPCR0 0xffc80030
81549b5e35SPaul Mundt #define MSTPCR1 0xffc80034
82549b5e35SPaul Mundt
835b10a27eSMagnus Damm enum { MSTP029, MSTP028, MSTP027, MSTP026, MSTP025, MSTP024,
845b10a27eSMagnus Damm MSTP021, MSTP020, MSTP017, MSTP016,
855b10a27eSMagnus Damm MSTP013, MSTP012, MSTP009, MSTP008, MSTP003, MSTP002,
865b10a27eSMagnus Damm MSTP119, MSTP117, MSTP105, MSTP104, MSTP100,
875b10a27eSMagnus Damm MSTP_NR };
885b10a27eSMagnus Damm
895b10a27eSMagnus Damm static struct clk mstp_clks[MSTP_NR] = {
90549b5e35SPaul Mundt /* MSTPCR0 */
91c77a9c3eSMagnus Damm [MSTP029] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 29, 0),
92c77a9c3eSMagnus Damm [MSTP028] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 28, 0),
93c77a9c3eSMagnus Damm [MSTP027] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 27, 0),
94c77a9c3eSMagnus Damm [MSTP026] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 26, 0),
95c77a9c3eSMagnus Damm [MSTP025] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 25, 0),
96c77a9c3eSMagnus Damm [MSTP024] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 24, 0),
97c77a9c3eSMagnus Damm [MSTP021] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 21, 0),
98c77a9c3eSMagnus Damm [MSTP020] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 20, 0),
99c77a9c3eSMagnus Damm [MSTP017] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 17, 0),
100c77a9c3eSMagnus Damm [MSTP016] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 16, 0),
101c77a9c3eSMagnus Damm [MSTP013] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 13, 0),
102c77a9c3eSMagnus Damm [MSTP012] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 12, 0),
103c77a9c3eSMagnus Damm [MSTP009] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 9, 0),
104c77a9c3eSMagnus Damm [MSTP008] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 8, 0),
105c77a9c3eSMagnus Damm [MSTP003] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 3, 0),
106c77a9c3eSMagnus Damm [MSTP002] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 2, 0),
107549b5e35SPaul Mundt
108549b5e35SPaul Mundt /* MSTPCR1 */
109c77a9c3eSMagnus Damm [MSTP119] = SH_CLK_MSTP32(NULL, MSTPCR1, 19, 0),
110c77a9c3eSMagnus Damm [MSTP117] = SH_CLK_MSTP32(NULL, MSTPCR1, 17, 0),
111c77a9c3eSMagnus Damm [MSTP105] = SH_CLK_MSTP32(NULL, MSTPCR1, 5, 0),
112c77a9c3eSMagnus Damm [MSTP104] = SH_CLK_MSTP32(NULL, MSTPCR1, 4, 0),
113c77a9c3eSMagnus Damm [MSTP100] = SH_CLK_MSTP32(NULL, MSTPCR1, 0, 0),
114549b5e35SPaul Mundt };
115549b5e35SPaul Mundt
116c55fbdd3SPaul Mundt static struct clk_lookup lookups[] = {
1174a81fe62SMagnus Damm /* main clocks */
1184a81fe62SMagnus Damm CLKDEV_CON_ID("extal", &extal_clk),
1194a81fe62SMagnus Damm CLKDEV_CON_ID("pll_clk", &pll_clk),
1204a81fe62SMagnus Damm
121956f7f44SMagnus Damm /* DIV4 clocks */
122956f7f44SMagnus Damm CLKDEV_CON_ID("peripheral_clk", &div4_clks[DIV4_P]),
123956f7f44SMagnus Damm CLKDEV_CON_ID("du_clk", &div4_clks[DIV4_DU]),
124956f7f44SMagnus Damm CLKDEV_CON_ID("ga_clk", &div4_clks[DIV4_GA]),
125956f7f44SMagnus Damm CLKDEV_CON_ID("ddr_clk", &div4_clks[DIV4_DDR]),
126956f7f44SMagnus Damm CLKDEV_CON_ID("bus_clk", &div4_clks[DIV4_B]),
127956f7f44SMagnus Damm CLKDEV_CON_ID("shyway_clk", &div4_clks[DIV4_SH]),
128956f7f44SMagnus Damm CLKDEV_CON_ID("umem_clk", &div4_clks[DIV4_U]),
129956f7f44SMagnus Damm CLKDEV_CON_ID("cpu_clk", &div4_clks[DIV4_I]),
130956f7f44SMagnus Damm
131eb85dcaaSMagnus Damm /* MSTP32 clocks */
132fa3d39bfSLaurent Pinchart CLKDEV_ICK_ID("fck", "sh-sci.5", &mstp_clks[MSTP029]),
133fa3d39bfSLaurent Pinchart CLKDEV_ICK_ID("fck", "sh-sci.4", &mstp_clks[MSTP028]),
134fa3d39bfSLaurent Pinchart CLKDEV_ICK_ID("fck", "sh-sci.3", &mstp_clks[MSTP027]),
135fa3d39bfSLaurent Pinchart CLKDEV_ICK_ID("fck", "sh-sci.2", &mstp_clks[MSTP026]),
136fa3d39bfSLaurent Pinchart CLKDEV_ICK_ID("fck", "sh-sci.1", &mstp_clks[MSTP025]),
137fa3d39bfSLaurent Pinchart CLKDEV_ICK_ID("fck", "sh-sci.0", &mstp_clks[MSTP024]),
1389b81308bSKuninori Morimoto
139eb85dcaaSMagnus Damm CLKDEV_CON_ID("ssi1_fck", &mstp_clks[MSTP021]),
140eb85dcaaSMagnus Damm CLKDEV_CON_ID("ssi0_fck", &mstp_clks[MSTP020]),
141eb85dcaaSMagnus Damm CLKDEV_CON_ID("hac1_fck", &mstp_clks[MSTP017]),
142eb85dcaaSMagnus Damm CLKDEV_CON_ID("hac0_fck", &mstp_clks[MSTP016]),
143eb85dcaaSMagnus Damm CLKDEV_CON_ID("mmcif_fck", &mstp_clks[MSTP013]),
144eb85dcaaSMagnus Damm CLKDEV_CON_ID("flctl_fck", &mstp_clks[MSTP012]),
1459b81308bSKuninori Morimoto
1461399c195SLaurent Pinchart CLKDEV_ICK_ID("fck", "sh-tmu.0", &mstp_clks[MSTP008]),
1471399c195SLaurent Pinchart CLKDEV_ICK_ID("fck", "sh-tmu.1", &mstp_clks[MSTP009]),
1489b81308bSKuninori Morimoto
149eb85dcaaSMagnus Damm CLKDEV_CON_ID("siof_fck", &mstp_clks[MSTP003]),
150eb85dcaaSMagnus Damm CLKDEV_CON_ID("hspi_fck", &mstp_clks[MSTP002]),
151eb85dcaaSMagnus Damm CLKDEV_CON_ID("hudi_fck", &mstp_clks[MSTP119]),
152948c46a1SThomas Schwinge CLKDEV_CON_ID("ubc0", &mstp_clks[MSTP117]),
153eb85dcaaSMagnus Damm CLKDEV_CON_ID("dmac_11_6_fck", &mstp_clks[MSTP105]),
154eb85dcaaSMagnus Damm CLKDEV_CON_ID("dmac_5_0_fck", &mstp_clks[MSTP104]),
155eb85dcaaSMagnus Damm CLKDEV_CON_ID("gdta_fck", &mstp_clks[MSTP100]),
156c55fbdd3SPaul Mundt };
157c55fbdd3SPaul Mundt
arch_clk_init(void)1589fe5ee0eSPaul Mundt int __init arch_clk_init(void)
15932351a28SPaul Mundt {
160f5c84cf5SPaul Mundt int i, ret = 0;
16132351a28SPaul Mundt
162a77b5ac0SPaul Mundt for (i = 0; i < ARRAY_SIZE(clks); i++)
163a77b5ac0SPaul Mundt ret |= clk_register(clks[i]);
1648a7711fcSRussell King
1658a7711fcSRussell King clkdev_add_table(lookups, ARRAY_SIZE(lookups));
166e89d53e6SMagnus Damm
167e89d53e6SMagnus Damm if (!ret)
16843909a93SMagnus Damm ret = sh_clk_div4_register(div4_clks, ARRAY_SIZE(div4_clks),
16943909a93SMagnus Damm &div4_table);
17043909a93SMagnus Damm if (!ret)
171ad3337cbSNobuhiro Iwamatsu ret = sh_clk_mstp_register(mstp_clks, MSTP_NR);
17232351a28SPaul Mundt
173f5c84cf5SPaul Mundt return ret;
17432351a28SPaul Mundt }
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