| /linux/Documentation/ABI/testing/ |
| H A D | debugfs-driver-dcc | 1 What: /sys/kernel/debug/dcc/.../ready
5 This file is used to check the status of the dcc
7 A 'Y' here indicates dcc is ready.
9 What: /sys/kernel/debug/dcc/.../trigger
17 What: /sys/kernel/debug/dcc/.../config_reset
22 a dcc driver to the default configuration. When '1'
27 What: /sys/kernel/debug/dcc/.../[list-number]/config
34 can be one of following dcc instructions: read,
45 echo R <addr> <n> <bus> >/sys/kernel/debug/dcc/../[list-number]/config
65 echo W <addr> <n> <bus type> > /sys/kernel/debug/dcc/../[list-number]/config
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| /linux/drivers/gpu/drm/amd/display/amdgpu_dm/tests/ |
| H A D | amdgpu_dm_plane_test.c | 80 struct dc_plane_dcc_param *dcc, in dm_test_init_validate_dcc_inputs() argument
94 dcc->enable = 1; in dm_test_init_validate_dcc_inputs()
95 dcc->independent_64b_blks = 1; in dm_test_init_validate_dcc_inputs()
521 struct dc_plane_dcc_param dcc = {0}; in dm_test_fill_gfx12_plane_attributes_from_modifiers() local
558 ROTATION_ANGLE_0, &plane_size, &tiling_info, &dcc, &address), in dm_test_fill_gfx12_plane_attributes_from_modifiers()
561 KUNIT_EXPECT_TRUE(test, dcc.enable); in dm_test_fill_gfx12_plane_attributes_from_modifiers()
562 KUNIT_EXPECT_EQ(test, (int)dcc.dcc_ind_blk, (int)hubp_ind_block_128b); in dm_test_fill_gfx12_plane_attributes_from_modifiers()
579 struct dc_plane_dcc_param dcc = {0}; in dm_test_fill_gfx9_plane_attributes_from_modifiers() local
602 ROTATION_ANGLE_0, &plane_size, &tiling_info, &dcc, &address), in dm_test_fill_gfx9_plane_attributes_from_modifiers()
606 KUNIT_EXPECT_FALSE(test, dcc.enable); in dm_test_fill_gfx9_plane_attributes_from_modifiers()
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| /linux/fs/f2fs/ |
| H A D | segment.c | 1016 struct discard_cmd_control *dcc = SM_I(sbi)->dcc_info; in __create_discard_cmd() local
1022 pend_list = &dcc->pend_list[plist_idx(len)]; in __create_discard_cmd()
1038 atomic_inc(&dcc->discard_cmd_cnt); in __create_discard_cmd()
1039 dcc->undiscard_blks += len; in __create_discard_cmd()
1047 struct discard_cmd_control *dcc = SM_I(sbi)->dcc_info; in f2fs_check_discard_tree() local
1048 struct rb_node *cur = rb_first_cached(&dcc->root), *next; in f2fs_check_discard_tree()
1075 struct discard_cmd_control *dcc = SM_I(sbi)->dcc_info; in __lookup_discard_cmd() local
1076 struct rb_node *node = dcc->root.rb_root.rb_node; in __lookup_discard_cmd()
1149 static void __detach_discard_cmd(struct discard_cmd_control *dcc, in __detach_discard_cmd() argument
1153 atomic_sub(dc->queued, &dcc->queued_discard); in __detach_discard_cmd()
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| H A D | segment.h | 1017 struct discard_cmd_control *dcc = SM_I(sbi)->dcc_info; in wake_up_discard_thread() local
1024 mutex_lock(&dcc->cmd_lock); in wake_up_discard_thread()
1026 if (i + 1 < dcc->discard_granularity) in wake_up_discard_thread()
1028 if (!list_empty(&dcc->pend_list[i])) { in wake_up_discard_thread()
1033 mutex_unlock(&dcc->cmd_lock); in wake_up_discard_thread()
1037 dcc->discard_wake = true; in wake_up_discard_thread()
1038 wake_up_interruptible_all(&dcc->discard_wait_queue); in wake_up_discard_thread()
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| H A D | sysfs.c | 1834 struct discard_cmd_control *dcc = SM_I(sbi)->dcc_info; in discard_plist_seq_show() local
1841 if (dcc) { in discard_plist_seq_show()
1842 mutex_lock(&dcc->cmd_lock); in discard_plist_seq_show()
1850 pend_list = &dcc->pend_list[i]; in discard_plist_seq_show()
1861 mutex_unlock(&dcc->cmd_lock); in discard_plist_seq_show()
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| /linux/drivers/gpu/drm/amd/display/dc/hubp/dcn201/ |
| H A D | dcn201_hubp.c | 48 struct dc_plane_dcc_param *dcc, in hubp201_program_surface_config() argument
52 hubp1_dcc_control(hubp, dcc->enable, dcc->independent_64b_blks); in hubp201_program_surface_config()
54 hubp1_program_size(hubp, format, plane_size, dcc); in hubp201_program_surface_config()
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| /linux/drivers/bus/ |
| H A D | vexpress-config.c | 108 u32 *position, u32 *dcc) in vexpress_config_get_topo() argument
116 vexpress_config_find_prop(node, "arm,vexpress,dcc", dcc); in vexpress_config_get_topo()
257 u32 site, position, dcc; in vexpress_syscfg_regmap_init() local
261 &position, &dcc); in vexpress_syscfg_regmap_init()
301 func, site, position, dcc, in vexpress_syscfg_regmap_init()
304 func->template[i] = SYS_CFGCTRL_DCC(dcc); in vexpress_syscfg_regmap_init()
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| /linux/drivers/gpu/drm/amd/display/amdgpu_dm/ |
| H A D | amdgpu_dm_plane.c | 287 const struct dc_plane_dcc_param *dcc, in amdgpu_dm_plane_fill_gfx9_tiling_info_from_modifier()
298 if (!dcc->enable) in amdgpu_dm_plane_fill_gfx9_tiling_info_from_modifier()
325 if (dcc->independent_64b_blks == 0 && in amdgpu_dm_plane_validate_dcc()
339 struct dc_plane_dcc_param *dcc, in amdgpu_dm_plane_validate_dcc()
354 dcc->enable = 1; in amdgpu_dm_plane_fill_gfx9_attrs_from_modifiers()
355 dcc->meta_pitch = afb->base.pitches[1]; in amdgpu_dm_plane_fill_gfx9_attrs_from_modifiers()
356 dcc->independent_64b_blks = independent_64b_blks; in amdgpu_dm_plane_fill_gfx9_attrs_from_modifiers()
359 dcc->dcc_ind_blk = hubp_ind_block_64b_no_128bcl; in amdgpu_dm_plane_fill_gfx9_attrs_from_modifiers()
361 dcc->dcc_ind_blk = hubp_ind_block_128b; in amdgpu_dm_plane_fill_gfx9_attrs_from_modifiers()
363 dcc in amdgpu_dm_plane_fill_gfx9_attrs_from_modifiers()
305 amdgpu_dm_plane_validate_dcc(struct amdgpu_device * adev,const enum surface_pixel_format format,const enum dc_rotation_angle rotation,const struct dc_tiling_info * tiling_info,const struct dc_plane_dcc_param * dcc,const struct dc_plane_address * address,const struct plane_size * plane_size) amdgpu_dm_plane_validate_dcc() argument
357 amdgpu_dm_plane_fill_gfx9_attrs_from_modifiers(struct amdgpu_device * adev,const struct amdgpu_framebuffer * afb,const enum surface_pixel_format format,const enum dc_rotation_angle rotation,const struct plane_size * plane_size,struct dc_tiling_info * tiling_info,struct dc_plane_dcc_param * dcc,struct dc_plane_address * address) amdgpu_dm_plane_fill_gfx9_attrs_from_modifiers() argument
409 amdgpu_dm_plane_fill_gfx12_attrs_from_modifiers(struct amdgpu_device * adev,const struct amdgpu_framebuffer * afb,const enum surface_pixel_format format,const enum dc_rotation_angle rotation,const struct plane_size * plane_size,struct dc_tiling_info * tiling_info,struct dc_plane_dcc_param * dcc,struct dc_plane_address * address) amdgpu_dm_plane_fill_gfx12_attrs_from_modifiers() argument
988 uint64_t dcc = ver | AMD_FMT_MOD_SET(DCC, 1); amdgpu_dm_plane_add_gfx12_modifiers() local
1136 amdgpu_dm_plane_fill_plane_buffer_attributes(struct amdgpu_device * adev,const struct amdgpu_framebuffer * afb,const enum surface_pixel_format format,const enum dc_rotation_angle rotation,struct dc_tiling_info * tiling_info,struct plane_size * plane_size,struct dc_plane_dcc_param * dcc,struct dc_plane_address * address,bool tmz_surface) amdgpu_dm_plane_fill_plane_buffer_attributes() argument
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| /linux/arch/arm64/boot/dts/xilinx/ |
| H A D | zynqmp-zcu1275-revA.dts | 22 serial1 = &dcc;
37 &dcc {
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| H A D | zynqmp-zc1254-revA.dts | 22 serial1 = &dcc;
37 &dcc {
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| H A D | zynqmp-zc1232-revA.dts | 21 serial1 = &dcc;
36 &dcc {
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| /linux/arch/arm/boot/dts/arm/ |
| H A D | vexpress-v2p-ca5s.dts | 144 dcc {
202 temp-dcc {
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| H A D | vexpress-v2p-ca15-tc1.dts | 141 dcc {
217 temp-dcc {
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| H A D | vexpress-v2p-ca9.dts | 186 dcc {
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| /linux/drivers/tty/hvc/ |
| H A D | hvc_dcc.c | 63 EARLYCON_DECLARE(dcc, dcc_early_console_setup);
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| /linux/fs/ext4/ |
| H A D | balloc.c | 629 struct percpu_counter *dcc = &sbi->s_dirtyclusters_counter; in ext4_has_free_clusters() local
632 dirty_clusters = percpu_counter_read_positive(dcc); in ext4_has_free_clusters()
645 dirty_clusters = percpu_counter_sum_positive(dcc); in ext4_has_free_clusters()
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| /linux/arch/arm64/boot/dts/arm/ |
| H A D | vexpress-v2f-1xv7-ca53x2.dts | 110 dcc {
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| /linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/ |
| H A D | dml2_core_dcn6_calcs_dchub.c | 1376 if (p->display_cfg->plane_descriptors[k].surface.dcc.enable == true) { in dcn6_calculate_stutter_efficiency()
1382 …dthSurfaceLuma[k] / math_min2(p->display_cfg->plane_descriptors[k].surface.dcc.informative.dcc_rat… in dcn6_calculate_stutter_efficiency()
1384 …ateLuma = %f\n", __func__, k, p->display_cfg->plane_descriptors[k].surface.dcc.informative.dcc_rat… in dcn6_calculate_stutter_efficiency()
1386 …ReadBandwidthSurfaceLuma[k] * p->display_cfg->plane_descriptors[k].surface.dcc.informative.fractio… in dcn6_calculate_stutter_efficiency()
1387 …ReadBandwidthSurfaceLuma[k] * p->display_cfg->plane_descriptors[k].surface.dcc.informative.fractio… in dcn6_calculate_stutter_efficiency()
1395 …hSurfaceChroma[k] / math_min2(p->display_cfg->plane_descriptors[k].surface.dcc.informative.dcc_rat… in dcn6_calculate_stutter_efficiency()
1397 …eChroma = %f\n", __func__, k, p->display_cfg->plane_descriptors[k].surface.dcc.informative.dcc_rat… in dcn6_calculate_stutter_efficiency()
1399 …adBandwidthSurfaceChroma[k] * p->display_cfg->plane_descriptors[k].surface.dcc.informative.fractio… in dcn6_calculate_stutter_efficiency()
1400 …adBandwidthSurfaceChroma[k] * p->display_cfg->plane_descriptors[k].surface.dcc.informative.fractio… in dcn6_calculate_stutter_efficiency()
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| H A D | dml2_core_dcn5_funcs_mode_programming.c | 322 s->SurfaceParameters[k].DCCEnable = display_cfg->plane_descriptors[k].surface.dcc.enable; in dcn5_mode_programming()
342 …s->SurfaceParameters[k].DCCMetaPitchY = display_cfg->plane_descriptors[k].surface.dcc.plane0.pitch; in dcn5_mode_programming()
343 …s->SurfaceParameters[k].DCCMetaPitchC = display_cfg->plane_descriptors[k].surface.dcc.plane1.pitch; in dcn5_mode_programming()
436 if (display_cfg->plane_descriptors[k].surface.dcc.enable) in dcn5_mode_programming()
660 myPipe->DCCEnable = display_cfg->plane_descriptors[k].surface.dcc.enable; in dcn5_mode_programming()
711 …CalculatePrefetchSchedule_params->dcc_enable = display_cfg->plane_descriptors[k].surface.dcc.enabl… in dcn5_mode_programming()
950 mode_lib->ip.dcn_mrq_present && display_cfg->plane_descriptors[k].surface.dcc.enable, in dcn5_mode_programming()
1043 display_cfg->plane_descriptors[k].surface.dcc.enable, in dcn5_mode_programming()
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| H A D | dml2_core_dcn5_calcs_dchub.c | 920 && p->display_cfg->plane_descriptors[k].surface.dcc.enable in dcn5_calculate_swath_and_det_configuration()
1653 if (p->display_cfg->plane_descriptors[plane_index].surface.dcc.enable && p->mrq_present) { in dcn5_calculate_bytes_to_fetch_required_to_hide_latency()
2496 if (display_cfg->plane_descriptors[k].surface.dcc.enable) in dcn5_calculate_tarb()
4670 if (p->display_cfg->plane_descriptors[k].surface.dcc.enable == true && p->mrq_present) { in dcn5_calculate_meta_and_pte_times()
4863 bool dcc_mrq_enable = display_cfg->plane_descriptors[k].surface.dcc.enable && mrq_present; in dcn5_calculate_vm_group_and_request_times()
4981 if (p->display_cfg->plane_descriptors[k].surface.dcc.enable == true) { in dcn5_calculate_stutter_efficiency()
4987 …dthSurfaceLuma[k] / math_min2(p->display_cfg->plane_descriptors[k].surface.dcc.informative.dcc_rat… in dcn5_calculate_stutter_efficiency()
4989 …ateLuma = %f\n", __func__, k, p->display_cfg->plane_descriptors[k].surface.dcc.informative.dcc_rat… in dcn5_calculate_stutter_efficiency()
4991 …ReadBandwidthSurfaceLuma[k] * p->display_cfg->plane_descriptors[k].surface.dcc.informative.fractio… in dcn5_calculate_stutter_efficiency()
4992 …ReadBandwidthSurfaceLuma[k] * p->display_cfg->plane_descriptors[k].surface.dcc.informative.fractio… in dcn5_calculate_stutter_efficiency()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/ |
| H A D | display_mode_structs.h | 386 unsigned char dcc; member
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| /linux/drivers/gpu/drm/amd/display/dc/dml2_0/ |
| H A D | dml2_translation_helper.c | 931 out->DCCEnable[location] = in->dcc.enable; in populate_dml_surface_cfg_from_plane_state()
932 out->DCCMetaPitchY[location] = in->dcc.meta_pitch; in populate_dml_surface_cfg_from_plane_state()
933 out->DCCMetaPitchC[location] = in->dcc.meta_pitch_c; in populate_dml_surface_cfg_from_plane_state()
936 out->DCCFractionOfZeroSizeRequestsLuma[location] = in->dcc.independent_64b_blks; in populate_dml_surface_cfg_from_plane_state()
937 out->DCCFractionOfZeroSizeRequestsChroma[location] = in->dcc.independent_64b_blks_c; in populate_dml_surface_cfg_from_plane_state()
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| /linux/drivers/gpu/drm/amd/display/dc/core/ |
| H A D | dc.c | 2874 if (u->plane_info->dcc.enable != u->surface->dcc.enable in get_plane_info_update_type()
2875 || u->plane_info->dcc.dcc_ind_blk != u->surface->dcc.dcc_ind_blk in get_plane_info_update_type()
2876 || u->plane_info->dcc.meta_pitch != u->surface->dcc.meta_pitch) { in get_plane_info_update_type()
3391 surface->dcc = in copy_surface_update_to_plane()
3392 srf_update->plane_info->dcc; in copy_surface_update_to_plane()
7625 state->hubp[i].surface_dcc_en = (pipe_ctx->plane_state->dcc.enable) ? 1 : 0; in dc_capture_register_software_state()
7626 state->hubp[i].surface_dcc_ind_64b_blk = pipe_ctx->plane_state->dcc.independent_64b_blks; in dc_capture_register_software_state()
7627 state->hubp[i].surface_dcc_ind_128b_blk = pipe_ctx->plane_state->dcc.dcc_ind_blk; in dc_capture_register_software_state()
7631 state->hubp[i].meta_pitch = pipe_ctx->plane_state->dcc.meta_pitch; in dc_capture_register_software_state()
7633 state->hubp[i].meta_pitch_c = pipe_ctx->plane_state->dcc.meta_pitch_c; in dc_capture_register_software_state()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn32/ |
| H A D | dcn32_resource.c | 1838 memcpy(&phantom_plane->dcc, &curr_pipe->plane_state->dcc, sizeof(phantom_plane->dcc)); in dcn32_enable_phantom_plane()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn60/ |
| H A D | dcn60_resource.c | 886 if (pipe_ctx->plane_state->dcc.enable) { in build_mcache_pipe_regs_config()
983 if (pipe_ctx->plane_state && pipe_ctx->plane_state->dcc.enable) { in dcn50_program_mcache_pipe_config()
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