1e3b3d0f5SGreg Kroah-Hartman // SPDX-License-Identifier: GPL-2.0
24419da5dSShanker Donthineni /* Copyright (c) 2010, 2014, 2022 The Linux Foundation. All rights reserved. */
3728674a7SGreg Kroah-Hartman
4d1a1af2cSMichal Simek #include <linux/console.h>
54419da5dSShanker Donthineni #include <linux/cpu.h>
64419da5dSShanker Donthineni #include <linux/cpumask.h>
7728674a7SGreg Kroah-Hartman #include <linux/init.h>
84419da5dSShanker Donthineni #include <linux/kfifo.h>
9d1a1af2cSMichal Simek #include <linux/serial.h>
10d1a1af2cSMichal Simek #include <linux/serial_core.h>
114419da5dSShanker Donthineni #include <linux/smp.h>
124419da5dSShanker Donthineni #include <linux/spinlock.h>
13728674a7SGreg Kroah-Hartman
144061f498SChristopher Covington #include <asm/dcc.h>
15728674a7SGreg Kroah-Hartman #include <asm/processor.h>
16728674a7SGreg Kroah-Hartman
17728674a7SGreg Kroah-Hartman #include "hvc_console.h"
18728674a7SGreg Kroah-Hartman
19728674a7SGreg Kroah-Hartman /* DCC Status Bits */
20728674a7SGreg Kroah-Hartman #define DCC_STATUS_RX (1 << 30)
21728674a7SGreg Kroah-Hartman #define DCC_STATUS_TX (1 << 29)
22728674a7SGreg Kroah-Hartman
234419da5dSShanker Donthineni #define DCC_INBUF_SIZE 128
244419da5dSShanker Donthineni #define DCC_OUTBUF_SIZE 1024
254419da5dSShanker Donthineni
264419da5dSShanker Donthineni /* Lock to serialize access to DCC fifo */
274419da5dSShanker Donthineni static DEFINE_SPINLOCK(dcc_lock);
284419da5dSShanker Donthineni
29*f32fcbedSJiri Slaby (SUSE) static DEFINE_KFIFO(inbuf, u8, DCC_INBUF_SIZE);
30*f32fcbedSJiri Slaby (SUSE) static DEFINE_KFIFO(outbuf, u8, DCC_OUTBUF_SIZE);
314419da5dSShanker Donthineni
dcc_uart_console_putchar(struct uart_port * port,u8 ch)32*f32fcbedSJiri Slaby (SUSE) static void dcc_uart_console_putchar(struct uart_port *port, u8 ch)
33d1a1af2cSMichal Simek {
34d1a1af2cSMichal Simek while (__dcc_getstatus() & DCC_STATUS_TX)
35d1a1af2cSMichal Simek cpu_relax();
36d1a1af2cSMichal Simek
37d1a1af2cSMichal Simek __dcc_putchar(ch);
38d1a1af2cSMichal Simek }
39d1a1af2cSMichal Simek
dcc_early_write(struct console * con,const char * s,unsigned n)40d1a1af2cSMichal Simek static void dcc_early_write(struct console *con, const char *s, unsigned n)
41d1a1af2cSMichal Simek {
42d1a1af2cSMichal Simek struct earlycon_device *dev = con->data;
43d1a1af2cSMichal Simek
44d1a1af2cSMichal Simek uart_console_write(&dev->port, s, n, dcc_uart_console_putchar);
45d1a1af2cSMichal Simek }
46d1a1af2cSMichal Simek
dcc_early_console_setup(struct earlycon_device * device,const char * opt)47d1a1af2cSMichal Simek static int __init dcc_early_console_setup(struct earlycon_device *device,
48d1a1af2cSMichal Simek const char *opt)
49d1a1af2cSMichal Simek {
500ec058ecSAyan Kumar Halder unsigned int count = 0x4000000;
510ec058ecSAyan Kumar Halder
520ec058ecSAyan Kumar Halder while (--count && (__dcc_getstatus() & DCC_STATUS_TX))
530ec058ecSAyan Kumar Halder cpu_relax();
540ec058ecSAyan Kumar Halder
550ec058ecSAyan Kumar Halder if (__dcc_getstatus() & DCC_STATUS_TX)
560ec058ecSAyan Kumar Halder return -ENODEV;
570ec058ecSAyan Kumar Halder
58d1a1af2cSMichal Simek device->con->write = dcc_early_write;
59d1a1af2cSMichal Simek
60d1a1af2cSMichal Simek return 0;
61d1a1af2cSMichal Simek }
62d1a1af2cSMichal Simek
63d1a1af2cSMichal Simek EARLYCON_DECLARE(dcc, dcc_early_console_setup);
64d1a1af2cSMichal Simek
hvc_dcc_put_chars(uint32_t vt,const u8 * buf,size_t count)65*f32fcbedSJiri Slaby (SUSE) static ssize_t hvc_dcc_put_chars(uint32_t vt, const u8 *buf, size_t count)
66728674a7SGreg Kroah-Hartman {
67*f32fcbedSJiri Slaby (SUSE) size_t i;
68728674a7SGreg Kroah-Hartman
69728674a7SGreg Kroah-Hartman for (i = 0; i < count; i++) {
70728674a7SGreg Kroah-Hartman while (__dcc_getstatus() & DCC_STATUS_TX)
71728674a7SGreg Kroah-Hartman cpu_relax();
72728674a7SGreg Kroah-Hartman
73bf73bd35SStephen Boyd __dcc_putchar(buf[i]);
74728674a7SGreg Kroah-Hartman }
75728674a7SGreg Kroah-Hartman
76728674a7SGreg Kroah-Hartman return count;
77728674a7SGreg Kroah-Hartman }
78728674a7SGreg Kroah-Hartman
hvc_dcc_get_chars(uint32_t vt,u8 * buf,size_t count)79*f32fcbedSJiri Slaby (SUSE) static ssize_t hvc_dcc_get_chars(uint32_t vt, u8 *buf, size_t count)
80728674a7SGreg Kroah-Hartman {
81*f32fcbedSJiri Slaby (SUSE) size_t i;
82728674a7SGreg Kroah-Hartman
83bf73bd35SStephen Boyd for (i = 0; i < count; ++i)
84728674a7SGreg Kroah-Hartman if (__dcc_getstatus() & DCC_STATUS_RX)
85bf73bd35SStephen Boyd buf[i] = __dcc_getchar();
86bf73bd35SStephen Boyd else
87728674a7SGreg Kroah-Hartman break;
88728674a7SGreg Kroah-Hartman
89728674a7SGreg Kroah-Hartman return i;
90728674a7SGreg Kroah-Hartman }
91728674a7SGreg Kroah-Hartman
924419da5dSShanker Donthineni /*
934419da5dSShanker Donthineni * Check if the DCC is enabled. If CONFIG_HVC_DCC_SERIALIZE_SMP is enabled,
944419da5dSShanker Donthineni * then we assume then this function will be called first on core0. That way,
954419da5dSShanker Donthineni * dcc_core0_available will be true only if it's available on core0.
964419da5dSShanker Donthineni */
hvc_dcc_check(void)97f377775dSRob Herring static bool hvc_dcc_check(void)
98f377775dSRob Herring {
99f377775dSRob Herring unsigned long time = jiffies + (HZ / 10);
1004419da5dSShanker Donthineni static bool dcc_core0_available;
1014419da5dSShanker Donthineni
1024419da5dSShanker Donthineni /*
1034419da5dSShanker Donthineni * If we're not on core 0, but we previously confirmed that DCC is
1044419da5dSShanker Donthineni * active, then just return true.
1054419da5dSShanker Donthineni */
1064419da5dSShanker Donthineni int cpu = get_cpu();
1074419da5dSShanker Donthineni
1084419da5dSShanker Donthineni if (IS_ENABLED(CONFIG_HVC_DCC_SERIALIZE_SMP) && cpu && dcc_core0_available) {
1094419da5dSShanker Donthineni put_cpu();
1104419da5dSShanker Donthineni return true;
1114419da5dSShanker Donthineni }
1124419da5dSShanker Donthineni
1134419da5dSShanker Donthineni put_cpu();
114f377775dSRob Herring
115f377775dSRob Herring /* Write a test character to check if it is handled */
116f377775dSRob Herring __dcc_putchar('\n');
117f377775dSRob Herring
118f377775dSRob Herring while (time_is_after_jiffies(time)) {
1194419da5dSShanker Donthineni if (!(__dcc_getstatus() & DCC_STATUS_TX)) {
1204419da5dSShanker Donthineni dcc_core0_available = true;
121f377775dSRob Herring return true;
122f377775dSRob Herring }
1234419da5dSShanker Donthineni }
124f377775dSRob Herring
125f377775dSRob Herring return false;
126f377775dSRob Herring }
127f377775dSRob Herring
1284419da5dSShanker Donthineni /*
1294419da5dSShanker Donthineni * Workqueue function that writes the output FIFO to the DCC on core 0.
1304419da5dSShanker Donthineni */
dcc_put_work(struct work_struct * work)1314419da5dSShanker Donthineni static void dcc_put_work(struct work_struct *work)
1324419da5dSShanker Donthineni {
1334419da5dSShanker Donthineni unsigned char ch;
1344419da5dSShanker Donthineni unsigned long irqflags;
1354419da5dSShanker Donthineni
1364419da5dSShanker Donthineni spin_lock_irqsave(&dcc_lock, irqflags);
1374419da5dSShanker Donthineni
1384419da5dSShanker Donthineni /* While there's data in the output FIFO, write it to the DCC */
1394419da5dSShanker Donthineni while (kfifo_get(&outbuf, &ch))
1404419da5dSShanker Donthineni hvc_dcc_put_chars(0, &ch, 1);
1414419da5dSShanker Donthineni
1424419da5dSShanker Donthineni /* While we're at it, check for any input characters */
1434419da5dSShanker Donthineni while (!kfifo_is_full(&inbuf)) {
1444419da5dSShanker Donthineni if (!hvc_dcc_get_chars(0, &ch, 1))
1454419da5dSShanker Donthineni break;
1464419da5dSShanker Donthineni kfifo_put(&inbuf, ch);
1474419da5dSShanker Donthineni }
1484419da5dSShanker Donthineni
1494419da5dSShanker Donthineni spin_unlock_irqrestore(&dcc_lock, irqflags);
1504419da5dSShanker Donthineni }
1514419da5dSShanker Donthineni
1524419da5dSShanker Donthineni static DECLARE_WORK(dcc_pwork, dcc_put_work);
1534419da5dSShanker Donthineni
1544419da5dSShanker Donthineni /*
1554419da5dSShanker Donthineni * Workqueue function that reads characters from DCC and puts them into the
1564419da5dSShanker Donthineni * input FIFO.
1574419da5dSShanker Donthineni */
dcc_get_work(struct work_struct * work)1584419da5dSShanker Donthineni static void dcc_get_work(struct work_struct *work)
1594419da5dSShanker Donthineni {
1604419da5dSShanker Donthineni unsigned long irqflags;
161*f32fcbedSJiri Slaby (SUSE) u8 ch;
1624419da5dSShanker Donthineni
1634419da5dSShanker Donthineni /*
1644419da5dSShanker Donthineni * Read characters from DCC and put them into the input FIFO, as
1654419da5dSShanker Donthineni * long as there is room and we have characters to read.
1664419da5dSShanker Donthineni */
1674419da5dSShanker Donthineni spin_lock_irqsave(&dcc_lock, irqflags);
1684419da5dSShanker Donthineni
1694419da5dSShanker Donthineni while (!kfifo_is_full(&inbuf)) {
1704419da5dSShanker Donthineni if (!hvc_dcc_get_chars(0, &ch, 1))
1714419da5dSShanker Donthineni break;
1724419da5dSShanker Donthineni kfifo_put(&inbuf, ch);
1734419da5dSShanker Donthineni }
1744419da5dSShanker Donthineni spin_unlock_irqrestore(&dcc_lock, irqflags);
1754419da5dSShanker Donthineni }
1764419da5dSShanker Donthineni
1774419da5dSShanker Donthineni static DECLARE_WORK(dcc_gwork, dcc_get_work);
1784419da5dSShanker Donthineni
1794419da5dSShanker Donthineni /*
1804419da5dSShanker Donthineni * Write characters directly to the DCC if we're on core 0 and the FIFO
1814419da5dSShanker Donthineni * is empty, or write them to the FIFO if we're not.
1824419da5dSShanker Donthineni */
hvc_dcc0_put_chars(u32 vt,const u8 * buf,size_t count)183*f32fcbedSJiri Slaby (SUSE) static ssize_t hvc_dcc0_put_chars(u32 vt, const u8 *buf, size_t count)
1844419da5dSShanker Donthineni {
1854419da5dSShanker Donthineni unsigned long irqflags;
186*f32fcbedSJiri Slaby (SUSE) ssize_t len;
1874419da5dSShanker Donthineni
1884419da5dSShanker Donthineni if (!IS_ENABLED(CONFIG_HVC_DCC_SERIALIZE_SMP))
1894419da5dSShanker Donthineni return hvc_dcc_put_chars(vt, buf, count);
1904419da5dSShanker Donthineni
1914419da5dSShanker Donthineni spin_lock_irqsave(&dcc_lock, irqflags);
1924419da5dSShanker Donthineni if (smp_processor_id() || (!kfifo_is_empty(&outbuf))) {
1934419da5dSShanker Donthineni len = kfifo_in(&outbuf, buf, count);
1944419da5dSShanker Donthineni spin_unlock_irqrestore(&dcc_lock, irqflags);
1954419da5dSShanker Donthineni
1964419da5dSShanker Donthineni /*
1974419da5dSShanker Donthineni * We just push data to the output FIFO, so schedule the
1984419da5dSShanker Donthineni * workqueue that will actually write that data to DCC.
1994419da5dSShanker Donthineni * CPU hotplug is disabled in dcc_init so CPU0 cannot be
2004419da5dSShanker Donthineni * offlined after the cpu online check.
2014419da5dSShanker Donthineni */
2024419da5dSShanker Donthineni if (cpu_online(0))
2034419da5dSShanker Donthineni schedule_work_on(0, &dcc_pwork);
2044419da5dSShanker Donthineni
2054419da5dSShanker Donthineni return len;
2064419da5dSShanker Donthineni }
2074419da5dSShanker Donthineni
2084419da5dSShanker Donthineni /*
2094419da5dSShanker Donthineni * If we're already on core 0, and the FIFO is empty, then just
2104419da5dSShanker Donthineni * write the data to DCC.
2114419da5dSShanker Donthineni */
2124419da5dSShanker Donthineni len = hvc_dcc_put_chars(vt, buf, count);
2134419da5dSShanker Donthineni spin_unlock_irqrestore(&dcc_lock, irqflags);
2144419da5dSShanker Donthineni
2154419da5dSShanker Donthineni return len;
2164419da5dSShanker Donthineni }
2174419da5dSShanker Donthineni
2184419da5dSShanker Donthineni /*
2194419da5dSShanker Donthineni * Read characters directly from the DCC if we're on core 0 and the FIFO
2204419da5dSShanker Donthineni * is empty, or read them from the FIFO if we're not.
2214419da5dSShanker Donthineni */
hvc_dcc0_get_chars(u32 vt,u8 * buf,size_t count)222*f32fcbedSJiri Slaby (SUSE) static ssize_t hvc_dcc0_get_chars(u32 vt, u8 *buf, size_t count)
2234419da5dSShanker Donthineni {
2244419da5dSShanker Donthineni unsigned long irqflags;
225*f32fcbedSJiri Slaby (SUSE) ssize_t len;
2264419da5dSShanker Donthineni
2274419da5dSShanker Donthineni if (!IS_ENABLED(CONFIG_HVC_DCC_SERIALIZE_SMP))
2284419da5dSShanker Donthineni return hvc_dcc_get_chars(vt, buf, count);
2294419da5dSShanker Donthineni
2304419da5dSShanker Donthineni spin_lock_irqsave(&dcc_lock, irqflags);
2314419da5dSShanker Donthineni
2324419da5dSShanker Donthineni if (smp_processor_id() || (!kfifo_is_empty(&inbuf))) {
2334419da5dSShanker Donthineni len = kfifo_out(&inbuf, buf, count);
2344419da5dSShanker Donthineni spin_unlock_irqrestore(&dcc_lock, irqflags);
2354419da5dSShanker Donthineni
2364419da5dSShanker Donthineni /*
2374419da5dSShanker Donthineni * If the FIFO was empty, there may be characters in the DCC
2384419da5dSShanker Donthineni * that we haven't read yet. Schedule a workqueue to fill
2394419da5dSShanker Donthineni * the input FIFO, so that the next time this function is
2404419da5dSShanker Donthineni * called, we'll have data. CPU hotplug is disabled in dcc_init
2414419da5dSShanker Donthineni * so CPU0 cannot be offlined after the cpu online check.
2424419da5dSShanker Donthineni */
2434419da5dSShanker Donthineni if (!len && cpu_online(0))
2444419da5dSShanker Donthineni schedule_work_on(0, &dcc_gwork);
2454419da5dSShanker Donthineni
2464419da5dSShanker Donthineni return len;
2474419da5dSShanker Donthineni }
2484419da5dSShanker Donthineni
2494419da5dSShanker Donthineni /*
2504419da5dSShanker Donthineni * If we're already on core 0, and the FIFO is empty, then just
2514419da5dSShanker Donthineni * read the data from DCC.
2524419da5dSShanker Donthineni */
2534419da5dSShanker Donthineni len = hvc_dcc_get_chars(vt, buf, count);
2544419da5dSShanker Donthineni spin_unlock_irqrestore(&dcc_lock, irqflags);
2554419da5dSShanker Donthineni
2564419da5dSShanker Donthineni return len;
2574419da5dSShanker Donthineni }
2584419da5dSShanker Donthineni
259728674a7SGreg Kroah-Hartman static const struct hv_ops hvc_dcc_get_put_ops = {
2604419da5dSShanker Donthineni .get_chars = hvc_dcc0_get_chars,
2614419da5dSShanker Donthineni .put_chars = hvc_dcc0_put_chars,
262728674a7SGreg Kroah-Hartman };
263728674a7SGreg Kroah-Hartman
hvc_dcc_console_init(void)264728674a7SGreg Kroah-Hartman static int __init hvc_dcc_console_init(void)
265728674a7SGreg Kroah-Hartman {
2663d270701STimur Tabi int ret;
2673d270701STimur Tabi
268f377775dSRob Herring if (!hvc_dcc_check())
269f377775dSRob Herring return -ENODEV;
270f377775dSRob Herring
2713d270701STimur Tabi /* Returns -1 if error */
2723d270701STimur Tabi ret = hvc_instantiate(0, 0, &hvc_dcc_get_put_ops);
2733d270701STimur Tabi
2743d270701STimur Tabi return ret < 0 ? -ENODEV : 0;
275728674a7SGreg Kroah-Hartman }
276728674a7SGreg Kroah-Hartman console_initcall(hvc_dcc_console_init);
277728674a7SGreg Kroah-Hartman
hvc_dcc_init(void)278728674a7SGreg Kroah-Hartman static int __init hvc_dcc_init(void)
279728674a7SGreg Kroah-Hartman {
2803d270701STimur Tabi struct hvc_struct *p;
2813d270701STimur Tabi
282f377775dSRob Herring if (!hvc_dcc_check())
283f377775dSRob Herring return -ENODEV;
284f377775dSRob Herring
2854419da5dSShanker Donthineni if (IS_ENABLED(CONFIG_HVC_DCC_SERIALIZE_SMP)) {
2864419da5dSShanker Donthineni pr_warn("\n");
2874419da5dSShanker Donthineni pr_warn("********************************************************************\n");
2884419da5dSShanker Donthineni pr_warn("** NOTICE NOTICE NOTICE NOTICE NOTICE NOTICE NOTICE **\n");
2894419da5dSShanker Donthineni pr_warn("** **\n");
2904419da5dSShanker Donthineni pr_warn("** HVC_DCC_SERIALIZE_SMP SUPPORT HAS BEEN ENABLED IN THIS KERNEL **\n");
2914419da5dSShanker Donthineni pr_warn("** **\n");
2924419da5dSShanker Donthineni pr_warn("** This means that this is a DEBUG kernel and unsafe for **\n");
2934419da5dSShanker Donthineni pr_warn("** production use and has important feature like CPU hotplug **\n");
2944419da5dSShanker Donthineni pr_warn("** disabled. **\n");
2954419da5dSShanker Donthineni pr_warn("** **\n");
2964419da5dSShanker Donthineni pr_warn("** If you see this message and you are not debugging the **\n");
2974419da5dSShanker Donthineni pr_warn("** kernel, report this immediately to your vendor! **\n");
2984419da5dSShanker Donthineni pr_warn("** **\n");
2994419da5dSShanker Donthineni pr_warn("** NOTICE NOTICE NOTICE NOTICE NOTICE NOTICE NOTICE **\n");
3004419da5dSShanker Donthineni pr_warn("********************************************************************\n");
3014419da5dSShanker Donthineni
3024419da5dSShanker Donthineni cpu_hotplug_disable();
3034419da5dSShanker Donthineni }
3044419da5dSShanker Donthineni
3053d270701STimur Tabi p = hvc_alloc(0, 0, &hvc_dcc_get_put_ops, 128);
3063d270701STimur Tabi
3073d270701STimur Tabi return PTR_ERR_OR_ZERO(p);
308728674a7SGreg Kroah-Hartman }
309728674a7SGreg Kroah-Hartman device_initcall(hvc_dcc_init);
310