| /linux/drivers/gpu/drm/amd/display/amdgpu_dm/ |
| H A D | amdgpu_dm_color.c | 1337 struct dc_plane_state *dc_plane_state, in map_crtc_degamma_to_dc_plane() argument
1346 switch (dc_plane_state->format) { in map_crtc_degamma_to_dc_plane()
1361 dc_plane_state->in_transfer_func.type = TF_TYPE_DISTRIBUTED_POINTS; in map_crtc_degamma_to_dc_plane()
1388 dc_plane_state->in_transfer_func.tf = tf; in map_crtc_degamma_to_dc_plane()
1390 dc_plane_state->in_transfer_func.tf = in map_crtc_degamma_to_dc_plane()
1393 r = __set_input_tf(caps, &dc_plane_state->in_transfer_func, in map_crtc_degamma_to_dc_plane()
1402 dc_plane_state->in_transfer_func.type = TF_TYPE_PREDEFINED; in map_crtc_degamma_to_dc_plane()
1403 dc_plane_state->in_transfer_func.tf = tf; in map_crtc_degamma_to_dc_plane()
1407 &dc_plane_state->in_transfer_func, in map_crtc_degamma_to_dc_plane()
1417 struct dc_plane_state *dc_plane_state, in __set_dm_plane_degamma() argument
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| H A D | amdgpu_dm.h | 84 struct dc_plane_state;
875 struct dc_plane_state *dc_state;
1061 struct dc_plane_state *dc_plane_state);
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| H A D | amdgpu_dm.c | 6189 struct dc_plane_state *dc_plane_state, in fill_dc_plane_attributes() argument
6203 dc_plane_state->src_rect = scaling_info.src_rect; in fill_dc_plane_attributes()
6204 dc_plane_state->dst_rect = scaling_info.dst_rect; in fill_dc_plane_attributes()
6205 dc_plane_state->clip_rect = scaling_info.clip_rect; in fill_dc_plane_attributes()
6206 dc_plane_state->scaling_quality = scaling_info.scaling_quality; in fill_dc_plane_attributes()
6211 &dc_plane_state->address, in fill_dc_plane_attributes()
6216 dc_plane_state->format = plane_info.format; in fill_dc_plane_attributes()
6217 dc_plane_state->color_space = plane_info.color_space; in fill_dc_plane_attributes()
6218 dc_plane_state->format = plane_info.format; in fill_dc_plane_attributes()
6219 dc_plane_state->plane_size = plane_info.plane_size; in fill_dc_plane_attributes()
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| H A D | amdgpu_dm_plane.c | 1004 struct dc_plane_state *plane_state = in amdgpu_dm_plane_helper_prepare_fb()
1433 struct dc_plane_state *dc_plane_state; in amdgpu_dm_plane_panic_flush() local
1438 dc_plane_state = dm_plane_state->dc_state; in amdgpu_dm_plane_panic_flush()
1440 dc_plane_force_dcc_and_tiling_disable(dc_plane_state, fb->modifier ? true : false); in amdgpu_dm_plane_panic_flush()
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| /linux/drivers/gpu/drm/amd/display/dc/core/ |
| H A D | dc_surface.c | 40 void dc_plane_construct(struct dc_context *ctx, struct dc_plane_state *plane_state) in dc_plane_construct()
58 void dc_plane_destruct(struct dc_plane_state *plane_state) in dc_plane_destruct()
68 uint8_t dc_plane_get_pipe_mask(struct dc_state *dc_state, const struct dc_plane_state *plane_state) in dc_plane_get_pipe_mask()
86 struct dc_plane_state *dc_create_plane_state(const struct dc *dc) in dc_create_plane_state()
88 struct dc_plane_state *plane_state = kvzalloc(sizeof(*plane_state), in dc_create_plane_state()
112 const struct dc_plane_state *plane_state, in dc_plane_get_status()
162 void dc_plane_state_retain(struct dc_plane_state *plane_state) in dc_plane_state_retain()
169 struct dc_plane_state *plane_state = container_of(kref, struct dc_plane_state, refcount); in dc_plane_state_free()
174 void dc_plane_state_release(struct dc_plane_state *plane_state) in dc_plane_state_release()
275 void dc_plane_force_dcc_and_tiling_disable(struct dc_plane_state *plane_state, in dc_plane_force_dcc_and_tiling_disable()
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| H A D | dc_resource.c | 1182 const struct dc_plane_state *plane_state = pipe_ctx->plane_state; in calculate_scaling_ratios()
1298 const struct dc_plane_state *plane_state = pipe_ctx->plane_state; in calculate_inits_and_viewports()
1487 const struct dc_plane_state *plane_state = pipe_ctx->plane_state; in resource_build_scaling_params()
2052 int resource_get_dpp_pipes_for_plane(const struct dc_plane_state *plane, in resource_get_dpp_pipes_for_plane()
2577 const struct dc_plane_state *plane, in update_pipe_params_after_mpc_slice_count_change()
3017 struct dc_plane_state *plane_state, in add_plane_to_opp_head_pipes()
3067 struct dc_plane_state *plane_state, in acquire_secondary_dpp_pipes_and_add_plane()
3118 struct dc_plane_state *plane_state) in resource_append_dpp_pipes_for_plane_composition()
3144 const struct dc_plane_state *plane_state) in resource_remove_dpp_pipes_for_plane_composition()
3473 const struct dc_plane_state *plane, in resource_update_pipes_for_plane_with_slice_count()
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| H A D | dc.c | 1287 struct dc_plane_state *plane_state = NULL; in dc_get_visual_confirm_for_stream()
2009 struct dc_plane_state *plane_state) in should_update_pipe_for_plane()
2659 const struct dc_plane_state *plane_state) in is_surface_in_context()
3085 struct dc_plane_state *surface, in copy_surface_update_to_plane()
3542 struct dc_plane_state *new_planes[MAX_SURFACES] = {0}; in update_planes_and_stream_state()
3577 struct dc_plane_state *surface = srf_updates[i].surface; in update_planes_and_stream_state()
3806 struct dc_plane_state *plane_state = srf_updates[i].surface; in dc_dmub_update_dirty_rect()
3862 struct dc_plane_state *plane_state = srf_updates[i].surface; in build_dmub_update_dirty_rect()
3944 struct dc_plane_state *plane_state = srf_updates[i].surface; in commit_plane_for_stream_offload_fams2_flip()
4030 struct dc_plane_state *plane_state = srf_updates[i].surface; in commit_planes_for_stream_fast()
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| H A D | dc_hw_sequencer.c | 739 struct dc_plane_state *plane = pipe_ctx->plane_state; in hwss_build_fast_sequence()
1394 struct dc_plane_state *plane_state) in hwss_add_dpp_set_input_transfer_func()
1947 struct dc_plane_state *plane_state = pipe_ctx->plane_state; in hwss_setup_dpp()
1967 struct dc_plane_state *plane_state = pipe_ctx->plane_state; in hwss_program_bias_and_scale()
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| /linux/drivers/gpu/drm/amd/display/dc/ |
| H A D | dc_plane_priv.h | 31 void dc_plane_construct(struct dc_context *ctx, struct dc_plane_state *plane_state);
32 void dc_plane_destruct(struct dc_plane_state *plane_state);
33 uint8_t dc_plane_get_pipe_mask(struct dc_state *dc_state, const struct dc_plane_state *plane_state);
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| H A D | dc.h | 484 struct dc_plane_state;
1442 struct dc_plane_state { struct
1552 struct dc_plane_state plane_states[MAX_SURFACES];
1826 struct dc_plane_state *surface;
1910 struct dc_plane_state *plane_states[MAX_SURFACES];
1922 enum dc_status dc_validate_plane(struct dc *dc, const struct dc_plane_state *plane_state);
1964 struct dc_plane_state *dc_get_surface_for_mpcc(struct dc *dc,
1969 uint32_t dc_get_opp_for_plane(struct dc *dc, struct dc_plane_state *plane);
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| H A D | dc_types.h | 46 struct dc_plane_state;
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn20/ |
| H A D | dcn20_hwseq.h | 34 struct pipe_ctx *pipe_ctx, const struct dc_plane_state *plane_state);
36 struct pipe_ctx *pipe_ctx, const struct dc_plane_state *plane_state);
46 const struct dc_plane_state *plane_state);
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| H A D | dcn20_hwseq.c | 1070 struct pipe_ctx *pipe_ctx, const struct dc_plane_state *plane_state) in dcn20_set_blend_lut()
1090 struct pipe_ctx *pipe_ctx, const struct dc_plane_state *plane_state) in dcn20_set_shaper_3dlut()
1117 const struct dc_plane_state *plane_state) in dcn20_set_input_transfer_func()
1687 struct dc_plane_state *plane_state = pipe_ctx->plane_state; in dcn20_update_dchubp_dpp()
2707 struct dc_plane_state *plane_state = pipe_ctx->plane_state; in patch_address_for_sbs_tb_stereo()
2736 struct dc_plane_state *plane_state = pipe_ctx->plane_state; in dcn20_update_plane_addr()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn32/ |
| H A D | dcn32_hwseq.h | 51 const struct dc_plane_state *plane_state);
55 const struct dc_plane_state *plane_state);
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| /linux/drivers/gpu/drm/amd/display/dc/basics/ |
| H A D | dc_common.h | 40 const struct dc_plane_state *plane_state);
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn201/ |
| H A D | dcn201_hwseq.c | 59 struct dc_plane_state *plane_state = pipe_ctx->plane_state; in patch_address_for_sbs_tb_stereo()
137 struct dc_plane_state *plane_state = pipe_ctx->plane_state; in dcn201_update_plane_addr()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/ |
| H A D | hw_sequencer.h | 87 struct dc_plane_state *plane_state;
1038 …void (*clear_surface_dcc_and_tiling)(struct pipe_ctx *pipe_ctx, struct dc_plane_state *plane_state…
1604 struct dc *dc, struct pipe_ctx *pipe_ctx, struct dc_plane_state *plane_state);
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn32/ |
| H A D | dcn32_resource_helpers.c | 319 struct dc_plane_state *current_plane = NULL; in dcn32_determine_det_override()
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| /linux/drivers/gpu/drm/amd/display/modules/freesync/ |
| H A D | freesync.c | 1130 const struct dc_plane_state *plane, in mod_freesync_handle_preflip()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn401/ |
| H A D | dcn401_resource.h | 23 enum dc_status dcn401_patch_unknown_plane_state(struct dc_plane_state *plane_state);
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn401/ |
| H A D | dcn401_hwseq.c | 609 const struct dc_plane_state *plane_state) in dcn401_set_mcm_luts()
1272 struct dc_plane_state *plane = NULL; in dcn401_apply_idle_power_optimizations()
3573 struct dc_plane_state *plane_state = pipe_ctx->plane_state; in dcn401_update_dchubp_dpp_sequence()
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