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Searched refs:cxl_port (Results 1 – 25 of 27) sorted by relevance

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/linux/drivers/cxl/
H A Dcxl.h503 struct cxl_port *port;
571 struct cxl_port { struct
613 struct cxl_port port;
618 to_cxl_root(const struct cxl_port *port) in to_cxl_root()
624 cxl_find_dport_by_dev(struct cxl_port *port, const struct device *dport_dev) in cxl_find_dport_by_dev()
653 struct cxl_port *port;
670 struct cxl_port *next;
684 struct cxl_port *port;
699 static inline bool is_cxl_root(struct cxl_port *port) in is_cxl_root()
723 int cxl_num_decoders_committed(struct cxl_port *port);
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H A Dcxlpci.h79 void read_cdat_data(struct cxl_port *port);
86 void devm_cxl_port_ras_setup(struct cxl_port *port);
100 static inline void devm_cxl_port_ras_setup(struct cxl_port *port) in devm_cxl_port_ras_setup()
H A DMakefile11 obj-$(CONFIG_CXL_PORT) += cxl_port.o
17 cxl_port-y := port.o
H A Dcxlmem.h62 struct cxl_port *endpoint;
76 static inline struct cxl_port *cxled_to_port(struct cxl_endpoint_decoder *cxled) in cxled_to_port()
81 static inline struct cxl_port *cxlrd_to_port(struct cxl_root_decoder *cxlrd) in cxlrd_to_port()
89 struct cxl_port *port = to_cxl_port(cxled->cxld.dev.parent); in cxled_to_memdev()
95 static inline bool is_cxl_endpoint(struct cxl_port *port) in is_cxl_endpoint()
149 static inline struct cxl_ep *cxl_ep_load(struct cxl_port *port, in cxl_ep_load()
868 struct cxl_port *port;
H A Dpmem.c24 struct cxl_port *port) in devm_cxl_add_nvdimm_bridge()
H A DKconfig73 consumes these resource to publish the root of a cxl_port decode
H A Dpci.c708 struct cxl_port *root __free(put_cxl_port) = in rcd_pcie_cap_emit()
/linux/drivers/cxl/core/
H A Dport.c46 int cxl_num_decoders_committed(struct cxl_port *port) in cxl_num_decoders_committed()
425 struct cxl_port *port = to_cxl_port(cxld->dev.parent); in __cxl_decoder_release()
538 static void cxl_ep_remove(struct cxl_port *port, struct cxl_ep *ep) in cxl_ep_remove()
548 struct cxl_port *port = to_cxl_port(dev); in cxl_port_release()
570 struct cxl_port *port = to_cxl_port(dev); in decoders_committed_show()
605 struct cxl_port *to_cxl_port(const struct device *dev) in to_cxl_port()
610 return container_of(dev, struct cxl_port, dev); in to_cxl_port()
614 struct cxl_port *parent_port_of(struct cxl_port *port) in parent_port_of()
623 struct cxl_port *port = _port; in unregister_port()
632 struct cxl_port *port = _port; in cxl_unlink_uport()
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H A Dcore.h49 int cxl_get_poison_by_endpoint(struct cxl_port *port);
68 static inline int cxl_get_poison_by_endpoint(struct cxl_port *port) in cxl_get_poison_by_endpoint()
158 int cxl_port_get_switch_dport_bandwidth(struct cxl_port *port,
161 static inline struct device *port_to_host(struct cxl_port *port) in port_to_host()
163 struct cxl_port *parent = is_cxl_root(port) ? NULL : in port_to_host()
181 struct cxl_port *port = dport->port; in dport_to_host()
215 int cxl_port_get_possible_dports(struct cxl_port *port);
H A Dcdat.c180 static int cxl_cdat_endpoint_process(struct cxl_port *port, in cxl_cdat_endpoint_process()
196 static int cxl_port_perf_data_calculate(struct cxl_port *port, in cxl_port_perf_data_calculate()
314 static bool cxl_qos_match(struct cxl_port *root_port, in cxl_qos_match()
351 struct cxl_port *root_port; in cxl_qos_class_verify()
403 void cxl_endpoint_parse_cdat(struct cxl_port *port) in DEFINE_FREE()
513 struct cxl_port *port = dport->port; in cxl_switch_parse_cdat()
607 struct cxl_port *port;
633 struct cxl_port *endpoint = to_cxl_port(cxled->cxld.dev.parent); in cxl_endpoint_gather_bandwidth()
634 struct cxl_port *parent_port = to_cxl_port(endpoint->dev.parent); in cxl_endpoint_gather_bandwidth()
635 struct cxl_port *gp_port = to_cxl_port(parent_port->dev.parent); in cxl_endpoint_gather_bandwidth()
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H A Dhdm.c24 static int add_hdm_decoder(struct cxl_port *port, struct cxl_decoder *cxld) in add_hdm_decoder()
52 static int devm_cxl_add_passthrough_decoder(struct cxl_port *port) in devm_cxl_add_passthrough_decoder()
134 static struct cxl_hdm *devm_cxl_setup_hdm(struct cxl_port *port, in devm_cxl_setup_hdm()
250 struct cxl_port *port = cxled_to_port(cxled); in __cxl_dpa_release()
280 struct cxl_port *port = cxled_to_port(cxled); in devm_cxl_dpa_release()
344 struct cxl_port *port = cxled_to_port(cxled); in __cxl_dpa_reserve()
502 struct cxl_port *port = cxled_to_port(cxled); in devm_cxl_dpa_reserve()
544 struct cxl_port *port = cxled_to_port(cxled); in cxl_dpa_free()
672 struct cxl_port *port = cxled_to_port(cxled); in cxl_dpa_alloc()
802 struct cxl_port *port = to_cxl_port(cxld->dev.parent); in cxl_decoder_commit()
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H A Dpci.c51 struct cxl_dport *devm_cxl_add_dport_by_dev(struct cxl_port *port, in devm_cxl_add_dport_by_dev()
372 struct cxl_port *port = cxlhdm->port; in cxl_hdm_decode_init()
374 struct cxl_port *root; in cxl_hdm_decode_init()
565 void read_cdat_data(struct cxl_port *port) in read_cdat_data()
673 struct cxl_port *port = data; in __cxl_endpoint_decoder_reset_detected()
693 bool cxl_endpoint_decoder_reset_detected(struct cxl_port *port) in cxl_endpoint_decoder_reset_detected()
736 struct cxl_port *port __free(put_cxl_port) = in cxl_pci_setup_regs()
883 struct cxl_port *port;
905 int cxl_port_get_possible_dports(struct cxl_port *port) in cxl_port_get_possible_dports()
H A Dpmem.c59 struct cxl_nvdimm_bridge *cxl_find_nvdimm_bridge(struct cxl_port *port) in cxl_find_nvdimm_bridge()
80 static struct cxl_nvdimm_bridge *cxl_nvdimm_bridge_alloc(struct cxl_port *port) in cxl_nvdimm_bridge_alloc()
128 struct cxl_port *port) in __devm_cxl_add_nvdimm_bridge()
255 int devm_cxl_add_nvdimm(struct device *host, struct cxl_port *port, in devm_cxl_add_nvdimm()
H A Dregion.c220 static struct cxl_region_ref *cxl_rr_load(struct cxl_port *port, in cxl_rr_load()
265 struct cxl_port *iter = cxled_to_port(cxled); in cxl_region_decode_reset()
322 struct cxl_port *iter; in cxl_region_decode_commit()
890 struct cxl_port *port = to_cxl_port(dev->parent); in match_free_decoder()
967 cxl_port_pick_region_decoder(struct cxl_port *port, in cxl_port_pick_region_decoder()
993 static bool auto_order_ok(struct cxl_port *port, struct cxl_region *cxlr_iter, in auto_order_ok()
1016 alloc_region_ref(struct cxl_port *port, struct cxl_region *cxlr, in alloc_region_ref()
1079 struct cxl_port *port = cxl_rr->port; in free_region_ref()
1092 struct cxl_port *port = cxl_rr->port; in cxl_rr_ep_add()
1121 static int cxl_rr_assign_decoder(struct cxl_port *port, struct cxl_region *cxlr, in cxl_rr_assign_decoder()
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H A Dras_rch.c120 struct cxl_port *port __free(put_cxl_port) = in cxl_handle_rdport_errors()
H A Dras.c182 void devm_cxl_port_ras_setup(struct cxl_port *port) in devm_cxl_port_ras_setup()
H A Dmemdev.c240 struct cxl_port *port; in cxl_trigger_poison_list()
/linux/tools/testing/cxl/test/
H A Dmock.h25 int (*devm_cxl_switch_port_decoders_setup)(struct cxl_port *port);
26 int (*devm_cxl_endpoint_decoders_setup)(struct cxl_port *port);
27 void (*cxl_endpoint_parse_cdat)(struct cxl_port *port);
28 struct cxl_dport *(*devm_cxl_add_dport_by_dev)(struct cxl_port *port,
H A Dmock.c154 int __wrap_devm_cxl_switch_port_decoders_setup(struct cxl_port *port) in __wrap_nvdimm_bus_register()
169 int __wrap_devm_cxl_endpoint_decoders_setup(struct cxl_port *port) in redirect_devm_cxl_switch_port_decoders_setup()
199 struct cxl_dport *__wrap_devm_cxl_add_rch_dport(struct cxl_port *port, in __wrap_cxl_await_media_ready()
223 void __wrap_cxl_endpoint_parse_cdat(struct cxl_port *port) in __wrap_devm_cxl_add_rch_dport()
237 struct cxl_dport *__wrap_devm_cxl_add_dport_by_dev(struct cxl_port *port, in __wrap_cxl_endpoint_parse_cdat()
H A Dcxl.c727 static struct cxl_hdm *mock_cxl_setup_hdm(struct cxl_port *port, in mock_cxl_setup_hdm()
783 struct cxl_port *port = to_cxl_port(cxld->dev.parent); in cxld_registry_index()
842 struct cxl_port *port = to_cxl_port(cxld->dev.parent); in cxld_registry_restore()
934 struct cxl_port *port = to_cxl_port(cxld->dev.parent); in cxld_registry_save()
943 struct cxl_port *port = to_cxl_port(cxld->dev.parent); in cxld_registry_update()
954 struct cxl_port *port = to_cxl_port(cxld->dev.parent); in mock_decoder_commit()
984 struct cxl_port *port = to_cxl_port(cxld->dev.parent); in mock_decoder_reset()
1141 struct cxl_port *port) in mock_init_hdm_type2_cxled()
1147 struct cxl_port *root_port; in mock_init_hdm_type2_cxled()
1213 struct cxl_port *port, in mock_init_hdm_type3_cxled()
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/linux/tools/testing/cxl/
H A DKbuild41 obj-m += cxl_port.o
43 cxl_port-y := $(CXL_SRC)/port.o
44 cxl_port-y += config_check.o
45 cxl_port-y += cxl_port_test.o
H A Dcxl_port_test.c6 cxl_test_watermark(cxl_port);
/linux/Documentation/driver-api/cxl/linux/
H A Dcxl-driver.rst20 * cxl_port - initializes root and provides port enumeration interface.
23 * cxl_pci - uses cxl_port to enumerate the actual fabric hierarchy.
94 cxl_port
97 cxl_port
121 cxl_port
127 cxl_port
162 cxl_port
331 :code:`cxl_port` driver, and is created based on a PCI device's DVSEC
374 :code:`cxl_port` driver, and is created based on a PCI device's DVSEC registers.
/linux/Documentation/driver-api/cxl/
H A Dtheory-of-operation.rst184 'struct cxl_port' object. A 'cxl_port' is a device that can decode CXL.mem to
/linux/Documentation/ABI/testing/
H A Dsysfs-bus-cxl258 cxl_port container of this decoder, and 'Y' represents the
273 decode range of the cxl_port ancestor of the decoder's cxl_port,

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