| /linux/drivers/cxl/ |
| H A D | cxl.h | 485 struct cxl_port *port;
552 struct cxl_port { struct
594 struct cxl_port port;
599 to_cxl_root(const struct cxl_port *port) in to_cxl_root()
605 cxl_find_dport_by_dev(struct cxl_port *port, const struct device *dport_dev) in cxl_find_dport_by_dev()
634 struct cxl_port *port;
651 struct cxl_port *next;
665 struct cxl_port *port;
680 static inline bool is_cxl_root(struct cxl_port *port) in is_cxl_root()
704 int cxl_num_decoders_committed(struct cxl_port *port);
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| H A D | Makefile | 11 obj-$(CONFIG_CXL_PORT) += cxl_port.o
17 cxl_port-y := port.o
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| H A D | acpi.c | 210 struct cxl_port *root_port;
404 struct cxl_port *root_port = ctx->root_port; in DEFINE_FREE()
632 struct cxl_port *root_port = arg; in add_host_bridge_dport()
689 struct cxl_port *root_port = arg; in add_host_bridge_uport()
694 struct cxl_port *port; in add_host_bridge_uport()
747 struct cxl_port *root_port = data; in add_root_nvdimm_bridge()
891 struct cxl_port *root_port; in cxl_acpi_probe()
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| H A D | pmem.c | 24 struct cxl_port *port) in devm_cxl_add_nvdimm_bridge()
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| H A D | Kconfig | 73 consumes these resource to publish the root of a cxl_port decode
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| /linux/drivers/cxl/core/ |
| H A D | port.c | 45 int cxl_num_decoders_committed(struct cxl_port *port) in cxl_num_decoders_committed()
424 struct cxl_port *port = to_cxl_port(cxld->dev.parent); in __cxl_decoder_release()
535 static void cxl_ep_remove(struct cxl_port *port, struct cxl_ep *ep) in cxl_ep_remove()
545 struct cxl_port *port = to_cxl_port(dev); in cxl_port_release()
567 struct cxl_port *port = to_cxl_port(dev); in decoders_committed_show()
602 struct cxl_port *to_cxl_port(const struct device *dev) in to_cxl_port()
607 return container_of(dev, struct cxl_port, dev); in to_cxl_port()
611 struct cxl_port *parent_port_of(struct cxl_port *port) in parent_port_of()
620 struct cxl_port *port = _port; in unregister_port()
629 struct cxl_port *port = _port; in cxl_unlink_uport()
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| H A D | core.h | 49 int cxl_get_poison_by_endpoint(struct cxl_port *port);
67 static inline int cxl_get_poison_by_endpoint(struct cxl_port *port) in cxl_get_poison_by_endpoint()
154 int cxl_port_get_switch_dport_bandwidth(struct cxl_port *port,
157 static inline struct device *port_to_host(struct cxl_port *port) in port_to_host()
159 struct cxl_port *parent = is_cxl_root(port) ? NULL : in port_to_host()
177 struct cxl_port *port = dport->port; in dport_to_host()
214 int cxl_port_get_possible_dports(struct cxl_port *port);
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| H A D | cdat.c | 180 static int cxl_cdat_endpoint_process(struct cxl_port *port, in cxl_cdat_endpoint_process()
196 static int cxl_port_perf_data_calculate(struct cxl_port *port, in cxl_port_perf_data_calculate()
314 static bool cxl_qos_match(struct cxl_port *root_port, in cxl_qos_match()
351 struct cxl_port *root_port; in cxl_qos_class_verify()
403 void cxl_endpoint_parse_cdat(struct cxl_port *port) in DEFINE_FREE()
513 struct cxl_port *port = dport->port; in cxl_switch_parse_cdat()
607 struct cxl_port *port;
633 struct cxl_port *endpoint = to_cxl_port(cxled->cxld.dev.parent); in cxl_endpoint_gather_bandwidth()
634 struct cxl_port *parent_port = to_cxl_port(endpoint->dev.parent); in cxl_endpoint_gather_bandwidth()
635 struct cxl_port *gp_port = to_cxl_port(parent_port->dev.parent); in cxl_endpoint_gather_bandwidth()
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| H A D | hdm.c | 24 static int add_hdm_decoder(struct cxl_port *port, struct cxl_decoder *cxld) in add_hdm_decoder()
52 static int devm_cxl_add_passthrough_decoder(struct cxl_port *port) in devm_cxl_add_passthrough_decoder()
134 static struct cxl_hdm *devm_cxl_setup_hdm(struct cxl_port *port, in devm_cxl_setup_hdm()
250 struct cxl_port *port = cxled_to_port(cxled); in __cxl_dpa_release()
280 struct cxl_port *port = cxled_to_port(cxled); in devm_cxl_dpa_release()
344 struct cxl_port *port = cxled_to_port(cxled); in __cxl_dpa_reserve()
502 struct cxl_port *port = cxled_to_port(cxled); in devm_cxl_dpa_reserve()
544 struct cxl_port *port = cxled_to_port(cxled); in cxl_dpa_free()
672 struct cxl_port *port = cxled_to_port(cxled); in cxl_dpa_alloc()
802 struct cxl_port *port = to_cxl_port(cxld->dev.parent); in cxl_decoder_commit()
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| H A D | pmem.c | 59 struct cxl_nvdimm_bridge *cxl_find_nvdimm_bridge(struct cxl_port *port) in cxl_find_nvdimm_bridge()
80 static struct cxl_nvdimm_bridge *cxl_nvdimm_bridge_alloc(struct cxl_port *port) in cxl_nvdimm_bridge_alloc()
128 struct cxl_port *port) in __devm_cxl_add_nvdimm_bridge()
253 int devm_cxl_add_nvdimm(struct device *host, struct cxl_port *port, in devm_cxl_add_nvdimm()
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| H A D | region.c | 219 static struct cxl_region_ref *cxl_rr_load(struct cxl_port *port, in cxl_rr_load()
264 struct cxl_port *iter = cxled_to_port(cxled); in cxl_region_decode_reset()
321 struct cxl_port *iter; in cxl_region_decode_commit()
889 struct cxl_port *port = to_cxl_port(dev->parent); in match_free_decoder()
966 cxl_port_pick_region_decoder(struct cxl_port *port, in cxl_port_pick_region_decoder()
992 static bool auto_order_ok(struct cxl_port *port, struct cxl_region *cxlr_iter, in auto_order_ok()
1015 alloc_region_ref(struct cxl_port *port, struct cxl_region *cxlr, in alloc_region_ref()
1078 struct cxl_port *port = cxl_rr->port; in free_region_ref()
1091 struct cxl_port *port = cxl_rr->port; in cxl_rr_ep_add()
1120 static int cxl_rr_assign_decoder(struct cxl_port *port, struct cxl_region *cxlr, in cxl_rr_assign_decoder()
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| H A D | mce.c | 16 struct cxl_port *endpoint = cxlmd->endpoint; in cxl_handle_mce()
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| H A D | memdev.c | 238 struct cxl_port *port; in cxl_trigger_poison_list()
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| H A D | mbox.c | 1295 struct cxl_port *endpoint; in cxl_mem_sanitize()
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| H A D | edac.c | 1150 struct cxl_port *port = cxlmd->endpoint; in cxl_is_memdev_memory_online()
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| /linux/tools/testing/cxl/test/ |
| H A D | mock.h | 23 int (*devm_cxl_switch_port_decoders_setup)(struct cxl_port *port);
24 int (*devm_cxl_endpoint_decoders_setup)(struct cxl_port *port);
25 void (*cxl_endpoint_parse_cdat)(struct cxl_port *port);
26 struct cxl_dport *(*devm_cxl_add_dport_by_dev)(struct cxl_port *port,
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| H A D | mock.c | 154 int __wrap_devm_cxl_switch_port_decoders_setup(struct cxl_port *port) in __wrap_nvdimm_bus_register()
169 int __wrap_devm_cxl_endpoint_decoders_setup(struct cxl_port *port) in redirect_devm_cxl_switch_port_decoders_setup()
199 struct cxl_dport *__wrap_devm_cxl_add_rch_dport(struct cxl_port *port, in __wrap_cxl_await_media_ready()
223 void __wrap_cxl_endpoint_parse_cdat(struct cxl_port *port) in __wrap_devm_cxl_add_rch_dport()
237 struct cxl_dport *__wrap_devm_cxl_add_dport_by_dev(struct cxl_port *port, in __wrap_cxl_endpoint_parse_cdat()
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| H A D | cxl.c | 696 static struct cxl_hdm *mock_cxl_setup_hdm(struct cxl_port *port, in mock_cxl_setup_hdm()
752 struct cxl_port *port = to_cxl_port(cxld->dev.parent); in cxld_registry_index()
811 struct cxl_port *port = to_cxl_port(cxld->dev.parent); in cxld_registry_restore()
903 struct cxl_port *port = to_cxl_port(cxld->dev.parent); in cxld_registry_save()
912 struct cxl_port *port = to_cxl_port(cxld->dev.parent); in cxld_registry_update()
923 struct cxl_port *port = to_cxl_port(cxld->dev.parent); in mock_decoder_commit()
953 struct cxl_port *port = to_cxl_port(cxld->dev.parent); in mock_decoder_reset()
1077 struct cxl_port *port, *iter; in mock_init_hdm_decoder()
1225 struct cxl_port *port = cxlhdm->port; in mock_cxl_enumerate_decoders()
1226 struct cxl_port *parent_port = to_cxl_port(port->dev.parent); in mock_cxl_enumerate_decoders()
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| /linux/tools/testing/cxl/ |
| H A D | Kbuild | 41 obj-m += cxl_port.o
43 cxl_port-y := $(CXL_SRC)/port.o
44 cxl_port-y += config_check.o
45 cxl_port-y += cxl_port_test.o
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| H A D | cxl_port_test.c | 6 cxl_test_watermark(cxl_port);
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| /linux/Documentation/driver-api/cxl/linux/ |
| H A D | cxl-driver.rst | 20 * cxl_port - initializes root and provides port enumeration interface.
23 * cxl_pci - uses cxl_port to enumerate the actual fabric hierarchy.
94 cxl_port
97 cxl_port
121 cxl_port
127 cxl_port
162 cxl_port
331 :code:`cxl_port` driver, and is created based on a PCI device's DVSEC
374 :code:`cxl_port` driver, and is created based on a PCI device's DVSEC registers.
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| /linux/Documentation/driver-api/cxl/ |
| H A D | theory-of-operation.rst | 184 'struct cxl_port' object. A 'cxl_port' is a device that can decode CXL.mem to
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