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Searched refs:clock_ranges (Results 1 – 18 of 18) sorted by relevance

/linux/drivers/gpu/drm/amd/pm/swsmu/smu13/
H A Dsmu_v13_0_4_ppt.c664 struct pp_smu_wm_range_sets *clock_ranges) in smu_v13_0_4_set_watermarks_table() argument
670 if (!table || !clock_ranges) in smu_v13_0_4_set_watermarks_table()
673 if (clock_ranges->num_reader_wm_sets > NUM_WM_RANGES || in smu_v13_0_4_set_watermarks_table()
674 clock_ranges->num_writer_wm_sets > NUM_WM_RANGES) in smu_v13_0_4_set_watermarks_table()
677 for (i = 0; i < clock_ranges->num_reader_wm_sets; i++) { in smu_v13_0_4_set_watermarks_table()
679 clock_ranges->reader_wm_sets[i].min_drain_clk_mhz; in smu_v13_0_4_set_watermarks_table()
681 clock_ranges->reader_wm_sets[i].max_drain_clk_mhz; in smu_v13_0_4_set_watermarks_table()
683 clock_ranges->reader_wm_sets[i].min_fill_clk_mhz; in smu_v13_0_4_set_watermarks_table()
685 clock_ranges->reader_wm_sets[i].max_fill_clk_mhz; in smu_v13_0_4_set_watermarks_table()
688 clock_ranges->reader_wm_sets[i].wm_inst; in smu_v13_0_4_set_watermarks_table()
[all …]
/linux/drivers/gpu/drm/amd/pm/swsmu/smu12/
H A Drenoir_ppt.c1066 struct pp_smu_wm_range_sets *clock_ranges) in renoir_set_watermarks_table() argument
1072 if (clock_ranges) { in renoir_set_watermarks_table()
1073 if (clock_ranges->num_reader_wm_sets > NUM_WM_RANGES || in renoir_set_watermarks_table()
1074 clock_ranges->num_writer_wm_sets > NUM_WM_RANGES) in renoir_set_watermarks_table()
1078 for (i = 0; i < clock_ranges->num_reader_wm_sets; i++) { in renoir_set_watermarks_table()
1080 clock_ranges->reader_wm_sets[i].min_drain_clk_mhz; in renoir_set_watermarks_table()
1082 clock_ranges->reader_wm_sets[i].max_drain_clk_mhz; in renoir_set_watermarks_table()
1084 clock_ranges->reader_wm_sets[i].min_fill_clk_mhz; in renoir_set_watermarks_table()
1086 clock_ranges->reader_wm_sets[i].max_fill_clk_mhz; in renoir_set_watermarks_table()
1089 clock_ranges->reader_wm_sets[i].wm_inst; in renoir_set_watermarks_table()
[all …]
/linux/drivers/gpu/drm/amd/pm/swsmu/smu14/
H A Dsmu_v14_0_0_ppt.c483 struct pp_smu_wm_range_sets *clock_ranges) in smu_v14_0_0_set_watermarks_table() argument
489 if (!table || !clock_ranges) in smu_v14_0_0_set_watermarks_table()
492 if (clock_ranges->num_reader_wm_sets > NUM_WM_RANGES || in smu_v14_0_0_set_watermarks_table()
493 clock_ranges->num_writer_wm_sets > NUM_WM_RANGES) in smu_v14_0_0_set_watermarks_table()
496 for (i = 0; i < clock_ranges->num_reader_wm_sets; i++) { in smu_v14_0_0_set_watermarks_table()
498 clock_ranges->reader_wm_sets[i].min_drain_clk_mhz; in smu_v14_0_0_set_watermarks_table()
500 clock_ranges->reader_wm_sets[i].max_drain_clk_mhz; in smu_v14_0_0_set_watermarks_table()
502 clock_ranges->reader_wm_sets[i].min_fill_clk_mhz; in smu_v14_0_0_set_watermarks_table()
504 clock_ranges->reader_wm_sets[i].max_fill_clk_mhz; in smu_v14_0_0_set_watermarks_table()
507 clock_ranges->reader_wm_sets[i].wm_inst; in smu_v14_0_0_set_watermarks_table()
[all …]
/linux/drivers/gpu/drm/amd/pm/swsmu/smu11/
H A Dvangogh_ppt.c1598 struct pp_smu_wm_range_sets *clock_ranges) in vangogh_set_watermarks_table() argument
1604 if (!table || !clock_ranges) in vangogh_set_watermarks_table()
1607 if (clock_ranges) { in vangogh_set_watermarks_table()
1608 if (clock_ranges->num_reader_wm_sets > NUM_WM_RANGES || in vangogh_set_watermarks_table()
1609 clock_ranges->num_writer_wm_sets > NUM_WM_RANGES) in vangogh_set_watermarks_table()
1612 for (i = 0; i < clock_ranges->num_reader_wm_sets; i++) { in vangogh_set_watermarks_table()
1614 clock_ranges->reader_wm_sets[i].min_drain_clk_mhz; in vangogh_set_watermarks_table()
1616 clock_ranges->reader_wm_sets[i].max_drain_clk_mhz; in vangogh_set_watermarks_table()
1618 clock_ranges->reader_wm_sets[i].min_fill_clk_mhz; in vangogh_set_watermarks_table()
1620 clock_ranges->reader_wm_sets[i].max_fill_clk_mhz; in vangogh_set_watermarks_table()
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H A Dsienna_cichlid_ppt.c1874 struct pp_smu_wm_range_sets *clock_ranges) in sienna_cichlid_set_watermarks_table() argument
1880 if (clock_ranges) { in sienna_cichlid_set_watermarks_table()
1881 if (clock_ranges->num_reader_wm_sets > NUM_WM_RANGES || in sienna_cichlid_set_watermarks_table()
1882 clock_ranges->num_writer_wm_sets > NUM_WM_RANGES) in sienna_cichlid_set_watermarks_table()
1885 for (i = 0; i < clock_ranges->num_reader_wm_sets; i++) { in sienna_cichlid_set_watermarks_table()
1887 clock_ranges->reader_wm_sets[i].min_drain_clk_mhz; in sienna_cichlid_set_watermarks_table()
1889 clock_ranges->reader_wm_sets[i].max_drain_clk_mhz; in sienna_cichlid_set_watermarks_table()
1891 clock_ranges->reader_wm_sets[i].min_fill_clk_mhz; in sienna_cichlid_set_watermarks_table()
1893 clock_ranges->reader_wm_sets[i].max_fill_clk_mhz; in sienna_cichlid_set_watermarks_table()
1896 clock_ranges->reader_wm_sets[i].wm_inst; in sienna_cichlid_set_watermarks_table()
[all …]
H A Dnavi10_ppt.c2172 struct pp_smu_wm_range_sets *clock_ranges) in navi10_set_watermarks_table() argument
2178 if (clock_ranges) { in navi10_set_watermarks_table()
2179 if (clock_ranges->num_reader_wm_sets > NUM_WM_RANGES || in navi10_set_watermarks_table()
2180 clock_ranges->num_writer_wm_sets > NUM_WM_RANGES) in navi10_set_watermarks_table()
2183 for (i = 0; i < clock_ranges->num_reader_wm_sets; i++) { in navi10_set_watermarks_table()
2185 clock_ranges->reader_wm_sets[i].min_drain_clk_mhz; in navi10_set_watermarks_table()
2187 clock_ranges->reader_wm_sets[i].max_drain_clk_mhz; in navi10_set_watermarks_table()
2189 clock_ranges->reader_wm_sets[i].min_fill_clk_mhz; in navi10_set_watermarks_table()
2191 clock_ranges->reader_wm_sets[i].max_fill_clk_mhz; in navi10_set_watermarks_table()
2194 clock_ranges->reader_wm_sets[i].wm_inst; in navi10_set_watermarks_table()
[all …]
/linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dhardwaremanager.c467 void *clock_ranges) in phm_set_watermarks_for_clocks_ranges() argument
475 clock_ranges); in phm_set_watermarks_for_clocks_ranges()
H A Dsmu10_hwmgr.c1361 void *clock_ranges) in smu10_set_watermarks_for_clocks_ranges() argument
1364 struct dm_pp_wm_sets_with_clock_ranges_soc15 *wm_with_clock_ranges = clock_ranges; in smu10_set_watermarks_for_clocks_ranges()
H A Dvega12_hwmgr.c2008 void *clock_ranges) in vega12_set_watermarks_for_clocks_ranges() argument
2012 struct dm_pp_wm_sets_with_clock_ranges_soc15 *wm_with_clock_ranges = clock_ranges; in vega12_set_watermarks_for_clocks_ranges()
H A Dvega20_hwmgr.c2949 void *clock_ranges) in vega20_set_watermarks_for_clocks_ranges() argument
2953 struct dm_pp_wm_sets_with_clock_ranges_soc15 *wm_with_clock_ranges = clock_ranges; in vega20_set_watermarks_for_clocks_ranges()
/linux/drivers/gpu/drm/amd/pm/powerplay/inc/
H A Dhardwaremanager.h456 void *clock_ranges);
H A Dhwmgr.h309 int (*set_watermarks_for_clocks_ranges)(struct pp_hwmgr *hwmgr, void *clock_ranges);
/linux/drivers/gpu/drm/amd/pm/powerplay/
H A Damd_powerplay.c1130 void *clock_ranges) in pp_set_watermarks_for_clocks_ranges() argument
1134 if (!hwmgr || !hwmgr->pm_en || !clock_ranges) in pp_set_watermarks_for_clocks_ranges()
1138 clock_ranges); in pp_set_watermarks_for_clocks_ranges()
/linux/drivers/gpu/drm/amd/pm/inc/
H A Damdgpu_dpm.h578 void *clock_ranges);
/linux/drivers/gpu/drm/amd/pm/
H A Damdgpu_dpm.c1740 void *clock_ranges) in amdgpu_dpm_set_watermarks_for_clocks_ranges() argument
1750 clock_ranges); in amdgpu_dpm_set_watermarks_for_clocks_ranges()
/linux/drivers/gpu/drm/amd/pm/swsmu/inc/
H A Damdgpu_smu.h832 struct pp_smu_wm_range_sets *clock_ranges);
/linux/drivers/gpu/drm/amd/include/
H A Dkgd_pp_interface.h459 void *clock_ranges);
/linux/drivers/gpu/drm/amd/pm/swsmu/
H A Damdgpu_smu.c2590 struct pp_smu_wm_range_sets *clock_ranges) in smu_set_watermarks_for_clock_ranges() argument
2600 return smu_set_watermarks_table(smu, clock_ranges); in smu_set_watermarks_for_clock_ranges()