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Searched refs:bw_params (Results 1 – 17 of 17) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/
H A Ddcn314_clk_mgr.c497 static void dcn314_build_watermark_ranges(struct clk_bw_params *bw_params, struct dcn314_watermarks… in dcn314_build_watermark_ranges() argument
505 if (!bw_params->wm_table.entries[i].valid) in dcn314_build_watermark_ranges()
509 (uint8_t)bw_params->wm_table.entries[i].wm_inst; in dcn314_build_watermark_ranges()
511 (uint8_t)bw_params->wm_table.entries[i].wm_type; in dcn314_build_watermark_ranges()
522 (uint16_t)(bw_params->clk_table.entries[i - 1].dcfclk_mhz + 1); in dcn314_build_watermark_ranges()
525 (uint16_t)bw_params->clk_table.entries[i].dcfclk_mhz; in dcn314_build_watermark_ranges()
568 dcn314_build_watermark_ranges(clk_mgr_base->bw_params, table); in dcn314_notify_wm_ranges()
634 struct clk_bw_params *bw_params = clk_mgr->base.bw_params; in dcn314_clk_mgr_helper_populate_bw_params() local
635 …struct clk_limit_table_entry def_max = bw_params->clk_table.entries[bw_params->clk_table.num_entri… in dcn314_clk_mgr_helper_populate_bw_params()
677 for (j = bw_params->clk_table.num_entries - 1; j > 0; j--) in dcn314_clk_mgr_helper_populate_bw_params()
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/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/
H A Ddcn35_clk_mgr.c883 static void dcn35_build_watermark_ranges(struct clk_bw_params *bw_params, struct dcn35_watermarks *… in dcn35_build_watermark_ranges() argument
891 if (!bw_params->wm_table.entries[i].valid) in dcn35_build_watermark_ranges()
895 (uint8_t)bw_params->wm_table.entries[i].wm_inst; in dcn35_build_watermark_ranges()
897 (uint8_t)bw_params->wm_table.entries[i].wm_type; in dcn35_build_watermark_ranges()
908 (uint16_t)(bw_params->clk_table.entries[i - 1].dcfclk_mhz + 1); in dcn35_build_watermark_ranges()
911 (uint16_t)bw_params->clk_table.entries[i].dcfclk_mhz; in dcn35_build_watermark_ranges()
954 dcn35_build_watermark_ranges(clk_mgr_base->bw_params, table); in dcn35_notify_wm_ranges()
1043 struct clk_bw_params *bw_params = clk_mgr->base.bw_params; in dcn35_clk_mgr_helper_populate_bw_params() local
1044 …struct clk_limit_table_entry def_max = bw_params->clk_table.entries[bw_params->clk_table.num_entri… in dcn35_clk_mgr_helper_populate_bw_params()
1105 for (j = bw_params->clk_table.num_entries - 1; j > 0; j--) in dcn35_clk_mgr_helper_populate_bw_params()
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/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/
H A Ddcn31_clk_mgr.c426 static void dcn31_build_watermark_ranges(struct clk_bw_params *bw_params, struct dcn31_watermarks *… in dcn31_build_watermark_ranges() argument
434 if (!bw_params->wm_table.entries[i].valid) in dcn31_build_watermark_ranges()
438 (uint8_t)bw_params->wm_table.entries[i].wm_inst; in dcn31_build_watermark_ranges()
440 (uint8_t)bw_params->wm_table.entries[i].wm_type; in dcn31_build_watermark_ranges()
451 (uint16_t)(bw_params->clk_table.entries[i - 1].dcfclk_mhz + 1); in dcn31_build_watermark_ranges()
454 (uint16_t)bw_params->clk_table.entries[i].dcfclk_mhz; in dcn31_build_watermark_ranges()
497 dcn31_build_watermark_ranges(clk_mgr_base->bw_params, table); in dcn31_notify_wm_ranges()
568 struct clk_bw_params *bw_params = clk_mgr->base.bw_params; in dcn31_clk_mgr_helper_populate_bw_params() local
591 bw_params->clk_table.num_entries = j + 1; in dcn31_clk_mgr_helper_populate_bw_params()
602 for (entry_idx = 0; entry_idx < bw_params->clk_table.num_entries; entry_idx++, j--) { in dcn31_clk_mgr_helper_populate_bw_params()
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/linux/drivers/gpu/drm/amd/display/dc/dml/dcn31/
H A Ddcn31_fpu.h47 void dcn31_update_bw_bounding_box_fpu(struct dc *dc, struct clk_bw_params *bw_params);
48 void dcn315_update_bw_bounding_box_fpu(struct dc *dc, struct clk_bw_params *bw_params);
49 void dcn316_update_bw_bounding_box_fpu(struct dc *dc, struct clk_bw_params *bw_params);
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn20/
H A Ddcn20_fpu.h81 void dcn21_update_bw_bounding_box_fpu(struct dc *dc, struct clk_bw_params *bw_params);
83 void dcn21_clk_mgr_set_bw_params_wm_table(struct clk_bw_params *bw_params);
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn321/
H A Ddcn321_fpu.h32 void dcn321_update_bw_bounding_box_fpu(struct dc *dc, struct clk_bw_params *bw_params);
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn303/
H A Ddcn303_fpu.h29 void dcn303_fpu_update_bw_bounding_box(struct dc *dc, struct clk_bw_params *bw_params);
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn302/
H A Ddcn302_fpu.h30 void dcn302_fpu_update_bw_bounding_box(struct dc *dc, struct clk_bw_params *bw_params);
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn302/
H A Ddcn302_resource.h36 void dcn302_update_bw_bounding_box(struct dc *dc, struct clk_bw_params *bw_params);
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn303/
H A Ddcn303_resource.h36 void dcn303_update_bw_bounding_box(struct dc *dc, struct clk_bw_params *bw_params);
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn301/
H A Ddcn301_fpu.h30 void dcn301_fpu_update_bw_bounding_box(struct dc *dc, struct clk_bw_params *bw_params);
/linux/drivers/net/ethernet/broadcom/bnx2x/
H A Dbnx2x_link.h506 struct bnx2x_ets_bw_params bw_params; member
H A Dbnx2x_dcb.c592 ets_params.cos[i].params.bw_params.bw = in bnx2x_dcbx_update_ets_config()
H A Dbnx2x_link.c906 if (!ets_params->cos[cos_idx].params.bw_params.bw) { in bnx2x_ets_e3b0_get_total_bw()
912 ets_params->cos[cos_idx].params.bw_params.bw in bnx2x_ets_e3b0_get_total_bw()
916 ets_params->cos[cos_idx].params.bw_params.bw; in bnx2x_ets_e3b0_get_total_bw()
1185 ets_params->cos[cos_entry].params.bw_params.bw, in bnx2x_ets_e3b0_config()
/linux/drivers/gpu/drm/amd/display/dc/dml2_0/
H A Ddml2_wrapper_fpu.c436 copy_dummy_pstate_table(s->dummy_pstate_table, in_dc->clk_mgr->bw_params->dummy_pstate_table, 4); in dml2_validate_and_build_resource()
/linux/drivers/gpu/drm/amd/display/amdgpu_dm/
H A Damdgpu_dm_helpers.c1599 clk_mgr->bw_params->dc_mode_softmax_memclk : clk_mgr->bw_params->max_memclk_mhz; in dm_helpers_dp_handle_test_pattern_request()
/linux/drivers/gpu/drm/amd/display/dc/core/
H A Ddc.c1153 dc->res_pool->funcs->update_bw_bounding_box(dc, dc->clk_mgr->bw_params); in dc_construct()
6805 softMax = dc->clk_mgr->bw_params->dc_mode_softmax_memclk; in dc_enable_dcmode_clk_limit()
6806 for (i = 0; i < dc->clk_mgr->bw_params->clk_table.num_entries; i++) { in dc_enable_dcmode_clk_limit()
6807 if (dc->clk_mgr->bw_params->clk_table.entries[i].memclk_mhz > maxDPM) in dc_enable_dcmode_clk_limit()
6808 maxDPM = dc->clk_mgr->bw_params->clk_table.entries[i].memclk_mhz; in dc_enable_dcmode_clk_limit()