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Searched refs:asid_cache (Results 1 – 15 of 15) sorted by relevance

/linux/arch/sh/include/asm/
H A Dmmu_context.h37 #define asid_cache(cpu) (cpu_data[cpu].asid_cache) macro
57 unsigned long asid = asid_cache(cpu); in get_mmu_context()
80 cpu_context(cpu, mm) = asid_cache(cpu) = asid; in get_mmu_context()
153 if (asid_cache(cpu) == NO_CONTEXT) in enable_mmu()
154 asid_cache(cpu) = MMU_CONTEXT_FIRST_VERSION; in enable_mmu()
156 set_asid(asid_cache(cpu) & MMU_CONTEXT_ASID_MASK); in enable_mmu()
H A Dprocessor.h75 unsigned long asid_cache; member
/linux/arch/mips/mm/
H A Dcontext.c34 asid = asid_cache(cpu); in get_new_mmu_context()
43 asid_cache(cpu) = asid; in get_new_mmu_context()
59 if (!asid_versions_eq(cpu, cpu_context(cpu, mm), asid_cache(cpu))) in check_mmu_context()
76 mmid = xchg_relaxed(&cpu_data[cpu].asid_cache, 0); in flush_context()
210 old_active_mmid = READ_ONCE(cpu_data[cpu].asid_cache); in check_switch_mmu_context()
213 !cmpxchg_relaxed(&cpu_data[cpu].asid_cache, old_active_mmid, ctx)) { in check_switch_mmu_context()
220 WRITE_ONCE(cpu_data[cpu].asid_cache, ctx); in check_switch_mmu_context()
/linux/arch/loongarch/include/asm/
H A Dmmu_context.h35 #define asid_cache(cpu) (cpu_data[cpu].asid_cache) macro
40 if ((cpu_context(cpu, mm) ^ asid_cache(cpu)) & asid_version_mask(cpu)) in asid_valid()
54 u64 asid = asid_cache(cpu); in get_new_mmu_context()
59 cpu_context(cpu, mm) = asid_cache(cpu) = asid; in get_new_mmu_context()
H A Dcpu-info.h36 u64 asid_cache; member
/linux/arch/arc/include/asm/
H A Dmmu_context.h52 DECLARE_PER_CPU(unsigned int, asid_cache);
53 #define asid_cpu(cpu) per_cpu(asid_cache, cpu)
/linux/arch/xtensa/include/asm/
H A Dmmu_context.h34 DECLARE_PER_CPU(unsigned long, asid_cache);
35 #define cpu_asid_cache(cpu) per_cpu(asid_cache, cpu)
/linux/arch/mips/include/asm/
H A Dmmu_context.h123 #define asid_cache(cpu) (cpu_data[cpu].asid_cache) macro
H A Dcpu-info.h53 u64 asid_cache; member
/linux/arch/csky/include/asm/
H A Dprocessor.h18 unsigned long asid_cache; member
/linux/arch/xtensa/mm/
H A Dmmu.c21 DEFINE_PER_CPU(unsigned long, asid_cache) = ASID_USER_FIRST;
/linux/arch/sh/kernel/cpu/
H A Dinit.c342 current_cpu_data.asid_cache = NO_CONTEXT; in cpu_init()
/linux/arch/loongarch/kernel/
H A Dtraps.c1129 if (!cpu_data[cpu].asid_cache) in per_cpu_trap_init()
1130 cpu_data[cpu].asid_cache = asid_first_version(cpu); in per_cpu_trap_init()
/linux/arch/mips/kernel/
H A Dtraps.c2264 cpu_data[cpu].asid_cache = 0; in per_cpu_trap_init()
2265 else if (!cpu_data[cpu].asid_cache) in per_cpu_trap_init()
2266 cpu_data[cpu].asid_cache = asid_first_version(cpu); in per_cpu_trap_init()
/linux/arch/arc/mm/
H A Dtlb.c19 DEFINE_PER_CPU(unsigned int, asid_cache) = MM_CTXT_FIRST_CYCLE;