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Searched refs:amdgpu_ip_version (Results 1 – 25 of 68) sorted by relevance

123

/linux/drivers/gpu/drm/amd/amdgpu/
H A Dhdp_v4_0.c42 if (amdgpu_ip_version(adev, HDP_HWIP, 0) == IP_VERSION(4, 4, 0) || in hdp_v4_0_invalidate_hdp()
43 amdgpu_ip_version(adev, HDP_HWIP, 0) == IP_VERSION(4, 4, 2) || in hdp_v4_0_invalidate_hdp()
44 amdgpu_ip_version(adev, HDP_HWIP, 0) == IP_VERSION(4, 4, 5)) in hdp_v4_0_invalidate_hdp()
76 if (amdgpu_ip_version(adev, HDP_HWIP, 0) >= IP_VERSION(4, 4, 0)) in hdp_v4_0_reset_ras_error_count()
88 if (amdgpu_ip_version(adev, HDP_HWIP, 0) == IP_VERSION(4, 0, 0) || in hdp_v4_0_update_clock_gating()
89 amdgpu_ip_version(adev, HDP_HWIP, 0) == IP_VERSION(4, 0, 1) || in hdp_v4_0_update_clock_gating()
90 amdgpu_ip_version(adev, HDP_HWIP, 0) == IP_VERSION(4, 1, 1) || in hdp_v4_0_update_clock_gating()
91 amdgpu_ip_version(adev, HDP_HWIP, 0) == IP_VERSION(4, 1, 0)) { in hdp_v4_0_update_clock_gating()
125 if (amdgpu_ip_version(adev, HDP_HWIP, 0) == IP_VERSION(4, 4, 2) || in hdp_v4_0_get_clockgating_state()
126 amdgpu_ip_version(adev, HDP_HWIP, 0) == IP_VERSION(4, 4, 5)) { in hdp_v4_0_get_clockgating_state()
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H A Dgmc_v9_0.c630 (amdgpu_ip_version(adev, GC_HWIP, 0) < IP_VERSION(9, 4, 2))) in gmc_v9_0_process_interrupt()
640 (amdgpu_ip_version(adev, GC_HWIP, 0) >= IP_VERSION(9, 4, 2))) in gmc_v9_0_process_interrupt()
736 if (amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(9, 4, 2) || in gmc_v9_0_use_invalidate_semaphore()
848 (amdgpu_ip_version(adev, GC_HWIP, 0) < IP_VERSION(9, 4, 2))) in gmc_v9_0_flush_gpu_tlb()
1059 uint32_t gc_ip_version = amdgpu_ip_version(adev, GC_HWIP, 0); in gmc_v9_0_get_coherence_flags()
1211 amdgpu_ip_version(adev, GC_HWIP, 0) != IP_VERSION(9, 4, 3)) in gmc_v9_0_override_vm_pte_flags()
1289 switch (amdgpu_ip_version(adev, DCE_HWIP, 0)) { in gmc_v9_0_get_vbios_fb_size()
1351 switch (amdgpu_ip_version(adev, UMC_HWIP, 0)) { in gmc_v9_0_set_umc_funcs()
1405 switch (amdgpu_ip_version(adev, MMHUB_HWIP, 0)) { in gmc_v9_0_init_mmhub_client_info()
1451 switch (amdgpu_ip_version(adev, MMHUB_HWIP, 0)) { in gmc_v9_0_set_mmhub_funcs()
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H A Dathub_v4_1_0.c34 switch (amdgpu_ip_version(adev, ATHUB_HWIP, 0)) { in athub_v4_1_0_get_cg_cntl()
47 switch (amdgpu_ip_version(adev, ATHUB_HWIP, 0)) { in athub_v4_1_0_set_cg_cntl()
96 switch (amdgpu_ip_version(adev, ATHUB_HWIP, 0)) { in athub_v4_1_0_set_clockgating()
H A Dathub_v3_0.c41 switch (amdgpu_ip_version(adev, ATHUB_HWIP, 0)) { in athub_v3_0_get_cg_cntl()
57 switch (amdgpu_ip_version(adev, ATHUB_HWIP, 0)) { in athub_v3_0_set_cg_cntl()
110 switch (amdgpu_ip_version(adev, ATHUB_HWIP, 0)) { in athub_v3_0_set_clockgating()
H A Damdgpu_discovery.c446 if ((amdgpu_ip_version(adev, UVD_HWIP, 1) == IP_VERSION(3, 0, 1)) && in amdgpu_discovery_harvest_config_quirk()
447 (amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(10, 3, 2))) { in amdgpu_discovery_harvest_config_quirk()
1125 if (!amdgpu_ip_version(adev, VCE_HWIP, 0)) in amdgpu_discovery_get_harvest_info()
1683 if (amdgpu_ip_version(adev, GC_HWIP, 0) < IP_VERSION(10, 2, 0) && in amdgpu_discovery_harvest_ip()
2059 switch (amdgpu_ip_version(adev, GC_HWIP, 0)) { in amdgpu_discovery_set_common_ip_blocks()
2110 amdgpu_ip_version(adev, GC_HWIP, 0)); in amdgpu_discovery_set_common_ip_blocks()
2119 switch (amdgpu_ip_version(adev, GC_HWIP, 0)) { in amdgpu_discovery_set_gmc_ip_blocks()
2167 amdgpu_ip_version(adev, GC_HWIP, 0)); in amdgpu_discovery_set_gmc_ip_blocks()
2175 switch (amdgpu_ip_version(adev, OSSSYS_HWIP, 0)) { in amdgpu_discovery_set_ih_ip_blocks()
2214 amdgpu_ip_version(adev, OSSSYS_HWIP, 0)); in amdgpu_discovery_set_ih_ip_blocks()
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H A Dhdp_v6_0.c44 if (amdgpu_ip_version(adev, HDP_HWIP, 0) == IP_VERSION(6, 1, 0)) in hdp_v6_0_update_clock_gating()
54 if (amdgpu_ip_version(adev, HDP_HWIP, 0) == IP_VERSION(6, 1, 0)) in hdp_v6_0_update_clock_gating()
119 if (amdgpu_ip_version(adev, HDP_HWIP, 0) == IP_VERSION(6, 1, 0)) in hdp_v6_0_update_clock_gating()
H A Dvpe_v6_1.c135 if (amdgpu_ip_version(adev, VPE_HWIP, 0) == IP_VERSION(6, 1, 1)) in vpe_v6_1_load_microcode()
142 if (amdgpu_ip_version(adev, VPE_HWIP, 0) == IP_VERSION(6, 1, 1)) in vpe_v6_1_load_microcode()
283 if (amdgpu_ip_version(adev, VPE_HWIP, 0) == IP_VERSION(6, 1, 1)) in vpe_v_6_1_ring_stop()
290 if (amdgpu_ip_version(adev, VPE_HWIP, 0) == IP_VERSION(6, 1, 1)) { in vpe_v_6_1_ring_stop()
317 if (amdgpu_ip_version(adev, VPE_HWIP, 0) == IP_VERSION(6, 1, 1)) in vpe_v6_1_set_trap_irq_state()
325 if (amdgpu_ip_version(adev, VPE_HWIP, 0) == IP_VERSION(6, 1, 1)) in vpe_v6_1_set_trap_irq_state()
361 if (amdgpu_ip_version(adev, VPE_HWIP, 0) == IP_VERSION(6, 1, 1)) in vpe_v6_1_set_regs()
H A Dnbif_v6_3_1.c72 if (amdgpu_ip_version(adev, NBIO_HWIP, 0) == IP_VERSION(7, 11, 4)) in nbif_v6_3_1_get_rev_id()
133 if (amdgpu_ip_version(adev, NBIO_HWIP, 0) == IP_VERSION(7, 11, 4)) { in nbif_v6_3_1_sdma_doorbell_range()
179 if (amdgpu_ip_version(adev, NBIO_HWIP, 0) == IP_VERSION(7, 11, 4)) { in nbif_v6_3_1_vcn_doorbell_range()
194 if (amdgpu_ip_version(adev, NBIO_HWIP, 0) == IP_VERSION(7, 11, 4)) { in nbif_v6_3_1_gc_doorbell_init()
265 if (amdgpu_ip_version(adev, NBIO_HWIP, 0) == IP_VERSION(7, 11, 4)) { in nbif_v6_3_1_ih_doorbell_range()
324 if (amdgpu_ip_version(adev, NBIO_HWIP, 0) == IP_VERSION(7, 11, 4)) { in nbif_v6_3_1_get_pcie_index_offset()
334 if (amdgpu_ip_version(adev, NBIO_HWIP, 0) == IP_VERSION(7, 11, 4)) in nbif_v6_3_1_get_pcie_data_offset()
H A Dumsch_mm_v4_0.c64 if (amdgpu_ip_version(adev, VCN_HWIP, 0) >= IP_VERSION(4, 0, 5)) { in umsch_mm_v4_0_load_microcode()
258 if (amdgpu_ip_version(adev, VCN_HWIP, 0) >= IP_VERSION(4, 0, 5)) { in umsch_mm_v4_0_ring_stop()
298 IP_VERSION_MAJ_MIN_REV(amdgpu_ip_version(adev, MMHUB_HWIP, 0)); in umsch_mm_v4_0_set_hw_resources()
303 IP_VERSION_MAJ_MIN_REV(amdgpu_ip_version(adev, OSSSYS_HWIP, 0)); in umsch_mm_v4_0_set_hw_resources()
306 IP_VERSION_MAJ_MIN_REV(amdgpu_ip_version(adev, VCN_HWIP, 0)); in umsch_mm_v4_0_set_hw_resources()
308 IP_VERSION_MAJ_MIN_REV(amdgpu_ip_version(adev, VPE_HWIP, 0)); in umsch_mm_v4_0_set_hw_resources()
H A Damdgpu_sdma.c258 if ((amdgpu_ip_version(adev, SDMA0_HWIP, 0) == in amdgpu_sdma_init_microcode()
260 amdgpu_ip_version(adev, SDMA0_HWIP, 0) == in amdgpu_sdma_init_microcode()
262 amdgpu_ip_version(adev, SDMA0_HWIP, 0) == in amdgpu_sdma_init_microcode()
526 if (amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(9, 4, 3) || in amdgpu_sdma_is_shared_inv_eng()
527 amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(9, 4, 4) || in amdgpu_sdma_is_shared_inv_eng()
528 amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(9, 5, 0)) in amdgpu_sdma_is_shared_inv_eng()
H A Dmmhub_v2_0.c508 switch (amdgpu_ip_version(adev, MMHUB_HWIP, 0)) { in mmhub_v2_0_init_client_info()
583 switch (amdgpu_ip_version(adev, MMHUB_HWIP, 0)) { in mmhub_v2_0_update_medium_grain_clock_gating()
616 switch (amdgpu_ip_version(adev, MMHUB_HWIP, 0)) { in mmhub_v2_0_update_medium_grain_clock_gating()
640 switch (amdgpu_ip_version(adev, MMHUB_HWIP, 0)) { in mmhub_v2_0_update_medium_grain_light_sleep()
666 switch (amdgpu_ip_version(adev, MMHUB_HWIP, 0)) { in mmhub_v2_0_set_clockgating()
691 switch (amdgpu_ip_version(adev, MMHUB_HWIP, 0)) { in mmhub_v2_0_get_clockgating()
H A Dsdma_v4_0.c518 switch (amdgpu_ip_version(adev, SDMA0_HWIP, 0)) { in sdma_v4_0_init_golden_registers()
588 switch (amdgpu_ip_version(adev, SDMA0_HWIP, 0)) { in sdma_v4_0_setup_ulv()
627 if (amdgpu_ip_version(adev, SDMA0_HWIP, 0) == in sdma_v4_0_init_microcode()
629 amdgpu_ip_version(adev, SDMA0_HWIP, 0) == in sdma_v4_0_init_microcode()
1025 if (amdgpu_ip_version(adev, SDMA0_HWIP, 0) == in sdma_v4_0_ctx_switch_enable()
1303 switch (amdgpu_ip_version(adev, SDMA0_HWIP, 0)) { in sdma_v4_0_init_pg()
1740 switch (amdgpu_ip_version(adev, SDMA0_HWIP, 0)) { in sdma_v4_0_fw_support_paging_queue()
1771 if ((amdgpu_ip_version(adev, SDMA0_HWIP, 0) == IP_VERSION(4, 0, 0)) && in sdma_v4_0_early_init()
1870 if (amdgpu_ip_version(adev, SDMA0_HWIP, 0) == in sdma_v4_0_sw_init()
1892 if (amdgpu_ip_version(adev, SDMA0_HWIP, 0) >= in sdma_v4_0_sw_init()
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H A Dsoc21.c175 switch (amdgpu_ip_version(adev, UVD_HWIP, 0)) { in soc21_query_video_codecs()
414 switch (amdgpu_ip_version(adev, MP1_HWIP, 0)) { in soc21_asic_reset_method()
492 switch (amdgpu_ip_version(adev, GC_HWIP, 0)) { in soc21_need_full_reset()
606 switch (amdgpu_ip_version(adev, GC_HWIP, 0)) { in soc21_common_early_init()
1014 switch (amdgpu_ip_version(adev, NBIO_HWIP, 0)) { in soc21_common_set_clockgating_state()
1042 switch (amdgpu_ip_version(adev, LSDMA_HWIP, 0)) { in soc21_common_set_powergating_state()
H A Dgfx_v9_0.c1098 switch (amdgpu_ip_version(adev, GC_HWIP, 0)) { in gfx_v9_0_init_golden_registers()
1154 if ((amdgpu_ip_version(adev, GC_HWIP, 0) != IP_VERSION(9, 4, 1)) && in gfx_v9_0_init_golden_registers()
1155 (amdgpu_ip_version(adev, GC_HWIP, 0) != IP_VERSION(9, 4, 2))) in gfx_v9_0_init_golden_registers()
1298 if ((amdgpu_ip_version(adev, GC_HWIP, 0) != IP_VERSION(9, 4, 1)) && in gfx_v9_0_check_fw_write_wait()
1299 (amdgpu_ip_version(adev, GC_HWIP, 0) != IP_VERSION(9, 4, 2)) && in gfx_v9_0_check_fw_write_wait()
1307 switch (amdgpu_ip_version(adev, GC_HWIP, 0)) { in gfx_v9_0_check_fw_write_wait()
1411 if ((amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(9, 3, 0)) && in check_if_enlarge_doorbell_range()
1424 switch (amdgpu_ip_version(adev, GC_HWIP, 0)) { in gfx_v9_0_check_if_need_gfxoff()
1541 if (amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(9, 4, 2) || in gfx_v9_0_load_mec2_fw_bin_support()
1542 amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(9, 4, 1) || in gfx_v9_0_load_mec2_fw_bin_support()
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H A Damdgpu_vcn.c158 if (amdgpu_ip_version(adev, UVD_HWIP, 0) == IP_VERSION(3, 0, 2)) { in amdgpu_vcn_sw_init()
171 amdgpu_ip_version(adev, UVD_HWIP, 0) >= IP_VERSION(4, 0, 0); in amdgpu_vcn_sw_init()
209 if (amdgpu_ip_version(adev, UVD_HWIP, 0) >= IP_VERSION(5, 0, 0)) { in amdgpu_vcn_sw_init()
212 } else if (amdgpu_ip_version(adev, UVD_HWIP, 0) >= IP_VERSION(4, 0, 0)) { in amdgpu_vcn_sw_init()
1100 if ((amdgpu_ip_version(adev, UVD_HWIP, 0) != IP_VERSION(4, 0, 3)) && in amdgpu_vcn_unified_ring_test_ib()
1101 (amdgpu_ip_version(adev, UVD_HWIP, 0) != IP_VERSION(5, 0, 1)) && in amdgpu_vcn_unified_ring_test_ib()
1102 (amdgpu_ip_version(adev, UVD_HWIP, 0) != IP_VERSION(5, 0, 2))) { in amdgpu_vcn_unified_ring_test_ib()
1138 if ((amdgpu_ip_version(adev, UVD_HWIP, 0) == IP_VERSION(4, 0, 3) || in amdgpu_vcn_setup_ucode()
1139 amdgpu_ip_version(adev, UVD_HWIP, 0) == IP_VERSION(5, 0, 1) || in amdgpu_vcn_setup_ucode()
1140 amdgpu_ip_version(adev, UVD_HWIP, 0) == IP_VERSION(5, 0, 2)) in amdgpu_vcn_setup_ucode()
H A Dathub_v2_1.c73 switch (amdgpu_ip_version(adev, ATHUB_HWIP, 0)) { in athub_v2_1_set_clockgating()
H A Dathub_v2_0.c80 switch (amdgpu_ip_version(adev, ATHUB_HWIP, 0)) { in athub_v2_0_set_clockgating()
H A Dathub_v1_0.c71 switch (amdgpu_ip_version(adev, ATHUB_HWIP, 0)) { in athub_v1_0_set_clockgating()
H A Damdgpu_vm.h123 …((amdgpu_ip_version((adev), GC_HWIP, 0) >= IP_VERSION(12, 0, 0)) ? AMDGPU_PTE_PRT_GFX12 : AMDGPU_P…
138 …((amdgpu_ip_version((adev), GC_HWIP, 0) >= IP_VERSION(12, 0, 0)) ? AMDGPU_PDE_BFS_GFX12(a) : AMDGP…
142 …((amdgpu_ip_version((adev), GC_HWIP, 0) >= IP_VERSION(12, 0, 0)) ? AMDGPU_PDE_PTE_GFX12 : AMDGPU_P…
H A Damdgpu_device.c889 if (amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(9, 4, 3) || in amdgpu_device_asic_init()
890 amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(9, 4, 4) || in amdgpu_device_asic_init()
891 amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(9, 5, 0) || in amdgpu_device_asic_init()
892 amdgpu_ip_version(adev, GC_HWIP, 0) >= IP_VERSION(11, 0, 0)) { in amdgpu_device_asic_init()
1299 return amdgpu_ip_version(adev, DCE_HWIP, 0) >= IP_VERSION(3, 0, 0); in amdgpu_device_seamless_boot_supported()
2003 if (amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(9, 4, 3) && in amdgpu_device_ip_early_init()
2032 amdgpu_ip_version((adev), GC_HWIP, 0) == IP_VERSION(9, 4, 4); in amdgpu_device_ip_early_init()
2784 if (amdgpu_ip_version(adev, GC_HWIP, 0) > IP_VERSION(9, 0, 0)) in amdgpu_device_smu_fini_early()
2847 amdgpu_ip_version(adev, GC_HWIP, 0) < IP_VERSION(11, 0, 0)) { in amdgpu_device_ip_fini_early()
3050 amdgpu_ip_version(adev, GC_HWIP, 0) >= IP_VERSION(10, 0, 0)) in amdgpu_device_ip_suspend_phase2()
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H A Damdgpu_amdkfd.c733 if ((IP_VERSION_MAJ(amdgpu_ip_version(adev, GC_HWIP, 0)) == 11 && in amdgpu_amdkfd_set_compute_idle()
735 (IP_VERSION_MAJ(amdgpu_ip_version(adev, GC_HWIP, 0)) == 12)) { in amdgpu_amdkfd_set_compute_idle()
738 } else if ((IP_VERSION_MAJ(amdgpu_ip_version(adev, GC_HWIP, 0)) == 9) && in amdgpu_amdkfd_set_compute_idle()
/linux/drivers/gpu/drm/amd/pm/swsmu/smu11/
H A Dsmu_v11_0.c103 ((amdgpu_ip_version(adev, MP1_HWIP, 0) == IP_VERSION(11, 0, 9)) || in smu_v11_0_init_microcode()
104 (amdgpu_ip_version(adev, MP1_HWIP, 0) == IP_VERSION(11, 0, 7)))) in smu_v11_0_init_microcode()
398 u32 ip_version = amdgpu_ip_version(adev, MP1_HWIP, 0); in smu_v11_0_init_power()
657 if (amdgpu_ip_version(adev, MP1_HWIP, 0) == IP_VERSION(11, 0, 11) || in smu_v11_0_init_display_count()
658 amdgpu_ip_version(adev, MP1_HWIP, 0) == IP_VERSION(11, 5, 0) || in smu_v11_0_init_display_count()
659 amdgpu_ip_version(adev, MP1_HWIP, 0) == IP_VERSION(11, 5, 2) || in smu_v11_0_init_display_count()
660 amdgpu_ip_version(adev, MP1_HWIP, 0) == IP_VERSION(11, 0, 12) || in smu_v11_0_init_display_count()
661 amdgpu_ip_version(adev, MP1_HWIP, 0) == IP_VERSION(11, 0, 13)) in smu_v11_0_init_display_count()
1036 switch (amdgpu_ip_version(adev, MP1_HWIP, 0)) { in smu_v11_0_gfx_off_control()
1535 switch (amdgpu_ip_version(adev, MP1_HWIP, 0)) { in smu_v11_0_baco_set_state()
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/linux/drivers/gpu/drm/amd/pm/swsmu/smu13/
H A Dsmu_v13_0_6_ppt.c264 else if (amdgpu_ip_version(smu->adev, MP1_HWIP, 0) == in smu_v13_0_6_get_metrics_version()
471 switch (amdgpu_ip_version(smu->adev, MP1_HWIP, 0)) { in smu_v13_0_x_init_caps()
507 (amdgpu_ip_version(smu->adev, MP1_HWIP, 0) == IP_VERSION(13, 0, 12))) in smu_v13_0_6_init_microcode()
607 if (amdgpu_ip_version(smu->adev, MP1_HWIP, 0) == in smu_v13_0_6_tables_init()
750 if (amdgpu_ip_version(smu->adev, MP1_HWIP, 0) == IP_VERSION(13, 0, 12)) in smu_v13_0_6_fini_smc_tables()
821 amdgpu_ip_version(smu->adev, MP1_HWIP, 0); in smu_v13_0_6_get_pm_metrics()
894 if (amdgpu_ip_version(smu->adev, MP1_HWIP, 0) == IP_VERSION(13, 0, 12) && in smu_v13_0_6_setup_driver_pptable()
1281 if (amdgpu_ip_version(smu->adev, MP1_HWIP, 0) == IP_VERSION(13, 0, 12) && in smu_v13_0_6_get_smu_metrics_data()
2385 if (amdgpu_ip_version(smu->adev, MP1_HWIP, 0) == IP_VERSION(13, 0, 12)) in smu_v13_0_6_is_dpm_running()
2689 if (amdgpu_ip_version(smu->adev, MP1_HWIP, 0) == in smu_v13_0_6_get_xcp_metrics()
[all …]
/linux/drivers/gpu/drm/amd/amdkfd/
H A Dkfd_device.c70 uint32_t sdma_version = amdgpu_ip_version(kfd->adev, SDMA0_HWIP, 0); in kfd_device_info_set_sdma_info()
301 switch (amdgpu_ip_version(adev, GC_HWIP, 0)) { in kgd2kfd_probe()
470 if (amdgpu_ip_version(adev, GC_HWIP, 0)) in kgd2kfd_probe()
473 amdgpu_ip_version(adev, GC_HWIP, 0), in kgd2kfd_probe()
1712 src_data_idx = (amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(12, 1, 0)) ? in kgd2kfd_vmfault_fast_path()
/linux/drivers/gpu/drm/amd/display/amdgpu_dm/
H A Damdgpu_dm.c1372 switch (amdgpu_ip_version(adev, DCE_HWIP, 0)) { in dm_dmub_hw_init()
1416 switch (amdgpu_ip_version(adev, DCE_HWIP, 0)) { in dm_dmub_hw_init()
1820 switch (amdgpu_ip_version(adev, DCE_HWIP, 0)) { in dm_dmub_get_vbios_bounding_box()
1865 switch (amdgpu_ip_version(adev, DCE_HWIP, 0)) { in dm_get_default_ips_mode()
1876 if (amdgpu_ip_version(adev, DCE_HWIP, 0) < IP_VERSION(3, 5, 0)) in dm_get_default_ips_mode()
1907 if (amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(11, 5, 4)) in amdgpu_dm_init()
1928 switch (amdgpu_ip_version(adev, DCE_HWIP, 0)) { in amdgpu_dm_init()
1960 if (amdgpu_ip_version(adev, DCE_HWIP, 0) == IP_VERSION(2, 0, 3)) in amdgpu_dm_init()
2014 if (amdgpu_ip_version(adev, DCE_HWIP, 0) >= IP_VERSION(3, 5, 0)) in amdgpu_dm_init()
2018 if (amdgpu_ip_version(adev, DCE_HWIP, 0) >= IP_VERSION(3, 0, 0)) in amdgpu_dm_init()
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