/linux/drivers/gpu/drm/amd/amdgpu/ |
H A D | amdgpu_discovery.c | 357 if ((amdgpu_ip_version(adev, UVD_HWIP, 1) == IP_VERSION(3, 0, 1)) && in amdgpu_discovery_harvest_config_quirk() 358 (amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(10, 3, 2))) { in amdgpu_discovery_harvest_config_quirk() 1469 if (amdgpu_ip_version(adev, GC_HWIP, 0) < IP_VERSION(10, 2, 0) && in amdgpu_discovery_harvest_ip() 1470 amdgpu_ip_version(adev, GC_HWIP, 0) != IP_VERSION(9, 4, 3) && in amdgpu_discovery_harvest_ip() 1471 amdgpu_ip_version(adev, GC_HWIP, 0) != IP_VERSION(9, 4, 4)) { in amdgpu_discovery_harvest_ip() 1788 switch (amdgpu_ip_version(adev, GC_HWIP, 0)) { in amdgpu_discovery_set_common_ip_blocks() 1833 amdgpu_ip_version(adev, GC_HWIP, 0)); in amdgpu_discovery_set_common_ip_blocks() 1842 switch (amdgpu_ip_version(adev, GC_HWIP, 0)) { in amdgpu_discovery_set_gmc_ip_blocks() 1886 amdgpu_ip_version(adev, GC_HWIP, 0)); in amdgpu_discovery_set_gmc_ip_blocks() 1894 switch (amdgpu_ip_version(adev, OSSSYS_HWIP, 0)) { in amdgpu_discovery_set_ih_ip_blocks() [all …]
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H A D | athub_v4_1_0.c | 34 switch (amdgpu_ip_version(adev, ATHUB_HWIP, 0)) { in athub_v4_1_0_get_cg_cntl() 47 switch (amdgpu_ip_version(adev, ATHUB_HWIP, 0)) { in athub_v4_1_0_set_cg_cntl() 96 switch (amdgpu_ip_version(adev, ATHUB_HWIP, 0)) { in athub_v4_1_0_set_clockgating()
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H A D | vega20_ih.c | 295 if ((amdgpu_ip_version(adev, OSSSYS_HWIP, 0) == IP_VERSION(4, 2, 1)) && in vega20_ih_irq_init() 308 if ((amdgpu_ip_version(adev, OSSSYS_HWIP, 0) == IP_VERSION(4, 4, 0)) || in vega20_ih_irq_init() 309 (amdgpu_ip_version(adev, OSSSYS_HWIP, 0) == IP_VERSION(4, 4, 2)) || in vega20_ih_irq_init() 310 (amdgpu_ip_version(adev, OSSSYS_HWIP, 0) == IP_VERSION(4, 4, 5))) { in vega20_ih_irq_init() 340 if (amdgpu_ip_version(adev, OSSSYS_HWIP, 0) == IP_VERSION(4, 4, 0) || in vega20_ih_irq_init() 341 amdgpu_ip_version(adev, OSSSYS_HWIP, 0) == IP_VERSION(4, 4, 2) || in vega20_ih_irq_init() 342 amdgpu_ip_version(adev, OSSSYS_HWIP, 0) == IP_VERSION(4, 4, 5)) in vega20_ih_irq_init() 550 (amdgpu_ip_version(adev, OSSSYS_HWIP, 0) == IP_VERSION(4, 4, 2))) in vega20_ih_sw_init() 567 if (amdgpu_ip_version(adev, OSSSYS_HWIP, 0) != IP_VERSION(4, 4, 2) && in vega20_ih_sw_init() 568 amdgpu_ip_version(adev, OSSSYS_HWIP, 0) != IP_VERSION(4, 4, 5)) { in vega20_ih_sw_init()
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H A D | athub_v3_0.c | 41 switch (amdgpu_ip_version(adev, ATHUB_HWIP, 0)) { in athub_v3_0_get_cg_cntl() 57 switch (amdgpu_ip_version(adev, ATHUB_HWIP, 0)) { in athub_v3_0_set_cg_cntl() 110 switch (amdgpu_ip_version(adev, ATHUB_HWIP, 0)) { in athub_v3_0_set_clockgating()
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H A D | soc15.c | 177 if (amdgpu_ip_version(adev, VCE_HWIP, 0)) { in soc15_query_video_codecs() 178 switch (amdgpu_ip_version(adev, VCE_HWIP, 0)) { in soc15_query_video_codecs() 190 switch (amdgpu_ip_version(adev, UVD_HWIP, 0)) { in soc15_query_video_codecs() 327 if (amdgpu_ip_version(adev, MP1_HWIP, 0) == IP_VERSION(12, 0, 0) || in soc15_get_xclk() 328 amdgpu_ip_version(adev, MP1_HWIP, 0) == IP_VERSION(12, 0, 1) || in soc15_get_xclk() 329 amdgpu_ip_version(adev, MP1_HWIP, 0) == IP_VERSION(13, 0, 6) || in soc15_get_xclk() 330 amdgpu_ip_version(adev, MP1_HWIP, 0) == IP_VERSION(13, 0, 14)) in soc15_get_xclk() 332 if (amdgpu_ip_version(adev, MP1_HWIP, 0) == IP_VERSION(10, 0, 0) || in soc15_get_xclk() 333 amdgpu_ip_version(adev, MP1_HWIP, 0) == IP_VERSION(10, 0, 1)) in soc15_get_xclk() 527 switch (amdgpu_ip_version(adev, MP1_HWIP, 0)) { in soc15_asic_reset_method() [all …]
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H A D | vpe_v6_1.c | 135 if (amdgpu_ip_version(adev, VPE_HWIP, 0) == IP_VERSION(6, 1, 1)) in vpe_v6_1_load_microcode() 142 if (amdgpu_ip_version(adev, VPE_HWIP, 0) == IP_VERSION(6, 1, 1)) in vpe_v6_1_load_microcode() 283 if (amdgpu_ip_version(adev, VPE_HWIP, 0) == IP_VERSION(6, 1, 1)) in vpe_v_6_1_ring_stop() 290 if (amdgpu_ip_version(adev, VPE_HWIP, 0) == IP_VERSION(6, 1, 1)) { in vpe_v_6_1_ring_stop() 317 if (amdgpu_ip_version(adev, VPE_HWIP, 0) == IP_VERSION(6, 1, 1)) in vpe_v6_1_set_trap_irq_state() 325 if (amdgpu_ip_version(adev, VPE_HWIP, 0) == IP_VERSION(6, 1, 1)) in vpe_v6_1_set_trap_irq_state() 361 if (amdgpu_ip_version(adev, VPE_HWIP, 0) == IP_VERSION(6, 1, 1)) in vpe_v6_1_set_regs()
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H A D | hdp_v6_0.c | 54 if (amdgpu_ip_version(adev, HDP_HWIP, 0) == IP_VERSION(6, 1, 0)) in hdp_v6_0_update_clock_gating() 64 if (amdgpu_ip_version(adev, HDP_HWIP, 0) == IP_VERSION(6, 1, 0)) in hdp_v6_0_update_clock_gating() 129 if (amdgpu_ip_version(adev, HDP_HWIP, 0) == IP_VERSION(6, 1, 0)) in hdp_v6_0_update_clock_gating()
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H A D | psp_v13_0.c | 94 switch (amdgpu_ip_version(adev, MP0_HWIP, 0)) { in psp_v13_0_init_microcode() 179 ((amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 6) || in psp_v13_0_wait_for_bootloader() 180 amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 14))) ? in psp_v13_0_wait_for_bootloader() 205 if (amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 6) || in psp_v13_0_wait_for_bootloader_steady_state() 206 amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 14)) { in psp_v13_0_wait_for_bootloader_steady_state() 770 if (amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 10)) { in psp_v13_0_fatal_error_recovery_quirk() 800 if ((amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 6) || in psp_v13_0_get_ras_capability() 801 amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 14)) && in psp_v13_0_get_ras_capability() 817 if (amdgpu_ip_version(adev, MP0_HWIP, 0) != IP_VERSION(13, 0, 6)) in psp_v13_0_is_aux_sos_load_required()
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H A D | nbio_v7_2.c | 62 switch (amdgpu_ip_version(adev, NBIO_HWIP, 0)) { in nbio_v7_2_get_rev_id() 81 switch (amdgpu_ip_version(adev, NBIO_HWIP, 0)) { in nbio_v7_2_mc_access_enable() 265 switch (amdgpu_ip_version(adev, NBIO_HWIP, 0)) { in nbio_v7_2_update_medium_grain_light_sleep() 372 switch (amdgpu_ip_version(adev, NBIO_HWIP, 0)) { in nbio_v7_2_init_registers() 397 switch (amdgpu_ip_version(adev, NBIO_HWIP, 0)) { in nbio_v7_2_init_registers()
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H A D | soc24.c | 80 switch (amdgpu_ip_version(adev, UVD_HWIP, 0)) { in soc24_query_video_codecs() 205 switch (amdgpu_ip_version(adev, MP1_HWIP, 0)) { in soc24_asic_reset_method() 263 switch (amdgpu_ip_version(adev, GC_HWIP, 0)) { in soc24_need_full_reset() 389 switch (amdgpu_ip_version(adev, GC_HWIP, 0)) { in soc24_common_early_init() 549 switch (amdgpu_ip_version(adev, NBIO_HWIP, 0)) { in soc24_common_set_clockgating_state() 569 switch (amdgpu_ip_version(adev, LSDMA_HWIP, 0)) { in soc24_common_set_powergating_state()
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H A D | umsch_mm_v4_0.c | 64 if (amdgpu_ip_version(adev, VCN_HWIP, 0) >= IP_VERSION(4, 0, 5)) { in umsch_mm_v4_0_load_microcode() 258 if (amdgpu_ip_version(adev, VCN_HWIP, 0) >= IP_VERSION(4, 0, 5)) { in umsch_mm_v4_0_ring_stop() 298 IP_VERSION_MAJ_MIN_REV(amdgpu_ip_version(adev, MMHUB_HWIP, 0)); in umsch_mm_v4_0_set_hw_resources() 303 IP_VERSION_MAJ_MIN_REV(amdgpu_ip_version(adev, OSSSYS_HWIP, 0)); in umsch_mm_v4_0_set_hw_resources() 306 IP_VERSION_MAJ_MIN_REV(amdgpu_ip_version(adev, VCN_HWIP, 0)); in umsch_mm_v4_0_set_hw_resources() 308 IP_VERSION_MAJ_MIN_REV(amdgpu_ip_version(adev, VPE_HWIP, 0)); in umsch_mm_v4_0_set_hw_resources()
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H A D | mmhub_v2_0.c | 154 switch (amdgpu_ip_version(adev, MMHUB_HWIP, 0)) { in mmhub_v2_0_print_l2_protection_fault_status() 571 switch (amdgpu_ip_version(adev, MMHUB_HWIP, 0)) { in mmhub_v2_0_update_medium_grain_clock_gating() 604 switch (amdgpu_ip_version(adev, MMHUB_HWIP, 0)) { in mmhub_v2_0_update_medium_grain_clock_gating() 628 switch (amdgpu_ip_version(adev, MMHUB_HWIP, 0)) { in mmhub_v2_0_update_medium_grain_light_sleep() 654 switch (amdgpu_ip_version(adev, MMHUB_HWIP, 0)) { in mmhub_v2_0_set_clockgating() 679 switch (amdgpu_ip_version(adev, MMHUB_HWIP, 0)) { in mmhub_v2_0_get_clockgating()
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H A D | amdgpu_reset.c | 33 switch (amdgpu_ip_version(adev, MP1_HWIP, 0)) { in amdgpu_reset_init() 56 switch (amdgpu_ip_version(adev, MP1_HWIP, 0)) { in amdgpu_reset_fini()
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H A D | soc21.c | 156 switch (amdgpu_ip_version(adev, UVD_HWIP, 0)) { in soc21_query_video_codecs() 383 switch (amdgpu_ip_version(adev, MP1_HWIP, 0)) { in soc21_asic_reset_method() 459 switch (amdgpu_ip_version(adev, GC_HWIP, 0)) { in soc21_need_full_reset() 584 switch (amdgpu_ip_version(adev, GC_HWIP, 0)) { in soc21_common_early_init() 952 switch (amdgpu_ip_version(adev, NBIO_HWIP, 0)) { in soc21_common_set_clockgating_state() 978 switch (amdgpu_ip_version(adev, LSDMA_HWIP, 0)) { in soc21_common_set_powergating_state()
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H A D | amdgpu_psp.c | 104 switch (amdgpu_ip_version(adev, MP0_HWIP, 0)) { in psp_check_pmfw_centralized_cstate_management() 132 switch (amdgpu_ip_version(adev, MP0_HWIP, 0)) { in psp_init_sriov_microcode() 170 switch (amdgpu_ip_version(adev, MP0_HWIP, 0)) { in psp_early_init() 361 if (amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 6) || in psp_get_runtime_db_entry() 362 amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 14)) in psp_get_runtime_db_entry() 441 amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 2); in psp_sw_init() 652 if (amdgpu_ip_version(psp->adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 2) && in psp_err_warn() 865 switch (amdgpu_ip_version(psp->adev, MP0_HWIP, 0)) { in psp_skip_tmr() 1080 amdgpu_ip_version(psp->adev, MP0_HWIP, 0) >= IP_VERSION(13, 0, 10)) in psp_asd_initialize() 1258 if (amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(11, 0, 4) || in psp_xgmi_terminate() [all …]
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H A D | aldebaran.c | 38 if ((amdgpu_ip_version(adev, MP1_HWIP, 0) == IP_VERSION(13, 0, 2) && in aldebaran_is_mode2_default() 157 if (amdgpu_ip_version(adev, MP1_HWIP, 0) == IP_VERSION(13, 0, 2) && in aldebaran_mode2_perform_reset() 337 if (amdgpu_ip_version(reset_context->reset_req_dev, MP1_HWIP, 0) == in aldebaran_mode2_restore_hwcontext()
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H A D | gmc_v11_0.c | 547 switch (amdgpu_ip_version(adev, UMC_HWIP, 0)) { in gmc_v11_0_set_umc_funcs() 570 switch (amdgpu_ip_version(adev, MMHUB_HWIP, 0)) { in gmc_v11_0_set_mmhub_funcs() 589 switch (amdgpu_ip_version(adev, GC_HWIP, 0)) { in gmc_v11_0_set_gfxhub_funcs() 652 (amdgpu_ip_version(adev, GC_HWIP, 0) < IP_VERSION(11, 5, 0)) && in gmc_v11_0_vram_gtt_location() 750 switch (amdgpu_ip_version(adev, GC_HWIP, 0)) { in gmc_v11_0_sw_init()
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H A D | gmc_v12_0.c | 549 if (amdgpu_ip_version(adev, GC_HWIP, 0) != IP_VERSION(12, 0, 0) && in gmc_v12_0_get_dcc_alignment() 550 amdgpu_ip_version(adev, GC_HWIP, 0) != IP_VERSION(12, 0, 1)) in gmc_v12_0_get_dcc_alignment() 586 switch (amdgpu_ip_version(adev, MMHUB_HWIP, 0)) { in gmc_v12_0_set_mmhub_funcs() 597 switch (amdgpu_ip_version(adev, GC_HWIP, 0)) { in gmc_v12_0_set_gfxhub_funcs() 752 switch (amdgpu_ip_version(adev, GC_HWIP, 0)) { in gmc_v12_0_sw_init()
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H A D | amdgpu_ras.c | 222 if (amdgpu_ip_version(obj->adev, MP0_HWIP, 0) != IP_VERSION(11, 0, 2) && in amdgpu_ras_debugfs_read() 223 amdgpu_ip_version(obj->adev, MP0_HWIP, 0) != IP_VERSION(11, 0, 4)) { in amdgpu_ras_debugfs_read() 635 if (amdgpu_ip_version(obj->adev, MP0_HWIP, 0) != IP_VERSION(11, 0, 2) && in amdgpu_ras_sysfs_read() 636 amdgpu_ip_version(obj->adev, MP0_HWIP, 0) != IP_VERSION(11, 0, 4)) { in amdgpu_ras_sysfs_read() 1559 if (amdgpu_ip_version(adev, MP0_HWIP, 0) != IP_VERSION(11, 0, 2) && in amdgpu_ras_query_error_count_helper() 1560 amdgpu_ip_version(adev, MP0_HWIP, 0) != IP_VERSION(11, 0, 4)) { in amdgpu_ras_query_error_count_helper() 1961 switch (amdgpu_ip_version(adev, MP0_HWIP, 0)) { in amdgpu_ras_aca_is_supported() 2183 if (amdgpu_ip_version(obj->adev, UMC_HWIP, 0) >= IP_VERSION(12, 0, 0)) { in amdgpu_ras_interrupt_poison_creation_handler() 2405 (amdgpu_ip_version(adev, MP1_HWIP, 0) == in amdgpu_ras_log_on_err_counter() 2411 if (amdgpu_ip_version(adev, MP0_HWIP, 0) != in amdgpu_ras_log_on_err_counter() [all …]
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H A D | athub_v2_1.c | 73 switch (amdgpu_ip_version(adev, ATHUB_HWIP, 0)) { in athub_v2_1_set_clockgating()
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H A D | athub_v2_0.c | 80 switch (amdgpu_ip_version(adev, ATHUB_HWIP, 0)) { in athub_v2_0_set_clockgating()
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H A D | athub_v1_0.c | 71 switch (amdgpu_ip_version(adev, ATHUB_HWIP, 0)) { in athub_v1_0_set_clockgating()
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/linux/drivers/gpu/drm/amd/pm/swsmu/smu13/ |
H A D | yellow_carp_ppt.c | 1011 if ((amdgpu_ip_version(adev, MP1_HWIP, 0)) == IP_VERSION(13, 0, 8)) in yellow_carp_get_umd_pstate_clk_default() 1013 if ((amdgpu_ip_version(adev, MP1_HWIP, 0)) == IP_VERSION(13, 0, 1) || in yellow_carp_get_umd_pstate_clk_default() 1014 (amdgpu_ip_version(adev, MP1_HWIP, 0)) == IP_VERSION(13, 0, 3)) in yellow_carp_get_umd_pstate_clk_default() 1018 if ((amdgpu_ip_version(adev, MP1_HWIP, 0)) == IP_VERSION(13, 0, 8)) in yellow_carp_get_umd_pstate_clk_default() 1020 if ((amdgpu_ip_version(adev, MP1_HWIP, 0)) == IP_VERSION(13, 0, 1) || in yellow_carp_get_umd_pstate_clk_default() 1021 (amdgpu_ip_version(adev, MP1_HWIP, 0)) == IP_VERSION(13, 0, 3)) in yellow_carp_get_umd_pstate_clk_default() 1025 if ((amdgpu_ip_version(adev, MP1_HWIP, 0)) == IP_VERSION(13, 0, 8)) in yellow_carp_get_umd_pstate_clk_default() 1027 if ((amdgpu_ip_version(adev, MP1_HWIP, 0)) == IP_VERSION(13, 0, 1) || in yellow_carp_get_umd_pstate_clk_default() 1028 (amdgpu_ip_version(adev, MP1_HWIP, 0)) == IP_VERSION(13, 0, 3)) in yellow_carp_get_umd_pstate_clk_default()
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/linux/drivers/gpu/drm/amd/pm/swsmu/smu11/ |
H A D | smu_v11_0.c | 103 ((amdgpu_ip_version(adev, MP1_HWIP, 0) == IP_VERSION(11, 0, 9)) || in smu_v11_0_init_microcode() 104 (amdgpu_ip_version(adev, MP1_HWIP, 0) == IP_VERSION(11, 0, 7)))) in smu_v11_0_init_microcode() 212 switch (amdgpu_ip_version(adev, MP1_HWIP, 0)) { in smu_v11_0_check_fw_version() 245 amdgpu_ip_version(adev, MP1_HWIP, 0)); in smu_v11_0_check_fw_version() 473 size_t size = amdgpu_ip_version(adev, MP1_HWIP, 0) == in smu_v11_0_init_power() 731 if (amdgpu_ip_version(adev, MP1_HWIP, 0) == IP_VERSION(11, 0, 11) || in smu_v11_0_init_display_count() 732 amdgpu_ip_version(adev, MP1_HWIP, 0) == IP_VERSION(11, 5, 0) || in smu_v11_0_init_display_count() 733 amdgpu_ip_version(adev, MP1_HWIP, 0) == IP_VERSION(11, 0, 12) || in smu_v11_0_init_display_count() 734 amdgpu_ip_version(adev, MP1_HWIP, 0) == IP_VERSION(11, 0, 13)) in smu_v11_0_init_display_count() 1103 switch (amdgpu_ip_version(adev, MP1_HWIP, 0)) { in smu_v11_0_gfx_off_control() [all …]
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/linux/drivers/gpu/drm/amd/pm/swsmu/smu14/ |
H A D | smu_v14_0_0_ppt.c | 733 if (amdgpu_ip_version(smu->adev, MP1_HWIP, 0) == IP_VERSION(14, 0, 1)) in smu_v14_0_common_get_dpm_freq_by_index() 1013 if (amdgpu_ip_version(smu->adev, MP1_HWIP, 0) == IP_VERSION(14, 0, 1)) in smu_v14_0_common_get_dpm_ultimate_freq() 1124 if (amdgpu_ip_version(smu->adev, MP1_HWIP, 0) == IP_VERSION(14, 0, 1)) in smu_v14_0_common_get_dpm_level_count() 1302 if (amdgpu_ip_version(smu->adev, MP1_HWIP, 0) == IP_VERSION(14, 0, 4)) in smu_v14_0_common_get_dpm_profile_freq() 1312 if (amdgpu_ip_version(smu->adev, MP1_HWIP, 0) == IP_VERSION(14, 0, 4)) in smu_v14_0_common_get_dpm_profile_freq() 1320 if (amdgpu_ip_version(smu->adev, MP1_HWIP, 0) == IP_VERSION(14, 0, 4)) in smu_v14_0_common_get_dpm_profile_freq() 1519 if (amdgpu_ip_version(smu->adev, MP1_HWIP, 0) == IP_VERSION(14, 0, 1)) in smu_v14_0_common_set_fine_grain_gfx_freq_parameters() 1583 if (amdgpu_ip_version(smu->adev, MP1_HWIP, 0) == IP_VERSION(14, 0, 1)) in smu_v14_0_common_get_dpm_table() 1636 if (amdgpu_ip_version(smu->adev, MP1_HWIP, 0) == IP_VERSION(14, 0, 1)) in smu_v14_0_common_set_mall_enable()
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