| /linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | amdgpu.h | 123 struct amdgpu_device *adev;
323 struct amdgpu_device;
365 bool amdgpu_get_bios(struct amdgpu_device *adev);
366 bool amdgpu_read_bios(struct amdgpu_device *adev);
367 bool amdgpu_soc15_read_bios_from_rom(struct amdgpu_device *adev,
369 void amdgpu_bios_release(struct amdgpu_device *adev);
426 struct amdgpu_device *adev;
525 int amdgpu_device_wb_get(struct amdgpu_device *adev, u32 *wb);
526 void amdgpu_device_wb_free(struct amdgpu_device *adev, u32 wb);
531 int amdgpu_benchmark(struct amdgpu_device *adev, int test_number);
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| H A D | amdgpu_gmc.h | 111 void (*print_l2_protection_fault_status)(struct amdgpu_device *adev,
151 void (*flush_gpu_tlb)(struct amdgpu_device *adev, uint32_t vmid,
154 void (*flush_gpu_tlb_pasid)(struct amdgpu_device *adev, uint16_t pasid,
164 void (*set_prt)(struct amdgpu_device *adev, bool enable);
166 void (*get_vm_pde)(struct amdgpu_device *adev, int level,
169 void (*get_vm_pte)(struct amdgpu_device *adev,
175 void (*override_vm_pte_flags)(struct amdgpu_device *dev,
179 unsigned int (*get_vbios_fb_size)(struct amdgpu_device *adev);
181 unsigned int (*get_dcc_alignment)(struct amdgpu_device *adev);
184 struct amdgpu_device *adev);
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| H A D | amdgpu_df.h | 34 void (*sw_init)(struct amdgpu_device *adev);
35 void (*sw_fini)(struct amdgpu_device *adev);
36 void (*hw_init)(struct amdgpu_device *adev);
37 void (*enable_broadcast_mode)(struct amdgpu_device *adev,
39 u32 (*get_fb_channel_number)(struct amdgpu_device *adev);
40 u32 (*get_hbm_channel_number)(struct amdgpu_device *adev);
41 void (*update_medium_grain_clock_gating)(struct amdgpu_device *adev,
43 void (*get_clockgating_state)(struct amdgpu_device *adev,
45 void (*enable_ecc_force_par_wr_rmw)(struct amdgpu_device *adev,
47 int (*pmc_start)(struct amdgpu_device *adev, uint64_t config,
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| H A D | amdgpu_gfxhub.h | 27 u64 (*get_fb_location)(struct amdgpu_device *adev);
28 u64 (*get_mc_fb_offset)(struct amdgpu_device *adev);
29 void (*setup_vm_pt_regs)(struct amdgpu_device *adev, uint32_t vmid,
31 int (*gart_enable)(struct amdgpu_device *adev);
33 void (*gart_disable)(struct amdgpu_device *adev);
34 void (*set_fault_enable_default)(struct amdgpu_device *adev, bool value);
35 void (*init)(struct amdgpu_device *adev);
36 int (*get_xgmi_info)(struct amdgpu_device *adev);
37 void (*utcl2_harvest)(struct amdgpu_device *adev);
38 void (*mode2_save_regs)(struct amdgpu_device *adev);
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| H A D | amdgpu_mca.h | 131 int (*mca_set_debug_mode)(struct amdgpu_device *adev, bool enable);
132 …int (*mca_parse_mca_error_count)(struct amdgpu_device *adev, enum amdgpu_ras_block blk, enum amdgp…
134 int (*mca_get_valid_mca_count)(struct amdgpu_device *adev, enum amdgpu_mca_error_type type,
136 int (*mca_get_mca_entry)(struct amdgpu_device *adev, enum amdgpu_mca_error_type type,
140 void amdgpu_mca_query_correctable_error_count(struct amdgpu_device *adev,
144 void amdgpu_mca_query_uncorrectable_error_count(struct amdgpu_device *adev,
148 void amdgpu_mca_reset_error_count(struct amdgpu_device *adev,
151 void amdgpu_mca_query_ras_error_count(struct amdgpu_device *adev,
154 int amdgpu_mca_mp0_ras_sw_init(struct amdgpu_device *adev);
155 int amdgpu_mca_mp1_ras_sw_init(struct amdgpu_device *adev);
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| H A D | amdgpu_mmhub.h | 52 u64 (*get_fb_location)(struct amdgpu_device *adev);
53 u64 (*get_mc_fb_offset)(struct amdgpu_device *adev);
54 void (*init)(struct amdgpu_device *adev);
55 int (*gart_enable)(struct amdgpu_device *adev);
56 void (*set_fault_enable_default)(struct amdgpu_device *adev,
58 void (*gart_disable)(struct amdgpu_device *adev);
59 int (*set_clockgating)(struct amdgpu_device *adev,
61 void (*get_clockgating)(struct amdgpu_device *adev, u64 *flags);
62 void (*setup_vm_pt_regs)(struct amdgpu_device *adev, uint32_t vmid,
64 void (*update_power_gating)(struct amdgpu_device *adev,
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| H A D | amdgpu_amdkfd.c | 70 void amdgpu_amdkfd_device_probe(struct amdgpu_device *adev) in amdgpu_amdkfd_device_probe()
84 * @adev: amdgpu_device pointer
93 static void amdgpu_doorbell_get_kfd_info(struct amdgpu_device *adev, in amdgpu_doorbell_get_kfd_info()
127 struct amdgpu_device *adev = container_of(work, struct amdgpu_device, in amdgpu_amdkfd_reset_work()
148 int amdgpu_amdkfd_drm_client_create(struct amdgpu_device *adev) in amdgpu_amdkfd_drm_client_create()
168 void amdgpu_amdkfd_device_init(struct amdgpu_device *adev) in amdgpu_amdkfd_device_init()
235 void amdgpu_amdkfd_device_fini_sw(struct amdgpu_device *adev) in amdgpu_amdkfd_device_fini_sw()
244 void amdgpu_amdkfd_interrupt(struct amdgpu_device *adev, in amdgpu_amdkfd_interrupt()
251 void amdgpu_amdkfd_teardown_processes(struct amdgpu_device *ade
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| H A D | amdgpu_vm.h | 259 struct amdgpu_device *adev;
499 void amdgpu_vm_manager_init(struct amdgpu_device *adev);
500 void amdgpu_vm_manager_fini(struct amdgpu_device *adev);
503 int amdgpu_vm_init(struct amdgpu_device *adev, struct amdgpu_vm *vm, int32_t xcp_id, uint32_t pasid…
504 int amdgpu_vm_make_compute(struct amdgpu_device *adev, struct amdgpu_vm *vm);
505 void amdgpu_vm_fini(struct amdgpu_device *adev, struct amdgpu_vm *vm);
511 uint64_t amdgpu_vm_generation(struct amdgpu_device *adev, struct amdgpu_vm *vm);
512 int amdgpu_vm_validate(struct amdgpu_device *adev, struct amdgpu_vm *vm,
517 int amdgpu_vm_update_pdes(struct amdgpu_device *adev,
519 int amdgpu_vm_clear_freed(struct amdgpu_device *adev,
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| H A D | amdgpu_ras_eeprom.h | 33 struct amdgpu_device;
151 bool amdgpu_ras_eeprom_check_err_threshold(struct amdgpu_device *adev);
165 void amdgpu_ras_eeprom_check_and_recover(struct amdgpu_device *adev);
167 bool amdgpu_ras_smu_eeprom_supported(struct amdgpu_device *adev);
169 int amdgpu_ras_smu_get_table_version(struct amdgpu_device *adev,
172 int amdgpu_ras_smu_get_badpage_count(struct amdgpu_device *adev,
175 int amdgpu_ras_smu_get_badpage_mca_addr(struct amdgpu_device *adev,
178 int amdgpu_ras_smu_set_timestamp(struct amdgpu_device *adev,
181 int amdgpu_ras_smu_get_timestamp(struct amdgpu_device *adev,
184 int amdgpu_ras_smu_get_badpage_ipid(struct amdgpu_device *adev,
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| H A D | smu_v13_0_10.c | 34 struct amdgpu_device *adev = (struct amdgpu_device *)reset_ctl->handle; in smu_v13_0_10_is_mode2_default()
46 struct amdgpu_device *adev = (struct amdgpu_device *)reset_ctl->handle; in smu_v13_0_10_get_reset_handler()
67 static int smu_v13_0_10_mode2_suspend_ip(struct amdgpu_device *adev) in smu_v13_0_10_mode2_suspend_ip()
96 struct amdgpu_device *adev = (struct amdgpu_device *)reset_ctl->handle; in smu_v13_0_10_mode2_prepare_hwcontext()
104 static int smu_v13_0_10_mode2_reset(struct amdgpu_device *adev) in smu_v13_0_10_mode2_reset()
114 struct amdgpu_device *adev = (struct amdgpu_device *)reset_ct in smu_v13_0_10_async_reset()
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| H A D | amdgpu_userq.h | 89 int (*detect_and_reset)(struct amdgpu_device *adev,
102 struct amdgpu_device *adev;
118 struct amdgpu_device *adev);
139 u32 amdgpu_userq_get_supported_ip_mask(struct amdgpu_device *adev);
142 int amdgpu_userq_suspend(struct amdgpu_device *adev);
143 int amdgpu_userq_resume(struct amdgpu_device *adev);
145 int amdgpu_userq_stop_sched_for_enforce_isolation(struct amdgpu_device *adev,
147 int amdgpu_userq_start_sched_for_enforce_isolation(struct amdgpu_device *adev,
150 void amdgpu_userq_pre_reset(struct amdgpu_device *adev);
151 int amdgpu_userq_post_reset(struct amdgpu_device *adev, bool vram_lost);
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| H A D | amdgpu_cper.h | 70 void amdgpu_cper_entry_fill_hdr(struct amdgpu_device *adev,
74 int amdgpu_cper_entry_fill_fatal_section(struct amdgpu_device *adev,
78 int amdgpu_cper_entry_fill_runtime_section(struct amdgpu_device *adev,
84 int amdgpu_cper_entry_fill_bad_page_threshold_section(struct amdgpu_device *adev,
88 struct cper_hdr *amdgpu_cper_alloc_entry(struct amdgpu_device *adev,
92 int amdgpu_cper_generate_ue_record(struct amdgpu_device *adev,
95 int amdgpu_cper_generate_ce_records(struct amdgpu_device *adev,
99 int amdgpu_cper_generate_bp_threshold_record(struct amdgpu_device *adev);
102 int amdgpu_cper_init(struct amdgpu_device *adev);
103 int amdgpu_cper_fini(struct amdgpu_device *adev);
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| H A D | mxgpu_vi.c | 279 void xgpu_vi_init_golden_registers(struct amdgpu_device *adev) in xgpu_vi_init_golden_registers()
319 static void xgpu_vi_mailbox_send_ack(struct amdgpu_device *adev) in xgpu_vi_mailbox_send_ack()
343 static void xgpu_vi_mailbox_set_valid(struct amdgpu_device *adev, bool val) in xgpu_vi_mailbox_set_valid()
353 static void xgpu_vi_mailbox_trans_msg(struct amdgpu_device *adev, in xgpu_vi_mailbox_trans_msg()
366 static int xgpu_vi_mailbox_rcv_msg(struct amdgpu_device *adev, in xgpu_vi_mailbox_rcv_msg()
389 static int xgpu_vi_poll_ack(struct amdgpu_device *adev) in xgpu_vi_poll_ack()
411 static int xgpu_vi_poll_msg(struct amdgpu_device *adev, enum idh_event event) in xgpu_vi_poll_msg()
431 static int xgpu_vi_send_access_requests(struct amdgpu_device *adev, in xgpu_vi_send_access_requests()
459 static int xgpu_vi_request_reset(struct amdgpu_device *adev) in xgpu_vi_request_reset()
464 static int xgpu_vi_wait_reset_cmpl(struct amdgpu_device *adev) in xgpu_vi_wait_reset_cmpl()
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| H A D | amdgpu_irq.c | 159 void amdgpu_irq_disable_all(struct amdgpu_device *adev) in amdgpu_irq_disable_all()
203 struct amdgpu_device *adev = drm_to_adev(dev); in amdgpu_irq_handler()
224 struct amdgpu_device *adev = container_of(work, struct amdgpu_device, in amdgpu_irq_handle_ih1()
239 struct amdgpu_device *adev = container_of(work, struct amdgpu_device, in amdgpu_irq_handle_ih2()
254 struct amdgpu_device *adev = container_of(work, struct amdgpu_device, in amdgpu_irq_handle_ih_soft()
271 static bool amdgpu_msi_ok(struct amdgpu_device *adev) in amdgpu_msi_ok()
281 void amdgpu_restore_msix(struct amdgpu_device *ade
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| H A D | si_ih.c | 34 static void si_ih_set_interrupt_funcs(struct amdgpu_device *adev);
36 static void si_ih_enable_interrupts(struct amdgpu_device *adev) in si_ih_enable_interrupts()
48 static void si_ih_disable_interrupts(struct amdgpu_device *adev) in si_ih_disable_interrupts()
63 static int si_ih_irq_init(struct amdgpu_device *adev) in si_ih_irq_init()
105 static void si_ih_irq_disable(struct amdgpu_device *adev) in si_ih_irq_disable()
111 static u32 si_ih_get_wptr(struct amdgpu_device *adev, in si_ih_get_wptr()
141 static void si_ih_decode_iv(struct amdgpu_device *adev, in si_ih_decode_iv()
162 static void si_ih_set_rptr(struct amdgpu_device *adev, in si_ih_set_rptr()
170 struct amdgpu_device *adev = ip_block->adev; in si_ih_early_init()
180 struct amdgpu_device *adev = ip_block->adev; in si_ih_sw_init()
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| H A D | sienna_cichlid.c | 37 struct amdgpu_device *adev = (struct amdgpu_device *)reset_ctl->handle; in sienna_cichlid_is_mode2_default()
70 static int sienna_cichlid_mode2_suspend_ip(struct amdgpu_device *adev) in sienna_cichlid_mode2_suspend_ip()
97 struct amdgpu_device *adev = (struct amdgpu_device *)reset_ctl->handle; in sienna_cichlid_mode2_prepare_hwcontext()
115 struct amdgpu_device *adev = (struct amdgpu_device *)reset_ctl->handle; in sienna_cichlid_async_reset()
127 static int sienna_cichlid_mode2_reset(struct amdgpu_device *adev) in sienna_cichlid_mode2_reset()
138 struct amdgpu_device *adev = (struct amdgpu_device *)reset_ct in sienna_cichlid_mode2_perform_reset()
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| H A D | cik_ih.c | 51 static void cik_ih_set_interrupt_funcs(struct amdgpu_device *adev);
60 static void cik_ih_enable_interrupts(struct amdgpu_device *adev) in cik_ih_enable_interrupts()
79 static void cik_ih_disable_interrupts(struct amdgpu_device *adev) in cik_ih_disable_interrupts()
106 static int cik_ih_irq_init(struct amdgpu_device *adev) in cik_ih_irq_init()
172 static void cik_ih_irq_disable(struct amdgpu_device *adev) in cik_ih_irq_disable()
191 static u32 cik_ih_get_wptr(struct amdgpu_device *adev, in cik_ih_get_wptr()
256 static void cik_ih_decode_iv(struct amdgpu_device *adev, in cik_ih_decode_iv()
288 static void cik_ih_set_rptr(struct amdgpu_device *adev, in cik_ih_set_rptr()
296 struct amdgpu_device *adev = ip_block->adev; in cik_ih_early_init()
311 struct amdgpu_device *adev = ip_block->adev; in cik_ih_sw_init()
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| H A D | umc_v8_10.c | 70 static inline uint32_t get_umc_v8_10_reg_offset(struct amdgpu_device *adev, in get_umc_v8_10_reg_offset()
79 static int umc_v8_10_clear_error_count_per_channel(struct amdgpu_device *adev, in umc_v8_10_clear_error_count_per_channel()
97 static void umc_v8_10_clear_error_count(struct amdgpu_device *adev) in umc_v8_10_clear_error_count()
103 static void umc_v8_10_query_correctable_error_count(struct amdgpu_device *adev, in umc_v8_10_query_correctable_error_count()
123 static void umc_v8_10_query_uncorrectable_error_count(struct amdgpu_device *adev, in umc_v8_10_query_uncorrectable_error_count()
143 static int umc_v8_10_query_ecc_error_count(struct amdgpu_device *adev, in umc_v8_10_query_ecc_error_count()
161 static void umc_v8_10_query_ras_error_count(struct amdgpu_device *adev, in umc_v8_10_query_ras_error_count()
185 static int umc_v8_10_swizzle_mode_na_to_pa(struct amdgpu_device *adev, in umc_v8_10_swizzle_mode_na_to_pa()
205 static void umc_v8_10_convert_error_address(struct amdgpu_device *adev, in umc_v8_10_convert_error_address()
244 static int umc_v8_10_query_error_address(struct amdgpu_device *adev, in umc_v8_10_query_error_address()
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| H A D | amdgpu_jpeg.c | 36 static void amdgpu_jpeg_reg_dump_fini(struct amdgpu_device *adev);
38 int amdgpu_jpeg_sw_init(struct amdgpu_device *adev) in amdgpu_jpeg_sw_init()
72 int amdgpu_jpeg_sw_fini(struct amdgpu_device *adev) in amdgpu_jpeg_sw_fini()
97 int amdgpu_jpeg_suspend(struct amdgpu_device *adev) in amdgpu_jpeg_suspend()
104 int amdgpu_jpeg_resume(struct amdgpu_device *adev) in amdgpu_jpeg_resume()
111 struct amdgpu_device *adev = in amdgpu_jpeg_idle_work_handler()
112 container_of(work, struct amdgpu_device, jpeg.idle_work.work); in amdgpu_jpeg_idle_work_handler()
135 struct amdgpu_device *adev = ring->adev; in amdgpu_jpeg_ring_begin_use()
154 struct amdgpu_device *adev = ring->adev; in amdgpu_jpeg_dec_ring_test_ring()
191 struct amdgpu_device *adev = ring->adev; in amdgpu_jpeg_dec_set_reg()
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| H A D | amdgpu_mca.c | 30 static bool amdgpu_mca_is_deferred_error(struct amdgpu_device *adev, in amdgpu_mca_is_deferred_error()
40 void amdgpu_mca_query_correctable_error_count(struct amdgpu_device *adev, in amdgpu_mca_query_correctable_error_count()
51 void amdgpu_mca_query_uncorrectable_error_count(struct amdgpu_device *adev, in amdgpu_mca_query_uncorrectable_error_count()
66 void amdgpu_mca_reset_error_count(struct amdgpu_device *adev, in amdgpu_mca_reset_error_count()
72 void amdgpu_mca_query_ras_error_count(struct amdgpu_device *adev, in amdgpu_mca_query_ras_error_count()
84 int amdgpu_mca_mp0_ras_sw_init(struct amdgpu_device *adev) in amdgpu_mca_mp0_ras_sw_init()
108 int amdgpu_mca_mp1_ras_sw_init(struct amdgpu_device *adev) in amdgpu_mca_mp1_ras_sw_init()
132 int amdgpu_mca_mpio_ras_sw_init(struct amdgpu_device *adev) in amdgpu_mca_mpio_ras_sw_init()
218 void amdgpu_mca_smu_init_funcs(struct amdgpu_device *adev, const struct amdgpu_mca_smu_funcs *mca_funcs) in amdgpu_mca_smu_init_funcs()
225 int amdgpu_mca_init(struct amdgpu_device *ade
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| H A D | amdgpu_amdkfd_gfx_v12.c | 30 static void lock_srbm(struct amdgpu_device *adev, uint32_t mec, uint32_t pipe, in lock_srbm()
37 static void unlock_srbm(struct amdgpu_device *adev) in unlock_srbm()
43 static void acquire_queue(struct amdgpu_device *adev, uint32_t pipe_id, in acquire_queue()
52 static void release_queue(struct amdgpu_device *adev) in release_queue()
57 static int init_interrupts_v12(struct amdgpu_device *adev, uint32_t pipe_id, uint32_t inst) in init_interrupts_v12()
76 static uint32_t get_sdma_rlc_reg_offset(struct amdgpu_device *adev, in get_sdma_rlc_reg_offset()
105 static int hqd_dump_v12(struct amdgpu_device *adev, in hqd_dump_v12()
136 static int hqd_sdma_dump_v12(struct amdgpu_device *adev, in hqd_sdma_dump_v12()
163 static int wave_control_execute_v12(struct amdgpu_device *adev, in wave_control_execute_v12()
188 static uint32_t kgd_gfx_v12_enable_debug_trap(struct amdgpu_device *ade
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| H A D | tonga_ih.c | 51 static void tonga_ih_set_interrupt_funcs(struct amdgpu_device *adev);
60 static void tonga_ih_enable_interrupts(struct amdgpu_device *adev) in tonga_ih_enable_interrupts()
77 static void tonga_ih_disable_interrupts(struct amdgpu_device *adev) in tonga_ih_disable_interrupts()
102 static int tonga_ih_irq_init(struct amdgpu_device *adev) in tonga_ih_irq_init()
175 static void tonga_ih_irq_disable(struct amdgpu_device *adev) in tonga_ih_irq_disable()
195 static u32 tonga_ih_get_wptr(struct amdgpu_device *adev, in tonga_ih_get_wptr()
248 static void tonga_ih_decode_iv(struct amdgpu_device *adev, in tonga_ih_decode_iv()
280 static void tonga_ih_set_rptr(struct amdgpu_device *adev, in tonga_ih_set_rptr()
294 struct amdgpu_device *adev = ip_block->adev; in tonga_ih_early_init()
309 struct amdgpu_device *adev = ip_block->adev; in tonga_ih_sw_init()
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| /linux/drivers/gpu/drm/amd/ras/ras_mgr/ |
| H A D | amdgpu_ras_mgr.c | 68 struct amdgpu_device *adev = (struct amdgpu_device *)ras_core->dev; in amdgpu_ras_mgr_init_event_mgr()
86 static int amdgpu_ras_mgr_init_aca_config(struct amdgpu_device *adev, in amdgpu_ras_mgr_init_aca_config()
98 static int amdgpu_ras_mgr_init_eeprom_config(struct amdgpu_device *adev, in amdgpu_ras_mgr_init_eeprom_config()
145 static int amdgpu_ras_mgr_init_mp1_config(struct amdgpu_device *adev, in amdgpu_ras_mgr_init_mp1_config()
168 static int amdgpu_ras_mgr_init_nbio_config(struct amdgpu_device *adev, in amdgpu_ras_mgr_init_nbio_config()
193 struct amdgpu_device *adev = (struct amdgpu_device *)ras_core->dev; in amdgpu_ras_mgr_get_ras_psp_system_status()
206 struct amdgpu_device *adev = (struct amdgpu_device *)ras_cor in amdgpu_ras_mgr_get_ras_ta_init_param()
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| /linux/drivers/gpu/drm/amd/pm/legacy-dpm/ |
| H A D | kv_dpm.c | 47 static void kv_dpm_set_irq_funcs(struct amdgpu_device *adev);
48 static int kv_enable_nb_dpm(struct amdgpu_device *adev,
50 static void kv_init_graphics_levels(struct amdgpu_device *adev);
51 static int kv_calculate_ds_divider(struct amdgpu_device *adev);
52 static int kv_calculate_nbps_level_settings(struct amdgpu_device *adev);
53 static int kv_calculate_dpm_settings(struct amdgpu_device *adev);
54 static void kv_enable_new_levels(struct amdgpu_device *adev);
55 static void kv_program_nbps_index_settings(struct amdgpu_device *adev,
57 static int kv_set_enabled_level(struct amdgpu_device *adev, u32 level);
58 static int kv_set_enabled_levels(struct amdgpu_device *ade
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| /linux/drivers/gpu/drm/amd/pm/ |
| H A D | amdgpu_pm.c | 56 umode_t (*is_visible)(struct amdgpu_device *adev);
108 static int amdgpu_pm_dev_state_check(struct amdgpu_device *adev, bool runpm) in amdgpu_pm_dev_state_check()
130 static int amdgpu_pm_get_access(struct amdgpu_device *adev) in amdgpu_pm_get_access()
149 static int amdgpu_pm_get_access_if_active(struct amdgpu_device *adev) in amdgpu_pm_get_access_if_active()
175 static inline void amdgpu_pm_put_access(struct amdgpu_device *adev) in amdgpu_pm_put_access()
219 struct amdgpu_device *adev = drm_to_adev(ddev); in amdgpu_get_power_dpm_state()
242 struct amdgpu_device *adev = drm_to_adev(ddev); in amdgpu_set_power_dpm_state()
331 struct amdgpu_device *adev = drm_to_adev(ddev); in amdgpu_get_power_dpm_force_performance_level()
362 struct amdgpu_device *adev = drm_to_adev(ddev); in amdgpu_set_power_dpm_force_performance_level()
413 struct amdgpu_device *ade in amdgpu_get_pp_num_states()
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