| /linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | amdgpu_amdkfd.h | 49 struct amdgpu_device;
65 struct amdgpu_device *adev;
161 void amdgpu_amdkfd_teardown_processes(struct amdgpu_device *adev);
163 void amdgpu_amdkfd_suspend(struct amdgpu_device *adev, bool suspend_proc);
164 int amdgpu_amdkfd_resume(struct amdgpu_device *adev, bool resume_proc);
165 void amdgpu_amdkfd_suspend_process(struct amdgpu_device *adev);
166 int amdgpu_amdkfd_resume_process(struct amdgpu_device *adev);
167 void amdgpu_amdkfd_interrupt(struct amdgpu_device *adev,
169 void amdgpu_amdkfd_device_probe(struct amdgpu_device *adev);
170 void amdgpu_amdkfd_device_init(struct amdgpu_device *adev);
[all …]
|
| H A D | amdgpu.h | 124 struct amdgpu_device *adev;
322 struct amdgpu_device;
365 bool amdgpu_get_bios(struct amdgpu_device *adev);
366 bool amdgpu_read_bios(struct amdgpu_device *adev);
367 bool amdgpu_soc15_read_bios_from_rom(struct amdgpu_device *adev,
369 void amdgpu_bios_release(struct amdgpu_device *adev);
426 struct amdgpu_device *adev;
525 int amdgpu_device_wb_get(struct amdgpu_device *adev, u32 *wb);
526 void amdgpu_device_wb_free(struct amdgpu_device *adev, u32 wb);
531 int amdgpu_benchmark(struct amdgpu_device *adev, int test_number);
[all …]
|
| H A D | amdgpu_df.h | 34 void (*sw_init)(struct amdgpu_device *adev);
35 void (*sw_fini)(struct amdgpu_device *adev);
36 void (*hw_init)(struct amdgpu_device *adev);
37 void (*enable_broadcast_mode)(struct amdgpu_device *adev,
39 u32 (*get_fb_channel_number)(struct amdgpu_device *adev);
40 u32 (*get_hbm_channel_number)(struct amdgpu_device *adev);
41 void (*update_medium_grain_clock_gating)(struct amdgpu_device *adev,
43 void (*get_clockgating_state)(struct amdgpu_device *adev,
45 void (*enable_ecc_force_par_wr_rmw)(struct amdgpu_device *adev,
47 int (*pmc_start)(struct amdgpu_device *adev, uint64_t config,
[all …]
|
| H A D | amdgpu_gfxhub.h | 27 u64 (*get_fb_location)(struct amdgpu_device *adev);
28 u64 (*get_mc_fb_offset)(struct amdgpu_device *adev);
29 void (*setup_vm_pt_regs)(struct amdgpu_device *adev, uint32_t vmid,
31 int (*gart_enable)(struct amdgpu_device *adev);
33 void (*gart_disable)(struct amdgpu_device *adev);
34 void (*set_fault_enable_default)(struct amdgpu_device *adev, bool value);
35 void (*init)(struct amdgpu_device *adev);
36 int (*get_xgmi_info)(struct amdgpu_device *adev);
37 void (*utcl2_harvest)(struct amdgpu_device *adev);
38 void (*mode2_save_regs)(struct amdgpu_device *adev);
[all …]
|
| H A D | amdgpu_gart.h | 32 struct amdgpu_device;
54 int amdgpu_gart_table_ram_alloc(struct amdgpu_device *adev);
55 void amdgpu_gart_table_ram_free(struct amdgpu_device *adev);
56 int amdgpu_gart_table_vram_alloc(struct amdgpu_device *adev);
57 void amdgpu_gart_table_vram_free(struct amdgpu_device *adev);
58 int amdgpu_gart_init(struct amdgpu_device *adev);
59 void amdgpu_gart_dummy_page_fini(struct amdgpu_device *adev);
60 void amdgpu_gart_unbind(struct amdgpu_device *adev, uint64_t offset,
62 void amdgpu_gart_map(struct amdgpu_device *adev, uint64_t offset,
65 void amdgpu_gart_map_gfx9_mqd(struct amdgpu_device *adev, uint64_t offset,
[all …]
|
| H A D | amdgpu_mca.h | 131 int (*mca_set_debug_mode)(struct amdgpu_device *adev, bool enable);
132 …int (*mca_parse_mca_error_count)(struct amdgpu_device *adev, enum amdgpu_ras_block blk, enum amdgp…
134 int (*mca_get_valid_mca_count)(struct amdgpu_device *adev, enum amdgpu_mca_error_type type,
136 int (*mca_get_mca_entry)(struct amdgpu_device *adev, enum amdgpu_mca_error_type type,
140 void amdgpu_mca_query_correctable_error_count(struct amdgpu_device *adev,
144 void amdgpu_mca_query_uncorrectable_error_count(struct amdgpu_device *adev,
148 void amdgpu_mca_reset_error_count(struct amdgpu_device *adev,
151 void amdgpu_mca_query_ras_error_count(struct amdgpu_device *adev,
154 int amdgpu_mca_mp0_ras_sw_init(struct amdgpu_device *adev);
155 int amdgpu_mca_mp1_ras_sw_init(struct amdgpu_device *adev);
[all …]
|
| H A D | amdgpu_vm.h | 259 struct amdgpu_device *adev;
501 void amdgpu_vm_manager_init(struct amdgpu_device *adev);
502 void amdgpu_vm_manager_fini(struct amdgpu_device *adev);
505 int amdgpu_vm_init(struct amdgpu_device *adev, struct amdgpu_vm *vm, int32_t xcp_id, uint32_t pasid…
506 int amdgpu_vm_make_compute(struct amdgpu_device *adev, struct amdgpu_vm *vm);
507 void amdgpu_vm_fini(struct amdgpu_device *adev, struct amdgpu_vm *vm);
513 uint64_t amdgpu_vm_generation(struct amdgpu_device *adev, struct amdgpu_vm *vm);
514 int amdgpu_vm_validate(struct amdgpu_device *adev, struct amdgpu_vm *vm,
519 int amdgpu_vm_update_pdes(struct amdgpu_device *adev,
521 int amdgpu_vm_clear_freed(struct amdgpu_device *adev,
[all …]
|
| H A D | amdgpu_amdkfd.c | 73 void amdgpu_amdkfd_device_probe(struct amdgpu_device *adev) in amdgpu_amdkfd_device_probe()
96 static void amdgpu_doorbell_get_kfd_info(struct amdgpu_device *adev, in amdgpu_doorbell_get_kfd_info()
130 struct amdgpu_device *adev = container_of(work, struct amdgpu_device, in amdgpu_amdkfd_reset_work()
151 int amdgpu_amdkfd_drm_client_create(struct amdgpu_device *adev) in amdgpu_amdkfd_drm_client_create()
171 void amdgpu_amdkfd_device_init(struct amdgpu_device *adev) in amdgpu_amdkfd_device_init()
238 void amdgpu_amdkfd_device_fini_sw(struct amdgpu_device *adev) in amdgpu_amdkfd_device_fini_sw()
247 void amdgpu_amdkfd_interrupt(struct amdgpu_device *adev, in amdgpu_amdkfd_interrupt()
254 void amdgpu_amdkfd_teardown_processes(struct amdgpu_device *adev) in amdgpu_amdkfd_teardown_processes()
259 void amdgpu_amdkfd_suspend(struct amdgpu_device *adev, bool suspend_proc) in amdgpu_amdkfd_suspend()
269 int amdgpu_amdkfd_resume(struct amdgpu_device *adev, bool resume_proc) in amdgpu_amdkfd_resume()
[all …]
|
| H A D | amdgpu_userq.h | 109 int (*detect_and_reset)(struct amdgpu_device *adev,
122 struct amdgpu_device *adev;
148 struct amdgpu_device *adev);
150 void amdgpu_userq_mgr_cancel_reset_work(struct amdgpu_device *adev);
170 u32 amdgpu_userq_get_supported_ip_mask(struct amdgpu_device *adev);
173 int amdgpu_userq_suspend(struct amdgpu_device *adev);
174 int amdgpu_userq_resume(struct amdgpu_device *adev);
176 int amdgpu_userq_stop_sched_for_enforce_isolation(struct amdgpu_device *adev,
178 int amdgpu_userq_start_sched_for_enforce_isolation(struct amdgpu_device *adev,
181 void amdgpu_userq_pre_reset(struct amdgpu_device *adev);
[all …]
|
| H A D | amdgpu_ras_eeprom.h | 33 struct amdgpu_device;
151 bool amdgpu_ras_eeprom_check_err_threshold(struct amdgpu_device *adev);
165 void amdgpu_ras_eeprom_check_and_recover(struct amdgpu_device *adev);
167 bool amdgpu_ras_smu_eeprom_supported(struct amdgpu_device *adev);
169 int amdgpu_ras_smu_get_table_version(struct amdgpu_device *adev,
172 int amdgpu_ras_smu_get_badpage_count(struct amdgpu_device *adev,
175 int amdgpu_ras_smu_get_badpage_mca_addr(struct amdgpu_device *adev,
178 int amdgpu_ras_smu_set_timestamp(struct amdgpu_device *adev,
181 int amdgpu_ras_smu_get_timestamp(struct amdgpu_device *adev,
184 int amdgpu_ras_smu_get_badpage_ipid(struct amdgpu_device *adev,
[all …]
|
| H A D | vce_v2_0.c | 50 static void vce_v2_0_set_ring_funcs(struct amdgpu_device *adev);
51 static void vce_v2_0_set_irq_funcs(struct amdgpu_device *adev);
62 struct amdgpu_device *adev = ring->adev; in vce_v2_0_ring_get_rptr()
79 struct amdgpu_device *adev = ring->adev; in vce_v2_0_ring_get_wptr()
96 struct amdgpu_device *adev = ring->adev; in vce_v2_0_ring_set_wptr()
104 static int vce_v2_0_lmi_clean(struct amdgpu_device *adev) in vce_v2_0_lmi_clean()
121 static int vce_v2_0_firmware_loaded(struct amdgpu_device *adev) in vce_v2_0_firmware_loaded()
147 static void vce_v2_0_disable_cg(struct amdgpu_device *adev) in vce_v2_0_disable_cg()
152 static void vce_v2_0_init_cg(struct amdgpu_device *adev) in vce_v2_0_init_cg()
173 static void vce_v2_0_mc_resume(struct amdgpu_device *adev) in vce_v2_0_mc_resume()
[all …]
|
| H A D | smu_v13_0_10.c | 34 struct amdgpu_device *adev = (struct amdgpu_device *)reset_ctl->handle; in smu_v13_0_10_is_mode2_default()
46 struct amdgpu_device *adev = (struct amdgpu_device *)reset_ctl->handle; in smu_v13_0_10_get_reset_handler()
67 static int smu_v13_0_10_mode2_suspend_ip(struct amdgpu_device *adev) in smu_v13_0_10_mode2_suspend_ip()
96 struct amdgpu_device *adev = (struct amdgpu_device *)reset_ctl->handle; in smu_v13_0_10_mode2_prepare_hwcontext()
104 static int smu_v13_0_10_mode2_reset(struct amdgpu_device *adev) in smu_v13_0_10_mode2_reset()
114 struct amdgpu_device *adev = (struct amdgpu_device *)reset_ctl->handle; in smu_v13_0_10_async_reset()
129 struct amdgpu_device *adev = (struct amdgpu_device *)reset_ctl->handle; in smu_v13_0_10_mode2_perform_reset()
140 static int smu_v13_0_10_mode2_restore_ip(struct amdgpu_device *adev) in smu_v13_0_10_mode2_restore_ip()
222 struct amdgpu_device *tmp_adev = (struct amdgpu_device *)reset_ctl->handle; in smu_v13_0_10_mode2_restore_hwcontext()
269 int smu_v13_0_10_reset_init(struct amdgpu_device *adev) in smu_v13_0_10_reset_init()
[all …]
|
| H A D | amdgpu_cper.h | 70 void amdgpu_cper_entry_fill_hdr(struct amdgpu_device *adev,
74 int amdgpu_cper_entry_fill_fatal_section(struct amdgpu_device *adev,
78 int amdgpu_cper_entry_fill_runtime_section(struct amdgpu_device *adev,
84 int amdgpu_cper_entry_fill_bad_page_threshold_section(struct amdgpu_device *adev,
88 struct cper_hdr *amdgpu_cper_alloc_entry(struct amdgpu_device *adev,
92 int amdgpu_cper_generate_ue_record(struct amdgpu_device *adev,
95 int amdgpu_cper_generate_ce_records(struct amdgpu_device *adev,
99 int amdgpu_cper_generate_bp_threshold_record(struct amdgpu_device *adev);
102 int amdgpu_cper_init(struct amdgpu_device *adev);
103 int amdgpu_cper_fini(struct amdgpu_device *adev);
|
| H A D | jpeg_v5_3_0.c | 37 static void jpeg_v5_3_0_set_dec_ring_funcs(struct amdgpu_device *adev);
38 static void jpeg_v5_3_0_set_irq_funcs(struct amdgpu_device *adev);
52 struct amdgpu_device *adev = ip_block->adev; in jpeg_v5_3_0_early_init()
72 struct amdgpu_device *adev = ip_block->adev; in jpeg_v5_3_0_sw_init()
124 struct amdgpu_device *adev = ip_block->adev; in jpeg_v5_3_0_sw_fini()
145 struct amdgpu_device *adev = ip_block->adev; in jpeg_v5_3_0_hw_init()
172 struct amdgpu_device *adev = ip_block->adev; in jpeg_v5_3_0_hw_fini()
223 static void jpeg_v5_3_0_disable_clock_gating(struct amdgpu_device *adev) in jpeg_v5_3_0_disable_clock_gating()
235 static void jpeg_v5_3_0_enable_clock_gating(struct amdgpu_device *adev) in jpeg_v5_3_0_enable_clock_gating()
252 static int jpeg_v5_3_0_disable_power_gating(struct amdgpu_device *adev) in jpeg_v5_3_0_disable_power_gating()
[all …]
|
| H A D | nbif_v6_3_1.c | 60 static void nbif_v6_3_1_remap_hdp_registers(struct amdgpu_device *adev) in nbif_v6_3_1_remap_hdp_registers()
68 static u32 nbif_v6_3_1_get_rev_id(struct amdgpu_device *adev) in nbif_v6_3_1_get_rev_id()
83 static void nbif_v6_3_1_mc_access_enable(struct amdgpu_device *adev, bool enable) in nbif_v6_3_1_mc_access_enable()
93 static u32 nbif_v6_3_1_get_memsize(struct amdgpu_device *adev) in nbif_v6_3_1_get_memsize()
98 static void nbif_v6_3_1_sdma_doorbell_range(struct amdgpu_device *adev, in nbif_v6_3_1_sdma_doorbell_range()
141 static void nbif_v6_3_1_vcn_doorbell_range(struct amdgpu_device *adev, in nbif_v6_3_1_vcn_doorbell_range()
192 static void nbif_v6_3_1_gc_doorbell_init(struct amdgpu_device *adev) in nbif_v6_3_1_gc_doorbell_init()
203 static void nbif_v6_3_1_enable_doorbell_aperture(struct amdgpu_device *adev, in nbif_v6_3_1_enable_doorbell_aperture()
211 nbif_v6_3_1_enable_doorbell_selfring_aperture(struct amdgpu_device *adev, in nbif_v6_3_1_enable_doorbell_selfring_aperture()
233 static void nbif_v6_3_1_ih_doorbell_range(struct amdgpu_device *adev, in nbif_v6_3_1_ih_doorbell_range()
[all …]
|
| H A D | mxgpu_vi.c | 279 void xgpu_vi_init_golden_registers(struct amdgpu_device *adev) in xgpu_vi_init_golden_registers()
319 static void xgpu_vi_mailbox_send_ack(struct amdgpu_device *adev) in xgpu_vi_mailbox_send_ack()
343 static void xgpu_vi_mailbox_set_valid(struct amdgpu_device *adev, bool val) in xgpu_vi_mailbox_set_valid()
353 static void xgpu_vi_mailbox_trans_msg(struct amdgpu_device *adev, in xgpu_vi_mailbox_trans_msg()
366 static int xgpu_vi_mailbox_rcv_msg(struct amdgpu_device *adev, in xgpu_vi_mailbox_rcv_msg()
389 static int xgpu_vi_poll_ack(struct amdgpu_device *adev) in xgpu_vi_poll_ack()
411 static int xgpu_vi_poll_msg(struct amdgpu_device *adev, enum idh_event event) in xgpu_vi_poll_msg()
431 static int xgpu_vi_send_access_requests(struct amdgpu_device *adev, in xgpu_vi_send_access_requests()
459 static int xgpu_vi_request_reset(struct amdgpu_device *adev) in xgpu_vi_request_reset()
464 static int xgpu_vi_wait_reset_cmpl(struct amdgpu_device *adev) in xgpu_vi_wait_reset_cmpl()
[all …]
|
| H A D | jpeg_v5_0_0.c | 53 static void jpeg_v5_0_0_set_dec_ring_funcs(struct amdgpu_device *adev);
54 static void jpeg_v5_0_0_set_irq_funcs(struct amdgpu_device *adev);
67 struct amdgpu_device *adev = ip_block->adev; in jpeg_v5_0_0_early_init()
87 struct amdgpu_device *adev = ip_block->adev; in jpeg_v5_0_0_sw_init()
141 struct amdgpu_device *adev = ip_block->adev; in jpeg_v5_0_0_sw_fini()
162 struct amdgpu_device *adev = ip_block->adev; in jpeg_v5_0_0_hw_init()
189 struct amdgpu_device *adev = ip_block->adev; in jpeg_v5_0_0_hw_fini()
240 static void jpeg_v5_0_0_disable_clock_gating(struct amdgpu_device *adev) in jpeg_v5_0_0_disable_clock_gating()
252 static void jpeg_v5_0_0_enable_clock_gating(struct amdgpu_device *adev) in jpeg_v5_0_0_enable_clock_gating()
269 static int jpeg_v5_0_0_disable_power_gating(struct amdgpu_device *adev) in jpeg_v5_0_0_disable_power_gating()
[all …]
|
| H A D | si_ih.c | 34 static void si_ih_set_interrupt_funcs(struct amdgpu_device *adev);
36 static void si_ih_enable_interrupts(struct amdgpu_device *adev) in si_ih_enable_interrupts()
48 static void si_ih_disable_interrupts(struct amdgpu_device *adev) in si_ih_disable_interrupts()
63 static int si_ih_irq_init(struct amdgpu_device *adev) in si_ih_irq_init()
105 static void si_ih_irq_disable(struct amdgpu_device *adev) in si_ih_irq_disable()
111 static u32 si_ih_get_wptr(struct amdgpu_device *adev, in si_ih_get_wptr()
141 static void si_ih_decode_iv(struct amdgpu_device *adev, in si_ih_decode_iv()
162 static void si_ih_set_rptr(struct amdgpu_device *adev, in si_ih_set_rptr()
170 struct amdgpu_device *adev = ip_block->adev; in si_ih_early_init()
180 struct amdgpu_device *adev = ip_block->adev; in si_ih_sw_init()
[all …]
|
| H A D | amdgpu_irq.c | 159 void amdgpu_irq_disable_all(struct amdgpu_device *adev) in amdgpu_irq_disable_all()
203 struct amdgpu_device *adev = drm_to_adev(dev); in amdgpu_irq_handler()
224 struct amdgpu_device *adev = container_of(work, struct amdgpu_device, in amdgpu_irq_handle_ih1()
239 struct amdgpu_device *adev = container_of(work, struct amdgpu_device, in amdgpu_irq_handle_ih2()
254 struct amdgpu_device *adev = container_of(work, struct amdgpu_device, in amdgpu_irq_handle_ih_soft()
271 static bool amdgpu_msi_ok(struct amdgpu_device *adev) in amdgpu_msi_ok()
281 void amdgpu_restore_msix(struct amdgpu_device *adev) in amdgpu_restore_msix()
307 int amdgpu_irq_init(struct amdgpu_device *adev) in amdgpu_irq_init()
365 void amdgpu_irq_fini_hw(struct amdgpu_device *adev) in amdgpu_irq_fini_hw()
389 void amdgpu_irq_fini_sw(struct amdgpu_device *adev) in amdgpu_irq_fini_sw()
[all …]
|
| H A D | jpeg_v3_0.c | 53 static void jpeg_v3_0_set_dec_ring_funcs(struct amdgpu_device *adev);
54 static void jpeg_v3_0_set_irq_funcs(struct amdgpu_device *adev);
67 struct amdgpu_device *adev = ip_block->adev; in jpeg_v3_0_early_init()
100 struct amdgpu_device *adev = ip_block->adev; in jpeg_v3_0_sw_init()
153 struct amdgpu_device *adev = ip_block->adev; in jpeg_v3_0_sw_fini()
175 struct amdgpu_device *adev = ip_block->adev; in jpeg_v3_0_hw_init()
193 struct amdgpu_device *adev = ip_block->adev; in jpeg_v3_0_hw_fini()
244 static void jpeg_v3_0_disable_clock_gating(struct amdgpu_device *adev) in jpeg_v3_0_disable_clock_gating()
274 static void jpeg_v3_0_enable_clock_gating(struct amdgpu_device *adev) in jpeg_v3_0_enable_clock_gating()
287 static int jpeg_v3_0_disable_static_power_gating(struct amdgpu_device *adev) in jpeg_v3_0_disable_static_power_gating()
[all …]
|
| H A D | amdgpu_ids.h | 36 struct amdgpu_device;
79 bool amdgpu_vmid_had_gpu_reset(struct amdgpu_device *adev,
82 int amdgpu_vmid_alloc_reserved(struct amdgpu_device *adev, struct amdgpu_vm *vm,
84 void amdgpu_vmid_free_reserved(struct amdgpu_device *adev, struct amdgpu_vm *vm,
88 void amdgpu_vmid_reset(struct amdgpu_device *adev, unsigned vmhub,
90 void amdgpu_vmid_reset_all(struct amdgpu_device *adev);
92 void amdgpu_vmid_mgr_init(struct amdgpu_device *adev);
93 void amdgpu_vmid_mgr_fini(struct amdgpu_device *adev);
|
| H A D | sienna_cichlid.c | 37 struct amdgpu_device *adev = (struct amdgpu_device *)reset_ctl->handle; in sienna_cichlid_is_mode2_default()
70 static int sienna_cichlid_mode2_suspend_ip(struct amdgpu_device *adev) in sienna_cichlid_mode2_suspend_ip()
97 struct amdgpu_device *adev = (struct amdgpu_device *)reset_ctl->handle; in sienna_cichlid_mode2_prepare_hwcontext()
115 struct amdgpu_device *adev = (struct amdgpu_device *)reset_ctl->handle; in sienna_cichlid_async_reset()
127 static int sienna_cichlid_mode2_reset(struct amdgpu_device *adev) in sienna_cichlid_mode2_reset()
138 struct amdgpu_device *adev = (struct amdgpu_device *)reset_ctl->handle; in sienna_cichlid_mode2_perform_reset()
149 static int sienna_cichlid_mode2_restore_ip(struct amdgpu_device *adev) in sienna_cichlid_mode2_restore_ip()
221 struct amdgpu_device *tmp_adev = (struct amdgpu_device *)reset_ctl->handle; in sienna_cichlid_mode2_restore_hwcontext()
272 int sienna_cichlid_reset_init(struct amdgpu_device *adev) in sienna_cichlid_reset_init()
293 int sienna_cichlid_reset_fini(struct amdgpu_device *adev) in sienna_cichlid_reset_fini()
|
| H A D | vce_v1_0.c | 51 static void vce_v1_0_set_ring_funcs(struct amdgpu_device *adev);
52 static void vce_v1_0_set_irq_funcs(struct amdgpu_device *adev);
75 struct amdgpu_device *adev = ring->adev; in vce_v1_0_ring_get_rptr()
92 struct amdgpu_device *adev = ring->adev; in vce_v1_0_ring_get_wptr()
109 struct amdgpu_device *adev = ring->adev; in vce_v1_0_ring_set_wptr()
117 static int vce_v1_0_lmi_clean(struct amdgpu_device *adev) in vce_v1_0_lmi_clean()
133 static int vce_v1_0_firmware_loaded(struct amdgpu_device *adev) in vce_v1_0_firmware_loaded()
158 static void vce_v1_0_init_cg(struct amdgpu_device *adev) in vce_v1_0_init_cg()
189 static int vce_v1_0_load_fw(struct amdgpu_device *adev) in vce_v1_0_load_fw()
252 static int vce_v1_0_wait_for_fw_validation(struct amdgpu_device *adev) in vce_v1_0_wait_for_fw_validation()
[all …]
|
| H A D | cik_ih.c | 51 static void cik_ih_set_interrupt_funcs(struct amdgpu_device *adev);
60 static void cik_ih_enable_interrupts(struct amdgpu_device *adev) in cik_ih_enable_interrupts()
79 static void cik_ih_disable_interrupts(struct amdgpu_device *adev) in cik_ih_disable_interrupts()
106 static int cik_ih_irq_init(struct amdgpu_device *adev) in cik_ih_irq_init()
172 static void cik_ih_irq_disable(struct amdgpu_device *adev) in cik_ih_irq_disable()
191 static u32 cik_ih_get_wptr(struct amdgpu_device *adev, in cik_ih_get_wptr()
256 static void cik_ih_decode_iv(struct amdgpu_device *adev, in cik_ih_decode_iv()
288 static void cik_ih_set_rptr(struct amdgpu_device *adev, in cik_ih_set_rptr()
296 struct amdgpu_device *adev = ip_block->adev; in cik_ih_early_init()
311 struct amdgpu_device *adev = ip_block->adev; in cik_ih_sw_init()
[all …]
|
| /linux/drivers/gpu/drm/amd/pm/legacy-dpm/ |
| H A D | kv_dpm.c | 47 static void kv_dpm_set_irq_funcs(struct amdgpu_device *adev);
48 static int kv_enable_nb_dpm(struct amdgpu_device *adev,
50 static void kv_init_graphics_levels(struct amdgpu_device *adev);
51 static int kv_calculate_ds_divider(struct amdgpu_device *adev);
52 static int kv_calculate_nbps_level_settings(struct amdgpu_device *adev);
53 static int kv_calculate_dpm_settings(struct amdgpu_device *adev);
54 static void kv_enable_new_levels(struct amdgpu_device *adev);
55 static void kv_program_nbps_index_settings(struct amdgpu_device *adev,
57 static int kv_set_enabled_level(struct amdgpu_device *adev, u32 level);
58 static int kv_set_enabled_levels(struct amdgpu_device *adev);
[all …]
|