Home
last modified time | relevance | path

Searched refs:ack_mask (Results 1 – 6 of 6) sorted by relevance

/linux/drivers/pmdomain/actions/
H A Dowl-sps-helper.c17 int owl_sps_set_pg(void __iomem *base, u32 pwr_mask, u32 ack_mask, bool enable) in owl_sps_set_pg() argument
24 ack = val & ack_mask; in owl_sps_set_pg()
37 if ((val & ack_mask) == (enable ? ack_mask : 0)) in owl_sps_set_pg()
H A Dowl-sps.c50 u32 pwr_mask, ack_mask; in owl_sps_set_power() local
52 ack_mask = BIT(pd->info->ack_bit); in owl_sps_set_power()
55 return owl_sps_set_pg(pd->sps->base, pwr_mask, ack_mask, enable); in owl_sps_set_power()
/linux/drivers/gpu/drm/amd/display/dc/irq/dce60/
H A Dirq_service_dce60.c83 .ack_mask = DC_HPD1_INT_CONTROL__DC_HPD1_INT_ACK_MASK,\
97 .ack_mask = DC_HPD1_INT_CONTROL__DC_HPD1_RX_INT_ACK_MASK,\
112 .ack_mask = GRPH_INTERRUPT_STATUS__GRPH_PFLIP_INT_CLEAR_MASK,\
127 .ack_mask =\
143 .ack_mask =\
/linux/include/linux/soc/actions/
H A Dowl-sps.h9 int owl_sps_set_pg(void __iomem *base, u32 pwr_mask, u32 ack_mask, bool enable);
/linux/drivers/gpu/drm/amd/display/dc/irq/dcn201/
H A Dirq_service_dcn201.c134 .ack_mask = \
/linux/drivers/accel/habanalabs/gaudi2/
H A Dgaudi2.c4969 u32 reg_base, val, ack_mask, timeout_usec = 100000; in gaudi2_verify_arc_running_mode() local
4976 ack_mask = ARC_FARM_ARC0_AUX_RUN_HALT_ACK_RUN_ACK_MASK; in gaudi2_verify_arc_running_mode()
4978 ack_mask = ARC_FARM_ARC0_AUX_RUN_HALT_ACK_HALT_ACK_MASK; in gaudi2_verify_arc_running_mode()
4981 val, ((val & ack_mask) == ack_mask), in gaudi2_verify_arc_running_mode()