Home
last modified time | relevance | path

Searched refs:_mask (Results 1 – 25 of 86) sorted by relevance

1234

/linux/tools/include/linux/
H A Dbitfield.h61 #define __BF_FIELD_CHECK(_mask, _reg, _val, _pfx) \ argument
63 BUILD_BUG_ON_MSG(!__builtin_constant_p(_mask), \
65 BUILD_BUG_ON_MSG((_mask) == 0, _pfx "mask is zero"); \
67 ~((_mask) >> __bf_shf(_mask)) & (_val) : 0, \
69 BUILD_BUG_ON_MSG(__bf_cast_unsigned(_mask, _mask) > \
72 __BUILD_BUG_ON_NOT_POWER_OF_2((_mask) + \
73 (1ULL << __bf_shf(_mask))); \
83 #define FIELD_MAX(_mask) \ argument
85 __BF_FIELD_CHECK(_mask, 0ULL, 0ULL, "FIELD_MAX: "); \
86 (typeof(_mask))((_mask) >> __bf_shf(_mask)); \
[all …]
/linux/arch/arm/probes/
H A Ddecode.h304 #define DECODE_HEADER(_type, _mask, _value, _regs) \ argument
306 {.bits = (_mask)}, \
315 #define DECODE_TABLE(_mask, _value, _table) \ argument
316 DECODE_HEADER(DECODE_TYPE_TABLE, _mask, _value, 0), \
325 #define DECODE_CUSTOM(_mask, _value, _decoder) \ argument
326 DECODE_HEADER(DECODE_TYPE_CUSTOM, _mask, _value, 0), \
335 #define DECODE_SIMULATEX(_mask, _value, _handler, _regs) \ argument
336 DECODE_HEADER(DECODE_TYPE_SIMULATE, _mask, _value, _regs), \
339 #define DECODE_SIMULATE(_mask, _value, _handler) \ argument
340 DECODE_SIMULATEX(_mask, _value, _handler, 0)
[all …]
/linux/drivers/pinctrl/mediatek/
H A Dpinctrl-mtmips.h12 #define GRP(_name, _func, _mask, _shift) \ argument
13 { .name = _name, .mask = _mask, .shift = _shift, \
14 .func = _func, .gpio = _mask, \
17 #define GRP_G(_name, _func, _mask, _gpio, _shift) \ argument
18 { .name = _name, .mask = _mask, .shift = _shift, \
/linux/drivers/net/ethernet/sfc/falcon/
H A Denum.h117 #define LOOPBACK_CHANGED(_from, _to, _mask) \ argument
118 (!!((LOOPBACK_MASK(_from) ^ LOOPBACK_MASK(_to)) & (_mask)))
120 #define LOOPBACK_OUT_OF(_from, _to, _mask) \ argument
121 ((LOOPBACK_MASK(_from) & (_mask)) && !(LOOPBACK_MASK(_to) & (_mask)))
/linux/drivers/net/ethernet/sfc/siena/
H A Denum.h117 #define LOOPBACK_CHANGED(_from, _to, _mask) \ argument
118 (!!((LOOPBACK_MASK(_from) ^ LOOPBACK_MASK(_to)) & (_mask)))
120 #define LOOPBACK_OUT_OF(_from, _to, _mask) \ argument
121 ((LOOPBACK_MASK(_from) & (_mask)) && !(LOOPBACK_MASK(_to) & (_mask)))
/linux/drivers/net/ethernet/sfc/
H A Denum.h117 #define LOOPBACK_CHANGED(_from, _to, _mask) \ argument
118 (!!((LOOPBACK_MASK(_from) ^ LOOPBACK_MASK(_to)) & (_mask)))
120 #define LOOPBACK_OUT_OF(_from, _to, _mask) \ argument
121 ((LOOPBACK_MASK(_from) & (_mask)) && !(LOOPBACK_MASK(_to) & (_mask)))
/linux/drivers/pinctrl/mvebu/
H A Dpinctrl-mvebu.h157 #define _MPP_VAR_FUNCTION(_val, _name, _subname, _mask) \ argument
162 .variant = _mask, \
167 #define MPP_VAR_FUNCTION(_val, _name, _subname, _mask) \ argument
168 _MPP_VAR_FUNCTION(_val, _name, _subname, _mask)
170 #define MPP_VAR_FUNCTION(_val, _name, _subname, _mask) \ argument
171 _MPP_VAR_FUNCTION(_val, _name, NULL, _mask)
/linux/drivers/bcma/
H A Dsprom.c185 #define SPEX(_field, _offset, _mask, _shift) \ argument
186 bus->sprom._field = ((sprom[SPOFF(_offset)] & (_mask)) >> (_shift))
188 #define SPEX32(_field, _offset, _mask, _shift) \ argument
190 sprom[SPOFF(_offset)]) & (_mask)) >> (_shift))
192 #define SPEX_ARRAY8(_field, _offset, _mask, _shift) \ argument
194 SPEX(_field[0], _offset + 0, _mask, _shift); \
195 SPEX(_field[1], _offset + 2, _mask, _shift); \
196 SPEX(_field[2], _offset + 4, _mask, _shift); \
197 SPEX(_field[3], _offset + 6, _mask, _shift); \
198 SPEX(_field[4], _offset + 8, _mask, _shift); \
[all …]
/linux/include/xen/interface/io/
H A Dring.h357 static inline RING_IDX name##_mask(RING_IDX idx, RING_IDX ring_size) \
366 return buf + name##_mask(idx, ring_size); \
384 *masked_cons = name##_mask(*masked_cons + size, ring_size); \
402 *masked_prod = name##_mask(*masked_prod + size, ring_size); \
414 prod = name##_mask(prod, ring_size); \
415 cons = name##_mask(cons, ring_size); \
/linux/drivers/mfd/
H A Dwcd934x.c19 #define WCD934X_REGMAP_IRQ_REG(_irq, _off, _mask) \ argument
22 .mask = (_mask), \
26 .type_reg_mask = (_mask), \
27 .type_level_low_val = (_mask), \
28 .type_level_high_val = (_mask), \
/linux/tools/testing/selftests/powerpc/nx-gzip/include/
H A Dnxu.h429 & REG##_mask)
431 & REG##_mask)
437 #define unget32(ST, REG) (get32(ST, REG) & ~((REG##_mask) \
441 #define ungetp32(ST, REG) (getp32(ST, REG) & ~((REG##_mask) \
453 & REG##_mask) << (31-REG##_offset))))
455 | (((X) & REG##_mask) << (31-REG##_offset))))
/linux/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/
H A Ddr_ste.h53 struct mlx5dr_match_misc2 *_mask = mask; \
55 DR_STE_SET_TAG(lookup_type, _tag, mpls0_label, _mask, \
57 DR_STE_SET_TAG(lookup_type, _tag, mpls0_s_bos, _mask, \
59 DR_STE_SET_TAG(lookup_type, _tag, mpls0_exp, _mask, \
61 DR_STE_SET_TAG(lookup_type, _tag, mpls0_ttl, _mask, \
/linux/drivers/ssb/
H A Dpci.c171 #define SPEX16(_outvar, _offset, _mask, _shift) \ argument
172 out->_outvar = ((in[SPOFF(_offset)] & (_mask)) >> (_shift))
173 #define SPEX32(_outvar, _offset, _mask, _shift) \ argument
175 in[SPOFF(_offset)]) & (_mask)) >> (_shift))
176 #define SPEX(_outvar, _offset, _mask, _shift) \ argument
177 SPEX16(_outvar, _offset, _mask, _shift)
179 #define SPEX_ARRAY8(_field, _offset, _mask, _shift) \ argument
181 SPEX(_field[0], _offset + 0, _mask, _shift); \
182 SPEX(_field[1], _offset + 2, _mask, _shift); \
183 SPEX(_field[2], _offset + 4, _mask, _shift); \
[all …]
/linux/include/linux/
H A Dnospec.h59 unsigned long _mask = array_index_mask_nospec(_i, _s); \
64 (typeof(_i)) (_i & _mask); \
/linux/drivers/gpu/drm/xe/
H A Dxe_gt_throttle.c156 #define THROTTLE_ATTR_RO(name, _mask) \ argument
159 .mask = _mask, \
162 #define THROTTLE_ATTR_RO_FUNC(name, _mask, _show) \ argument
165 .mask = _mask, \
/linux/drivers/clk/st/
H A Dclkgen.h38 #define CLKGEN_FIELD(_offset, _mask, _shift) { \ argument
40 .mask = _mask, \
/linux/drivers/gpu/drm/amd/display/dc/gpio/
H A Dddc_regs.h36 ….type ## _mask = DC_GPIO_DDC ## id ## _ ## type ## __DC_GPIO_DDC ## id ## cd ## _ ## type ## _MAS…
59 .type ## _mask = DC_GPIO_DDCVGA_ ## type ## __DC_GPIO_DDCVGA ## cd ## _ ## type ## _MASK,\
76 .type ## _mask = DC_GPIO_I2CPAD_ ## type ## __DC_GPIO_ ## cd ## _ ## type ## _MASK,\
/linux/drivers/platform/x86/intel/speed_select_if/
H A Disst_tpmi_core.c786 u64 val, _mask;\
790 _mask = GENMASK_ULL((start + width - 1), start);\
791 val &= _mask;\
798 u64 val, _mask;\
802 _mask = GENMASK((start + width - 1), start);\
803 val &= ~_mask;\
811 u64 val, _mask;\
816 _mask = GENMASK_ULL((start + width - 1), start);\
817 val &= _mask; \
824 u64 val, _mask;\
[all …]
/linux/drivers/net/ethernet/mellanox/mlxsw/
H A Dspectrum_acl.c532 #define MLXSW_SP_ACL_MANGLE_ACTION(_htype, _offset, _mask, _shift, _field) \ argument
536 .mask = _mask, \
541 #define MLXSW_SP_ACL_MANGLE_ACTION_IP4(_offset, _mask, _shift, _field) \ argument
543 _offset, _mask, _shift, _field)
545 #define MLXSW_SP_ACL_MANGLE_ACTION_IP6(_offset, _mask, _shift, _field) \ argument
547 _offset, _mask, _shift, _field)
549 #define MLXSW_SP_ACL_MANGLE_ACTION_TCP(_offset, _mask, _shift, _field) \ argument
550 MLXSW_SP_ACL_MANGLE_ACTION(FLOW_ACT_MANGLE_HDR_TYPE_TCP, _offset, _mask, _shift, _field)
552 #define MLXSW_SP_ACL_MANGLE_ACTION_UDP(_offset, _mask, _shift, _field) \ argument
553 MLXSW_SP_ACL_MANGLE_ACTION(FLOW_ACT_MANGLE_HDR_TYPE_UDP, _offset, _mask, _shift, _field)
/linux/drivers/iio/health/
H A Dafe440x.h83 #define AFE440X_INTENSITY_CHAN(_index, _mask) \ argument
96 _mask, \
/linux/drivers/dpll/zl3073x/
H A Dcore.h116 #define HWREG_SEQ_ITEM(_addr, _value, _mask, _wait) \ argument
119 .value = FIELD_PREP_CONST(_mask, _value), \
120 .mask = _mask, \
/linux/drivers/clk/meson/
H A Dmeson-clkc-utils.h52 #define MESON_COMP_SEL(_prefix, _name, _reg, _shift, _mask, _pdata, \ argument
57 .mask = (_mask), \
/linux/drivers/regulator/
H A Dspacemit-p1.c71 #define P1_REG_DESC(_TYPE, _type, _n, _s, _off, _mask, _nv, _ranges) \ argument
84 .vsel_mask = _mask, \
/linux/drivers/iio/adc/
H A Dmax1363.c196 #define MAX1363_MODE_SINGLE(_num, _mask) { \ argument
200 .modemask[0] = _mask, \
203 #define MAX1363_MODE_SCAN_TO_CHANNEL(_num, _mask) { \ argument
207 .modemask[0] = _mask, \
211 #define MAX1236_MODE_SCAN_MID_TO_CHANNEL(_mid, _num, _mask) { \ argument
215 .modemask[0] = _mask \
218 #define MAX1363_MODE_DIFF_SINGLE(_nump, _numm, _mask) { \ argument
222 .modemask[0] = _mask \
226 #define MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(_num, _numvals, _mask) { \ argument
230 .modemask[0] = _mask \
[all …]
/linux/arch/sh/kernel/cpu/sh4a/
H A Dclock-sh7757.c62 #define DIV4(_bit, _mask, _flags) \ argument
63 SH_CLK_DIV4(&pll_clk, FRQCR, _bit, _mask, _flags)

1234