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Searched refs:VceBootLevel (Results 1 – 18 of 18) sorted by relevance

/linux/drivers/gpu/drm/amd/pm/powerplay/inc/
H A Dsmumgr.h49 VceBootLevel, enumerator
H A Dsmu7_fusion.h232 uint8_t VceBootLevel; member
H A Dsmu7_discrete.h338 uint8_t VceBootLevel; member
H A Dsmu72_discrete.h280 uint8_t VceBootLevel; member
H A Dsmu74_discrete.h299 uint8_t VceBootLevel; member
H A Dsmu73_discrete.h254 uint8_t VceBootLevel; member
H A Dsmu75_discrete.h304 uint8_t VceBootLevel; member
/linux/drivers/gpu/drm/amd/pm/powerplay/smumgr/
H A Dvegam_smumgr.c372 smu_data->smc_state_table.VceBootLevel = in vegam_update_vce_smc_table()
375 smu_data->smc_state_table.VceBootLevel = 0; in vegam_update_vce_smc_table()
378 offsetof(SMU75_Discrete_DpmTable, VceBootLevel); in vegam_update_vce_smc_table()
384 mm_boot_level_value |= smu_data->smc_state_table.VceBootLevel << 16; in vegam_update_vce_smc_table()
391 (uint32_t)1 << smu_data->smc_state_table.VceBootLevel, in vegam_update_vce_smc_table()
1208 table->VceBootLevel = 0; in vegam_populate_smc_vce_level()
2188 case VceBootLevel: in vegam_get_offsetof()
2189 return offsetof(SMU75_Discrete_DpmTable, VceBootLevel); in vegam_get_offsetof()
H A Dfiji_smumgr.c1430 table->VceBootLevel = 0; in fiji_populate_smc_vce_level()
2328 case VceBootLevel: in fiji_get_offsetof()
2329 return offsetof(SMU73_Discrete_DpmTable, VceBootLevel); in fiji_get_offsetof()
2407 smu_data->smc_state_table.VceBootLevel = in fiji_update_vce_smc_table()
2410 smu_data->smc_state_table.VceBootLevel = 0; in fiji_update_vce_smc_table()
2413 offsetof(SMU73_Discrete_DpmTable, VceBootLevel); in fiji_update_vce_smc_table()
2419 mm_boot_level_value |= smu_data->smc_state_table.VceBootLevel << 16; in fiji_update_vce_smc_table()
2426 (uint32_t)1 << smu_data->smc_state_table.VceBootLevel, in fiji_update_vce_smc_table()
H A Dpolaris10_smumgr.c1379 table->VceBootLevel = 0; in polaris10_populate_smc_vce_level()
2323 smu_data->smc_state_table.VceBootLevel = in polaris10_update_vce_smc_table()
2326 smu_data->smc_state_table.VceBootLevel = 0; in polaris10_update_vce_smc_table()
2329 offsetof(SMU74_Discrete_DpmTable, VceBootLevel); in polaris10_update_vce_smc_table()
2335 mm_boot_level_value |= smu_data->smc_state_table.VceBootLevel << 16; in polaris10_update_vce_smc_table()
2342 (uint32_t)1 << smu_data->smc_state_table.VceBootLevel, in polaris10_update_vce_smc_table()
2453 case VceBootLevel: in polaris10_get_offsetof()
2454 return offsetof(SMU74_Discrete_DpmTable, VceBootLevel); in polaris10_get_offsetof()
H A Dtonga_smumgr.c1381 table->VceBootLevel = 0; in tonga_populate_smc_vce_level()
2639 case VceBootLevel: in tonga_get_offsetof()
2640 return offsetof(SMU72_Discrete_DpmTable, VceBootLevel); in tonga_get_offsetof()
2719 smu_data->smc_state_table.VceBootLevel = in tonga_update_vce_smc_table()
2723 offsetof(SMU72_Discrete_DpmTable, VceBootLevel); in tonga_update_vce_smc_table()
2729 mm_boot_level_value |= smu_data->smc_state_table.VceBootLevel << 16; in tonga_update_vce_smc_table()
2737 (uint32_t)1 << smu_data->smc_state_table.VceBootLevel, in tonga_update_vce_smc_table()
H A Dci_smumgr.c1569 table->VceBootLevel = 0; in ci_populate_smc_vce_level()
2013 table->VceBootLevel = 0; in ci_init_smc_table()
2909 VceBootLevel, 0); /* temp hard code to level 0, vce can set min evclk*/ in ci_update_vce_smc_table()
/linux/drivers/gpu/drm/radeon/
H A Dsmu7_fusion.h232 uint8_t VceBootLevel; member
H A Dsmu7_discrete.h324 uint8_t VceBootLevel; member
H A Dcikd.h48 # define VceBootLevel(x) ((x) << 16) macro
H A Dci_dpm.c3579 table->VceBootLevel = 0; in ci_init_smc_table()
4083 pi->smc_state_table.VceBootLevel = ci_get_vce_boot_level(rdev); in ci_update_vce_dpm()
4086 tmp |= VceBootLevel(pi->smc_state_table.VceBootLevel); in ci_update_vce_dpm()
H A Dkv_dpm.c1313 offsetof(SMU7_Fusion_DpmTable, VceBootLevel), in kv_update_vce_dpm()
/linux/drivers/gpu/drm/amd/pm/legacy-dpm/
H A Dkv_dpm.c1566 offsetof(SMU7_Fusion_DpmTable, VceBootLevel), in kv_update_vce_dpm()