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Searched refs:VMID (Results 1 – 15 of 15) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/hubp/dcn21/
H A Ddcn21_hubp.h91 HUBP_SF(HUBPREQ0_VMID_SETTINGS_0, VMID, mask_sh),\
/linux/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_amdkfd_gfx_v7.c51 uint32_t value = PIPEID(pipe) | MEID(mec) | VMID(vmid) | QUEUEID(queue); in lock_srbm()
561 return REG_GET_FIELD(status, VM_CONTEXT1_PROTECTION_FAULT_STATUS, VMID); in read_vmid_from_vmfault_reg()
H A Dvid.h72 #define VMID(x) ((x) << 4) macro
H A Damdgpu_amdkfd_gfx_v10.c907 VMID, in kgd_gfx_v10_set_address_watch()
921 VMID, in kgd_gfx_v10_set_address_watch()
H A Dumsch_mm_v4_0.c84 data = REG_SET_FIELD(data, VCN_MES_IC_BASE_CNTL, VMID, 0); in umsch_mm_v4_0_load_microcode()
H A Damdgpu_amdkfd_gfx_v8.c45 uint32_t value = PIPEID(pipe) | MEID(mec) | VMID(vmid) | QUEUEID(queue); in lock_srbm()
H A Damdgpu_amdkfd_gfx_v9.c837 VMID, in kgd_gfx_v9_set_address_watch()
H A Dgfx_v9_0.c3501 tmp = REG_SET_FIELD(tmp, CP_CPC_IC_BASE_CNTL, VMID, 0); in gfx_v9_0_cp_compute_load_microcode()
3619 tmp = REG_SET_FIELD(tmp, CP_MQD_CONTROL, VMID, 0); in gfx_v9_0_mqd_init()
/linux/Documentation/trace/coresight/
H A Dcoresight-etm4x-reference.rst461 Automatically clears masked bytes to 0 in VMID value registers.
466 Where mN represents a byte mask value for VMID comparator N.
468 VMID comparators.
475 Number of VMID comparators
H A Dcoresight-cpu-debug.rst188 …esight-cpu-debug 850000.debug: EDVIDSR: 90000000 (State:Non-secure Mode:EL1/0 Width:64bits VMID:0)
193 …esight-cpu-debug 852000.debug: EDVIDSR: 90000000 (State:Non-secure Mode:EL1/0 Width:64bits VMID:0)
/linux/drivers/gpu/drm/radeon/
H A Dcik_sdma.c961 radeon_ring_write(ring, VMID(vm_id)); in cik_dma_vm_flush()
981 radeon_ring_write(ring, VMID(0)); in cik_dma_vm_flush()
H A Dnid.h61 #define VMID(x) (((x) & 0x7) << 0) macro
H A Dcikd.h447 #define VMID(x) ((x) << 4) macro
/linux/drivers/gpu/drm/amd/pm/powerplay/smumgr/
H A Dsmu8_smumgr.c200 tmp = PHM_SET_FIELD(tmp, CP_CPC_IC_BASE_CNTL, VMID, 0); in smu8_load_mec_firmware()
/linux/drivers/iommu/
H A Dmsm_iommu_hw-8xxx.h191 #define SET_VMID(b, n, v) SET_GLOBAL_FIELD(b, (n<<2)|(M2VCBR_N), VMID, v)
309 #define GET_VMID(b, n) GET_GLOBAL_FIELD(b, (n<<2)|(M2VCBR_N), VMID)
919 #define VMID (VMID_MASK << VMID_SHIFT) macro