Home
last modified time | relevance | path

Searched refs:VEBOX_RING_BASE (Results 1 – 7 of 7) sorted by relevance

/linux/drivers/gpu/drm/xe/regs/
H A Dxe_engine_regs.h27 #define VEBOX_RING_BASE 0x1c8000 macro
/linux/drivers/gpu/drm/i915/gvt/
H A Dmmio_context.c143 {VECS0, RING_EXCC(VEBOX_RING_BASE), 0xffff, false}, /* 0x1a028 */
/linux/drivers/gpu/drm/i915/gt/
H A Dintel_rc6.c474 (intel_uncore_read(uncore, PWRCTX_MAXCNT(VEBOX_RING_BASE)) & IDLE_TIME_MASK) > 1)) { in bxt_check_bios_rc6_setup()
H A Dintel_engine_cs.c198 { .graphics_ver = 7, .base = VEBOX_RING_BASE }
/linux/drivers/gpu/drm/i915/
H A Dintel_gvt_mmio_table.c47 MMIO_F(prefix(VEBOX_RING_BASE), s); \
1252 MMIO_F(GEN8_RING_CS_GPR(VEBOX_RING_BASE, 0), 0x40); in iterate_bxt_mmio()
H A Di915_reg.h301 #define VEBOX_RING_BASE 0x1a000 macro
/linux/drivers/gpu/drm/xe/
H A Dxe_hw_engine.c205 .mmio_base = VEBOX_RING_BASE,