Home
last modified time | relevance | path

Searched refs:UART (Results 1 – 25 of 192) sorted by relevance

12345678

/linux/arch/arm/mach-sa1100/include/mach/
H A Duncompress.h21 #define UART(x) (*(volatile unsigned long *)(serial_port + (x))) macro
29 if (UART(UTCR3) & UTCR3_TXE) break; in putc()
31 if (UART(UTCR3) & UTCR3_TXE) break; in putc()
33 if (UART(UTCR3) & UTCR3_TXE) break; in putc()
38 while (!(UART(UTSR1) & UTSR1_TNF)) in putc()
42 UART(UTDR) = c; in putc()
/linux/arch/arm/include/debug/
H A Dtegra.S85 cmp \rv, #2 @ 2 and 3 mean DCC, UART
89 11: lsr \rv, \rp, #15 @ 17:15 are UART ID
91 cmp \rv, #0 @ UART 0?
93 cmp \rv, #1 @ UART 1?
95 cmp \rv, #2 @ UART 2?
97 cmp \rv, #3 @ UART 3?
99 cmp \rv, #4 @ UART 4?
141 cmp \rp, #0 @ Valid UART address?
H A Dvexpress.S27 @ should use UART at 0x10009000
28 @ - all other (RS1 complaint) tiles use UART mapped
/linux/Documentation/ABI/testing/
H A Dsysfs-platform-kim6 Name of the UART device at which the WL128x chip
21 UART configurations, so the baud-rate needs to be set
32 entry most often should be 1, the host's UART is required
42 use of the shared UART transport, it registers to the shared
46 daemon managing the UART, and is notified about the change
47 by the sysfs_notify. The value would be '1' when UART needs
48 to be opened/ldisc installed, and would be '0' when UART
H A Dsysfs-bus-i2c-devices-fsa948010 UART UART is attached
23 UART switch to UART path
/linux/Documentation/w1/masters/
H A Dw1-uart.rst13 UART 1-Wire bus driver. The driver utilizes the UART interface via the
15 the document `"Using a UART to Implement a 1-Wire Bus Master"`_.
17 .. _"Using a UART to Implement a 1-Wire Bus Master": https://www.analog.com/en/technical-articles/u…
19 In short, the UART peripheral must support full-duplex and operate in
26 UART (least significant bit first, start-bit low) sets the reset low time
45 Specify the UART 1-wire bus in the device tree by adding the single child
/linux/Documentation/devicetree/bindings/net/bluetooth/
H A Dmediatek,bluetooth.txt1 MediaTek UART based Bluetooth Devices
4 This device is a serial attached device to UART device and thus it must be a
5 child node of the serial node with UART.
22 - pinctrl-0: Should contain UART RXD low when the device is powered up to
24 - pinctrl-1: Should contain UART mode pin ctrl
30 - boot-gpios: GPIO same to the pin as UART RXD and used to keep LOW when
33 - pinctrl-0: Should contain UART mode pin ctrl
H A Dnokia,h4p-bluetooth.txt4 Nokia phones often come with UART connected bluetooth chips from different
8 UART status lines for wakeup of UART transceivers to improve power management
/linux/Documentation/devicetree/bindings/soc/fsl/cpm_qe/qe/
H A Ducc.txt15 - port-number : for UART drivers, the port number to use, between 0 and 3.
18 CPM UART driver, the port-number is required for the QE UART driver.
19 - soft-uart : for UART drivers, if specified this means the QE UART device
20 driver should use "Soft-UART" mode, which is needed on some SOCs that have
21 broken UART hardware. Soft-UART is provided via a microcode upload.
/linux/tools/arch/x86/dell-uart-backlight-emulator/
H A DREADME1 Emulator for DELL0501 UART attached backlight controller
5 board connected to an UART.
12 With the DELL0501 indicating that we are dealing with an UART with
20 1. A (desktop) PC with a 16550 UART on the motherboard and a standard DB9
21 connector connected to this UART.
25 4. A DSDT overlay for the desktop PC replacing the _HID of the 16550 UART
/linux/drivers/pinctrl/
H A Dpinctrl-th1520.c183 TH1520_PAD(17, AOGPIO_8, UART, AUD, IR, GPIO, ____, ____, 0),
184 TH1520_PAD(18, AOGPIO_9, UART, AUD, IR, GPIO, ____, ____, 0),
220 TH1520_PAD(4, QSPI1_D2_WP, QSPI, ISO, UART, GPIO, FUSE, ____, 0),
221 TH1520_PAD(5, QSPI1_D3_HOLD, QSPI, ISO, UART, GPIO, ____, ____, 0),
226 TH1520_PAD(10, UART1_TXD, UART, ____, ____, GPIO, ____, ____, 0),
227 TH1520_PAD(11, UART1_RXD, UART, ____, ____, GPIO, ____, ____, 0),
228 TH1520_PAD(12, UART4_TXD, UART, ____, ____, GPIO, ____, ____, 0),
229 TH1520_PAD(13, UART4_RXD, UART, ____, ____, GPIO, ____, ____, 0),
230 TH1520_PAD(14, UART4_CTSN, UART, ____, ____, GPIO, ____, ____, 0),
231 TH1520_PAD(15, UART4_RTSN, UART, ____, ____, GPIO, ____, ____, 0),
[all …]
/linux/arch/mips/
H A DKconfig.debug102 int "UART to use for compressed kernel debugging"
107 Specify the UART that should be used for compressed kernel debugging.
127 bool "CPS SMP NS16550 UART output"
130 Output debug information via an ns16550 compatible UART if exceptions
139 hex "UART Base Address"
143 The base address of the ns16550 compatible UART on which to output
149 int "UART Register Shift"
157 int "UART Register Width"
160 ns16550 registers width. UART registers IO access methods will be
162 4 UART registers will be accessed by means of lb/sb, lh/sh or lw/sw
/linux/drivers/nfc/nfcmrvl/
H A DKconfig24 tristate "Marvell NFC-over-UART driver"
28 Marvell NFC-over-UART driver.
30 This driver provides support for Marvell NFC-over-UART devices
32 Say Y here to compile support for Marvell NFC-over-UART driver
/linux/arch/arm/boot/dts/marvell/
H A Dkirkwood-openrd.dtsi61 * mode for the second UART.
66 * To use the second UART, you need to change also
78 * SelUARTorSD selects between the second UART
81 * Low: UART
/linux/drivers/nfc/pn533/
H A DKconfig31 tristate "NFC PN532 device support (UART)"
35 This module adds support for the NXP pn532 UART interface.
36 Select this if your platform is using the UART bus.
/linux/arch/arm64/boot/dts/exynos/
H A Dexynosautov920-pinctrl.dtsi315 /* UART PERIC0_USI00 */
328 /* UART PERIC0_USI01 */
341 /* UART PERIC0_USI02 */
354 /* UART PERIC0_USI03 */
367 /* UART PERIC0_USI04 */
380 /* UART PERIC0_USI05 */
393 /* UART PERIC0_USI06 */
406 /* UART PERIC0_USI07 */
419 /* UART PERIC0_USI08 */
828 /* UART PERIC1 USI09 */
[all …]
/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6qdl-dhcom-drc02.dtsi26 * GPIO line, however the i.MX6 UART driver assumes RX happens
73 * DHCOM UART1 rts/cts pins. Therefore this UART have to use DHCOM GPIOs
85 * On DRC02 this UART is used as RS485 interface and RS485_TX_En is
87 * uart-has-rtscts from this UART and add the DHCOM GPIO P pin via
H A Dimx6ull-dhcom-drc02.dts24 * Therefore the UART RTS/CTS must be output on other DHCOM pins, see uart1
55 * GPIO line, however the i.MX6ULL UART driver assumes RX happens
94 /* Use UART as RS485 */
/linux/drivers/iio/imu/bno055/
H A DKconfig9 tristate "Bosch BNO055 attached via UART"
14 Enable this to support Bosch BNO055 IMUs attached via UART.
/linux/arch/arm/mach-ux500/
H A DKconfig42 int "Ux500 UART to use for low-level debug"
45 Choose the UART on which kernel low-level debug messages should be
/linux/Documentation/networking/caif/
H A Dcaif.rst43 Normally Frame Checksum is always used on UART, but this is also provided as a
124 The host seems to be able to send over the UART, at least the CAIF ldisc get
128 The host is not able to send the message from UART, the tty has not been
132 might be problems transmitting over UART.
/linux/net/nfc/nci/
H A DKconfig26 tristate "NCI over UART protocol support"
29 Say yes if you use an NCI driver that requires UART link layer.
/linux/Documentation/devicetree/bindings/powerpc/fsl/
H A Dmpc5121-psc.txt3 PSC in UART mode
6 For PSC in UART mode the needed PSC serial devices
29 Similar to the UART mode a PSC can be operated in SPI mode. The compatible used
/linux/Documentation/ABI/stable/
H A Dsysfs-driver-aspeed-vuart4 Description: Configures which IO port the host side of the UART
13 the UART will appear on the host <-> BMC LPC bus.
/linux/drivers/dma/mediatek/
H A DKconfig30 tristate "MediaTek SoCs APDMA support for UART"
35 Support for the UART DMA engine found on MediaTek MTK SoCs.

12345678